1// RUN: llvm-tblgen %s | FileCheck %s
2// XFAIL: vg_leak
3
4// CHECK: [(set VR128:$dst, (int_x86_sse2_add_pd VR128:$src1, VR128:$src2))]
5// CHECK-NOT: [(set VR128:$dst, (int_x86_sse2_add_pd VR128:$src1, VR128:$src2))]
6
7// CHECK: [(set VR128:$dst, (int_x86_sse2_add_ps VR128:$src1, VR128:$src2))]
8// CHECK-NOT: [(set VR128:$dst, (int_x86_sse2_add_ps VR128:$src1, VR128:$src2))]
9
10class ValueType<int size, int value> {
11  int Size = size;
12  int Value = value;
13}
14
15def v2i64  : ValueType<128, 22>;   //  2 x i64 vector value
16def v2f64  : ValueType<128, 28>;   //  2 x f64 vector value
17
18class Intrinsic<string name> {
19  string Name = name;
20}
21
22class Inst<bits<8> opcode, dag oopnds, dag iopnds, string asmstr,
23           list<dag> pattern> {
24  bits<8> Opcode = opcode;
25  dag OutOperands = oopnds;
26  dag InOperands = iopnds;
27  string AssemblyString = asmstr;
28  list<dag> Pattern = pattern;
29}
30
31def ops;
32def outs;
33def ins;
34
35def set;
36
37// Define registers
38class Register<string n> {
39  string Name = n;
40}
41
42class RegisterClass<list<ValueType> regTypes, list<Register> regList> {
43  list<ValueType> RegTypes = regTypes;
44  list<Register> MemberList = regList;
45}
46
47def XMM0: Register<"xmm0">;
48def XMM1: Register<"xmm1">;
49def XMM2: Register<"xmm2">;
50def XMM3: Register<"xmm3">;
51def XMM4: Register<"xmm4">;
52def XMM5: Register<"xmm5">;
53def XMM6: Register<"xmm6">;
54def XMM7: Register<"xmm7">;
55def XMM8:  Register<"xmm8">;
56def XMM9:  Register<"xmm9">;
57def XMM10: Register<"xmm10">;
58def XMM11: Register<"xmm11">;
59def XMM12: Register<"xmm12">;
60def XMM13: Register<"xmm13">;
61def XMM14: Register<"xmm14">;
62def XMM15: Register<"xmm15">;
63
64def VR128 : RegisterClass<[v2i64, v2f64],
65                          [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
66                           XMM8, XMM9, XMM10, XMM11,
67                           XMM12, XMM13, XMM14, XMM15]>;
68
69// Dummy for subst
70def REGCLASS : RegisterClass<[], []>;
71
72class decls {
73  // Dummy for foreach
74  dag pattern;
75  int operand;
76}
77
78def Decls : decls;
79
80// Define intrinsics
81def int_x86_sse2_add_ps : Intrinsic<"addps">;
82def int_x86_sse2_add_pd : Intrinsic<"addpd">;
83def INTRINSIC : Intrinsic<"Dummy">;
84
85multiclass arith<bits<8> opcode, string asmstr, string intr, list<dag> patterns> {
86  def PS : Inst<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
87                 !strconcat(asmstr, "\t$dst, $src1, $src2"),
88                 !foreach(Decls.pattern, patterns,
89		          !foreach(Decls.operand, Decls.pattern,
90			           !subst(INTRINSIC, !cast<Intrinsic>(!subst("SUFFIX", "_ps", intr)),
91				          !subst(REGCLASS, VR128, Decls.operand))))>;
92
93  def PD : Inst<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
94                 !strconcat(asmstr, "\t$dst, $src1, $src2"),
95                 !foreach(Decls.pattern, patterns,
96		          !foreach(Decls.operand, Decls.pattern,
97			           !subst(INTRINSIC, !cast<Intrinsic>(!subst("SUFFIX", "_pd", intr)),
98				          !subst(REGCLASS, VR128, Decls.operand))))>;
99}
100
101defm ADD : arith<0x58, "add", "int_x86_sse2_addSUFFIX",
102                 [(set REGCLASS:$dst, (INTRINSIC REGCLASS:$src1, REGCLASS:$src2))]>;
103
104