| /external/llvm/test/CodeGen/AArch64/ |
| D | dp2.ll | 46 ; CHECK: {{lsl|lslv}} {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}
89 ; CHECK: {{lsl|lslv}} {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
146 ; CHECK: {{lsl|lslv}} {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
|
| /external/valgrind/none/tests/arm64/ |
| D | integer.stdout.exp | 1912 lslv x21,x20,x19 :: rd 2a8227efa64a2800 rm 4b154113f7d32514, rn cce230caafbf9cc9, cin 0, nzcv 00000…
1913 lslv x21,x20,x19 :: rd 75655c8753c4c000 rm 33d5d595721d4f13, rn f4509311f443a7ce, cin 0, nzcv 00000…
1914 lslv x21,x20,x19 :: rd de6954cbc1700000 rm 4a3c6de6954cbc17, rn 111b21e39fbd7254, cin 0, nzcv 00000…
1915 lslv x21,x20,x19 :: rd 6c11318000000000 rm fbb5c64ed1b044c6, rn 33ca4c4fb3960326, cin 0, nzcv 00000…
1916 lslv x21,x20,x19 :: rd 5f03d4a000000000 rm 2b7c5939d7c0f528, rn b73870a5a6630162, cin 0, nzcv 00000…
1917 lslv x21,x20,x19 :: rd 5fc8323158b9b740 rm 02fe41918ac5cdba, rn 48e0815289728f05, cin 0, nzcv 00000…
1918 lslv x21,x20,x19 :: rd eeb8000000000000 rm b60a8f381f187bae, rn 008c208cc413ff72, cin 0, nzcv 00000…
1948 lslv w21,w20,w19 :: rd 00000000a64a2800 rm 4b154113f7d32514, rn cce230caafbf9cc9, cin 0, nzcv 00000…
1949 lslv w21,w20,w19 :: rd 0000000053c4c000 rm 33d5d595721d4f13, rn f4509311f443a7ce, cin 0, nzcv 00000…
1950 lslv w21,w20,w19 :: rd 00000000c1700000 rm 4a3c6de6954cbc17, rn 111b21e39fbd7254, cin 0, nzcv 00000…
[all …]
|
| /external/llvm/test/MC/AArch64/ |
| D | arm64-arithmetic-encoding.s | 398 lslv w1, w2, w3
399 lslv x1, x2, x3
|
| D | basic-a64-instructions.s | 1520 lslv w11, w12, w13
1521 lslv x14, x15, x16
|
| /external/v8/test/cctest/ |
| D | test-disasm-arm64.cc | 782 COMPARE(lslv(w0, w1, w2), "lsl w0, w1, w2"); in TEST_()
783 COMPARE(lslv(x3, x4, x5), "lsl x3, x4, x5"); in TEST_()
|
| D | test-assembler-arm64.cc | 4655 TEST(lslv) { in TEST() argument
4671 __ lslv(x0, x0, xzr); in TEST() local
|
| /external/v8/src/arm64/ |
| D | macro-assembler-arm64-inl.h | 899 lslv(rd, rn, rm); in Lsl()
|
| D | assembler-arm64.h | 1109 void lslv(const Register& rd, const Register& rn, const Register& rm);
|
| D | assembler-arm64.cc | 1247 void Assembler::lslv(const Register& rd, in lslv() function in v8::internal::Assembler
|
| /external/vixl/src/vixl/a64/ |
| D | macro-assembler-a64.h | 1575 lslv(rd, rn, rm); in Lsl()
|
| D | assembler-a64.h | 1409 void lslv(const Register& rd, const Register& rn, const Register& rm);
|
| D | assembler-a64.cc | 1050 void Assembler::lslv(const Register& rd, in lslv() function in vixl::Assembler
|
| /external/vixl/doc/ |
| D | supported-instructions.md | 757 void lslv(const Register& rd, const Register& rn, const Register& rm)
|
| /external/vixl/test/ |
| D | test-disasm-a64.cc | 880 COMPARE(lslv(w0, w1, w2), "lsl w0, w1, w2"); in TEST()
881 COMPARE(lslv(x3, x4, x5), "lsl x3, x4, x5"); in TEST()
|
| D | test-assembler-a64.cc | 8734 TEST(lslv) { in TEST() argument
8751 __ lslv(x0, x0, xzr); in TEST() local
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 695 def : ShiftAlias<"lslv", LSLVWr, GPR32>;
696 def : ShiftAlias<"lslv", LSLVXr, GPR64>;
|