/external/v8/src/arm64/ |
D | disasm-arm64.cc | 1306 char reg_type; in SubstituteRegisterField() local 1309 reg_type = instr->SixtyFourBits() ? 'x' : 'w'; in SubstituteRegisterField() 1312 reg_type = ((instr->FPType() & 1) == 0) ? 's' : 'd'; in SubstituteRegisterField() 1315 reg_type = format[0] + 0x20; in SubstituteRegisterField() 1318 if ((reg_num != kZeroRegCode) || (reg_type == 's') || (reg_type == 'd')) { in SubstituteRegisterField() 1322 if ((reg_type == 'x') && (reg_num == 27)) { in SubstituteRegisterField() 1324 } else if ((reg_type == 'x') && (reg_num == 28)) { in SubstituteRegisterField() 1326 } else if ((reg_type == 'x') && (reg_num == 29)) { in SubstituteRegisterField() 1328 } else if ((reg_type == 'x') && (reg_num == 30)) { in SubstituteRegisterField() 1331 AppendToOutput("%c%d", reg_type, reg_num); in SubstituteRegisterField() [all …]
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D | assembler-arm64-inl.h | 53 return reg_type; in type() 115 DCHECK((reg_type != kNoRegister) || (reg_code == 0)); in IsNone() 116 DCHECK((reg_type != kNoRegister) || (reg_size == 0)); in IsNone() 118 return reg_type == kNoRegister; in IsNone() 130 return (reg_code == other.reg_code) && (reg_type == other.reg_type); in Aliases() 135 return reg_type == kRegister; in IsRegister() 140 return reg_type == kFPRegister; in IsFPRegister() 145 return (reg_size == other.reg_size) && (reg_type == other.reg_type); in IsSameSizeAndType()
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D | assembler-arm64.h | 122 RegisterType reg_type; member 134 reg_type = CPURegister::kNoRegister; in Register() 140 reg_type = r.reg_type; in Register() 147 reg_type = r.reg_type; in Register() 210 reg_type = CPURegister::kNoRegister; in FPRegister() 216 reg_type = r.reg_type; in FPRegister() 223 reg_type = r.reg_type; in FPRegister()
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/external/opencv3/modules/core/src/ |
D | convert.cpp | 64 #define SPLIT2_KERNEL_TEMPLATE(name, data_type, reg_type, load_func, store_func) \ argument 71 reg_type r = load_func(src); \ 77 #define SPLIT3_KERNEL_TEMPLATE(name, data_type, reg_type, load_func, store_func) \ argument 84 reg_type r = load_func(src); \ 91 #define SPLIT4_KERNEL_TEMPLATE(name, data_type, reg_type, load_func, store_func) \ argument 98 reg_type r = load_func(src); \ 150 #define SPLIT2_KERNEL_TEMPLATE(data_type, reg_type, cast_type, _mm_deinterleave, flavor) \ 167 reg_type v_src0 = _mm_loadu_##flavor((cast_type const *)(src)); \ 168 reg_type v_src1 = _mm_loadu_##flavor((cast_type const *)(src + ELEMS_IN_VEC)); \ 169 reg_type v_src2 = _mm_loadu_##flavor((cast_type const *)(src + ELEMS_IN_VEC * 2)); \ [all …]
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D | arithm.cpp | 95 typename VLoadStore256<T>::reg_type r0 = VLoadStore256<T>::load(src1 + x); in vBinOp() 107 … typename VLoadStore128<T>::reg_type r0 = VLoadStore128<T>::load(src1 + x ); in vBinOp() 108 … typename VLoadStore128<T>::reg_type r1 = VLoadStore128<T>::load(src1 + x + 16/sizeof(T)); in vBinOp() 127 typename VLoadStore64<T>::reg_type r = VLoadStore64<T>::load(src1 + x); in vBinOp() 173 … typename VLoadStore256Aligned<T>::reg_type r0 = VLoadStore256Aligned<T>::load(src1 + x); in vBinOp32() 186 … typename VLoadStore128Aligned<T>::reg_type r0 = VLoadStore128Aligned<T>::load(src1 + x ); in vBinOp32() 187 … typename VLoadStore128Aligned<T>::reg_type r1 = VLoadStore128Aligned<T>::load(src1 + x + 4); in vBinOp32() 203 typename VLoadStore256<T>::reg_type r0 = VLoadStore256<T>::load(src1 + x); in vBinOp32() 215 typename VLoadStore128<T>::reg_type r0 = VLoadStore128<T>::load(src1 + x ); in vBinOp32() 216 typename VLoadStore128<T>::reg_type r1 = VLoadStore128<T>::load(src1 + x + 4); in vBinOp32() [all …]
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/external/mesa3d/src/gallium/auxiliary/gallivm/ |
D | lp_bld_flow.c | 146 LLVMBuildBitCast(builder, value, mask->reg_type, ""), in lp_build_mask_check() 147 LLVMConstNull(mask->reg_type), in lp_build_mask_check() 170 mask->reg_type = LLVMIntTypeInContext(gallivm->context, type.width * type.length); in lp_build_mask_begin()
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D | lp_bld_flow.h | 72 LLVMTypeRef reg_type; member
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D | lp_bld_tgsi_soa.c | 234 LLVMTypeRef reg_type = LLVMIntTypeInContext(gallivm->context, in lp_exec_endloop() local 269 LLVMBuildBitCast(builder, mask->exec_mask, reg_type, ""), in lp_exec_endloop() 270 LLVMConstNull(reg_type), ""); in lp_exec_endloop()
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/external/vixl/src/vixl/a64/ |
D | disasm-a64.cc | 2891 CPURegister::RegisterType reg_type = CPURegister::kRegister; in SubstituteRegisterField() local 2902 reg_type = CPURegister::kRegister; reg_size = kWRegSize; break; in SubstituteRegisterField() 2904 reg_type = CPURegister::kRegister; reg_size = kXRegSize; break; in SubstituteRegisterField() 2906 reg_type = CPURegister::kVRegister; reg_size = kBRegSize; break; in SubstituteRegisterField() 2908 reg_type = CPURegister::kVRegister; reg_size = kHRegSize; break; in SubstituteRegisterField() 2910 reg_type = CPURegister::kVRegister; reg_size = kSRegSize; break; in SubstituteRegisterField() 2912 reg_type = CPURegister::kVRegister; reg_size = kDRegSize; break; in SubstituteRegisterField() 2914 reg_type = CPURegister::kVRegister; reg_size = kQRegSize; break; in SubstituteRegisterField() 2922 if ((reg_type == CPURegister::kRegister) && in SubstituteRegisterField() 2927 AppendRegisterNameToOutput(instr, CPURegister(reg_num, reg_size, reg_type)); in SubstituteRegisterField() [all …]
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/external/iw/ |
D | event.c | 301 __u8 reg_type; in print_event() local 380 reg_type = nla_get_u8(tb[NL80211_ATTR_REG_TYPE]); in print_event() 382 switch (reg_type) { in print_event()
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/external/google-breakpad/src/third_party/libdisasm/swig/ |
D | libdisasm.i | 25 %rename(reg_type) x86_reg_type;
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/external/wpa_supplicant_8/src/drivers/ |
D | driver.h | 71 enum reg_type { enum 4698 enum reg_type type;
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/external/v8/src/arm/ |
D | assembler-arm.cc | 2839 static void SplitRegCode(VFPType reg_type, in SplitRegCode() argument 2844 if (IsIntegerVFPType(reg_type) || !IsDoubleVFPType(reg_type)) { in SplitRegCode()
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/external/wpa_supplicant_8/wpa_supplicant/ |
D | events.c | 3145 static const char * reg_type_str(enum reg_type type)
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