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Searched refs:rn_ (Results 1 – 4 of 4) sorted by relevance

/external/v8/src/arm/
Dassembler-arm.cc308 rn_ = rn; in MemOperand()
323 rn_ = rn; in MemOperand()
334 rn_ = rn; in MemOperand()
344 rn_ = rn; in NeonMemOperand()
351 rn_ = rn; in NeonMemOperand()
1238 DCHECK(!x.rn_.is(ip) && ((instr & L) == L || !rd.is(ip))); in addrmod2()
1240 addrmod2(instr, rd, MemOperand(x.rn_, ip, x.am_)); in addrmod2()
1252 DCHECK((am & (P|W)) == P || !x.rn_.is(pc)); // no pc base with writeback in addrmod2()
1253 emit(instr | am | x.rn_.code()*B16 | rd.code()*B12); in addrmod2()
1259 DCHECK(x.rn_.is_valid()); in addrmod3()
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Dassembler-arm.h555 Register rn() const { return rn_; } in rn()
564 Register rn_; // base
586 Register rn() const { return rn_; } in rn()
593 Register rn_; // base variable
/external/v8/src/arm64/
Dassembler-arm64.cc2413 Register rn_ = Register::Create(rn.code(), rd.SizeInBits()); in EmitExtendShift() local
2423 case UXTW: ubfm(rd, rn_, non_shift_bits, high_bit); break; in EmitExtendShift()
2426 case SXTW: sbfm(rd, rn_, non_shift_bits, high_bit); break; in EmitExtendShift()
2431 lsl(rd, rn_, left_shift); in EmitExtendShift()
2438 lsl(rd, rn_, left_shift); in EmitExtendShift()
/external/vixl/src/vixl/a64/
Dassembler-a64.cc4851 Register rn_ = Register(rn.code(), rd.size()); in EmitExtendShift() local
4861 case UXTW: ubfm(rd, rn_, non_shift_bits, high_bit); break; in EmitExtendShift()
4864 case SXTW: sbfm(rd, rn_, non_shift_bits, high_bit); break; in EmitExtendShift()
4869 lsl(rd, rn_, left_shift); in EmitExtendShift()
4876 lsl(rd, rn_, left_shift); in EmitExtendShift()