/external/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyLowerBrUnless.cpp | 78 case EQ_I32: Def->setDesc(TII.get(NE_I32)); Inverted = true; break; in runOnMachineFunction() 79 case NE_I32: Def->setDesc(TII.get(EQ_I32)); Inverted = true; break; in runOnMachineFunction() 80 case GT_S_I32: Def->setDesc(TII.get(LE_S_I32)); Inverted = true; break; in runOnMachineFunction() 81 case GE_S_I32: Def->setDesc(TII.get(LT_S_I32)); Inverted = true; break; in runOnMachineFunction() 82 case LT_S_I32: Def->setDesc(TII.get(GE_S_I32)); Inverted = true; break; in runOnMachineFunction() 83 case LE_S_I32: Def->setDesc(TII.get(GT_S_I32)); Inverted = true; break; in runOnMachineFunction() 84 case GT_U_I32: Def->setDesc(TII.get(LE_U_I32)); Inverted = true; break; in runOnMachineFunction() 85 case GE_U_I32: Def->setDesc(TII.get(LT_U_I32)); Inverted = true; break; in runOnMachineFunction() 86 case LT_U_I32: Def->setDesc(TII.get(GE_U_I32)); Inverted = true; break; in runOnMachineFunction() 87 case LE_U_I32: Def->setDesc(TII.get(GT_U_I32)); Inverted = true; break; in runOnMachineFunction() [all …]
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZShortenInst.cpp | 89 MI.setDesc(TII->get(LLIxL)); in shortenIIF() 94 MI.setDesc(TII->get(LLIxH)); in shortenIIF() 105 MI.setDesc(TII->get(Opcode)); in shortenOn0() 116 MI.setDesc(TII->get(Opcode)); in shortenOn01() 129 MI.setDesc(TII->get(Opcode)); in shortenOn001() 163 MI.setDesc(TII->get(Opcode)); in shortenFPConv()
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D | SystemZInstrInfo.cpp | 82 EarlierMI->setDesc(get(HighOpcode)); in splitMove() 83 MI->setDesc(get(LowOpcode)); in splitMove() 98 MI->setDesc(get(NewOpcode)); in splitAdjDynAlloc() 113 MI->setDesc(get(IsHigh ? HighOpcode : LowOpcode)); in expandRIPseudo() 130 MI->setDesc(get(LowOpcodeK)); in expandRIEPseudo() 135 MI->setDesc(get(DestIsHigh ? HighOpcode : LowOpcode)); in expandRIEPseudo() 149 MI->setDesc(get(Opcode)); in expandRXYPseudo() 541 MI->setDesc(get(CondOpcode)); in PredicateInstruction() 1039 MI->setDesc(get(DestIsHigh ? SystemZ::RISBHH : SystemZ::RISBLL)); in expandPostRAPseudo() 1041 MI->setDesc(get(DestIsHigh ? SystemZ::RISBHL : SystemZ::RISBLH)); in expandPostRAPseudo()
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D | SystemZElimCompare.cpp | 211 Branch->setDesc(TII->get(BRCT)); in convertToBRCT() 228 MI->setDesc(TII->get(Opcode)); in convertToLoadAndTest() 417 Branch->setDesc(TII->get(FusedOpcode)); in fuseCompareAndBranch()
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D | SystemZLongBranch.cpp | 387 Branch->setDesc(TII->get(SystemZ::JG)); in relaxBranch() 390 Branch->setDesc(TII->get(SystemZ::BRCL)); in relaxBranch()
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D | SystemZRegisterInfo.cpp | 132 MI->setDesc(TII->get(OpcodeForOffset)); in eliminateFrameIndex()
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/external/llvm/lib/CodeGen/ |
D | ExpandPostRAPseudos.cpp | 103 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerSubregToReg() 114 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerSubregToReg() 141 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerCopy() 156 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerCopy()
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D | ProcessImplicitDefs.cpp | 90 UserMI->setDesc(TII->get(TargetOpcode::IMPLICIT_DEF)); in processImplicitDef()
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/external/llvm/lib/Target/Sparc/ |
D | DelaySlotFiller.cpp | 190 slot->setDesc(Subtarget->getInstrInfo()->get(SP::RET)); in findDelayInstr() 377 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) in combineRestoreADD() 416 OrMI->setDesc(TII->get((OrMI->getOpcode() == SP::ORrr) in combineRestoreOR() 453 RestoreMI->setDesc(TII->get(SP::RESTOREri)); in combineRestoreSETHIi()
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D | SparcRegisterInfo.cpp | 193 MI.setDesc(TII.get(SP::STDFri)); in eliminateFrameIndex() 206 MI.setDesc(TII.get(SP::LDDFri)); in eliminateFrameIndex()
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/external/llvm/lib/Target/ARM/ |
D | Thumb2InstrInfo.cpp | 464 MI.setDesc(TII.get(ARM::tMOVr)); in rewriteT2FrameIndex() 479 MI.setDesc(TII.get(ARM::t2SUBri)); in rewriteT2FrameIndex() 481 MI.setDesc(TII.get(ARM::t2ADDri)); in rewriteT2FrameIndex() 498 MI.setDesc(TII.get(NewOpc)); in rewriteT2FrameIndex() 586 MI.setDesc(TII.get(NewOpc)); in rewriteT2FrameIndex() 619 MI.setDesc(TII.get(positiveOffsetOpcode(NewOpc))); in rewriteT2FrameIndex()
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D | ThumbRegisterInfo.cpp | 400 MI.setDesc(TII.get(NewOpc)); in rewriteFrameIndex() 587 MI.setDesc(TII.get(UseRR ? ARM::tLDRr : ARM::tLDRi)); in eliminateFrameIndex() 609 MI.setDesc(TII.get(UseRR ? ARM::tSTRr : ARM::tSTRi)); in eliminateFrameIndex()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonRegisterInfo.cpp | 140 MI.setDesc(HII.get(Hexagon::A2_addi)); in eliminateFrameIndex() 146 MI.setDesc(HII.get(Hexagon::A2_addi)); in eliminateFrameIndex()
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D | HexagonPeephole.cpp | 259 MI->setDesc(QII->get(NewOp)); in runOnMachineFunction() 288 MI->setDesc(QII->get(NewOp)); in runOnMachineFunction()
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D | HexagonCFGOptimizer.cpp | 96 MI->setDesc(TII->get(NewOpcode)); in InvertAndChangeJumpTarget()
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/external/llvm/lib/Target/AMDGPU/ |
D | SIFoldOperands.cpp | 151 MI->setDesc(TII->get(AMDGPU::V_MAD_F32)); in tryAddToFoldList() 157 MI->setDesc(TII->get(Opc)); in tryAddToFoldList() 255 UseMI->setDesc(TII->get(MovOp)); in foldOperand()
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/external/icu/icu4c/source/i18n/unicode/ |
D | numsys.h | 194 void setDesc(UnicodeString desc);
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrInfo.cpp | 1307 MI->setDesc(get(Pred[0].getImm() ? in PredicateInstruction() 1311 MI->setDesc(get(PPC::BCLR)); in PredicateInstruction() 1315 MI->setDesc(get(PPC::BCLRn)); in PredicateInstruction() 1319 MI->setDesc(get(PPC::BCCLR)); in PredicateInstruction() 1329 MI->setDesc(get(Pred[0].getImm() ? in PredicateInstruction() 1336 MI->setDesc(get(PPC::BC)); in PredicateInstruction() 1344 MI->setDesc(get(PPC::BCn)); in PredicateInstruction() 1352 MI->setDesc(get(PPC::BCC)); in PredicateInstruction() 1369 MI->setDesc(get(isPPC64 ? (setLR ? PPC::BCCTRL8 : PPC::BCCTR8) : in PredicateInstruction() 1375 MI->setDesc(get(isPPC64 ? (setLR ? PPC::BCCTRL8n : PPC::BCCTR8n) : in PredicateInstruction() [all …]
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/external/icu/icu4c/source/i18n/ |
D | numsys.cpp | 97 ns->setDesc(desc_in); in createInstance() 231 void NumberingSystem::setDesc(UnicodeString d) { in setDesc() function in NumberingSystem
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/external/icu/android_icu4j/src/main/tests/android/icu/dev/test/stringprep/ |
D | TestInputDataStructure.java | 43 public void setDesc(String desc) { in setDesc() method in TestInputDataStructure
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/external/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/test/stringprep/ |
D | TestInputDataStructure.java | 42 public void setDesc(String desc) { in setDesc() method in TestInputDataStructure
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/external/llvm/include/llvm/MC/ |
D | MCSymbolMachO.h | 91 void setDesc(unsigned Value) const { in setDesc() function
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/external/llvm/lib/Target/Mips/ |
D | MipsConstantIslandPass.cpp | 1140 UserMI->setDesc(TII->get(U.getLongFormOpcode())); in findLongFormInRangeCPEntry() 1546 MI->setDesc(TII->get(Mips::BimmX16)); in fixupUnconditionalBr() 1562 MI->setDesc(TII->get(Mips::JalB16)); in fixupUnconditionalBr() 1590 MI->setDesc(TII->get(LongFormOpcode)); in fixupConditionalBr() 1627 MI->setDesc(TII->get(OppositeBranchOpcode)); in fixupConditionalBr() 1699 I->setDesc(TII->get(Mips::LwRxPcTcp16)); in prescanForConstants()
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/external/llvm/lib/Target/X86/ |
D | X86FloatingPoint.cpp | 792 I->setDesc(TII->get(Opcode)); in popStackAfter() 954 MI->setDesc(TII->get(getConcreteOpcode(MI->getOpcode()))); in handleZeroArgFP() 999 MI->setDesc(TII->get(getConcreteOpcode(MI->getOpcode()))); in handleOneArgFP() 1051 MI->setDesc(TII->get(getConcreteOpcode(MI->getOpcode()))); in handleOneArgFPRW() 1249 MI->setDesc(TII->get(getConcreteOpcode(MI->getOpcode()))); in handleCompareFP() 1275 MI->setDesc(TII->get(getConcreteOpcode(MI->getOpcode()))); in handleCondMovFP()
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/external/llvm/lib/Target/MSP430/ |
D | MSP430RegisterInfo.cpp | 136 MI.setDesc(TII.get(MSP430::MOV16rr)); in eliminateFrameIndex()
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