| /external/llvm/test/MC/AMDGPU/ |
| D | mubuf.s | 28 buffer_load_dword v1, s[4:7], s1 offset:4 tfe
31 buffer_load_dword v1, s[4:7], s1 tfe glc
34 buffer_load_dword v1, s[4:7], s1 offset:4 glc tfe slc
37 buffer_load_dword v1, s[4:7], s1 glc tfe slc offset:4
56 buffer_load_dword v1, v2, s[4:7], s1 offen offset:4 tfe
59 buffer_load_dword v1, v2, s[4:7], s1 offen tfe glc
62 buffer_load_dword v1, v2, s[4:7], s1 offen offset:4 glc tfe slc
65 buffer_load_dword v1, v2, s[4:7], s1 offen glc tfe slc offset:4
84 buffer_load_dword v1, v2, s[4:7], s1 idxen offset:4 tfe
87 buffer_load_dword v1, v2, s[4:7], s1 idxen tfe glc
[all …]
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| D | flat.s | 27 flat_load_dword v1, v[3:4] glc tfe
31 flat_load_dword v1, v[3:4] glc slc tfe
35 flat_load_dword v1, v[3:4] glc tfe slc
47 flat_load_dword v1, v[3:4] slc tfe
51 flat_load_dword v1, v[3:4] slc glc tfe
55 flat_load_dword v1, v[3:4] slc tfe glc
59 flat_load_dword v1, v[3:4] tfe
63 flat_load_dword v1, v[3:4] tfe glc
67 flat_load_dword v1, v[3:4] tfe slc
71 flat_load_dword v1, v[3:4] tfe glc slc
[all …]
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | VIInstrFormats.td | 44 bits<1> tfe;
58 let Inst{55} = tfe;
73 bits<1> tfe;
88 let Inst{55} = tfe;
|
| D | SIInstrInfo.td | 115 SDTCisVT<12, i32> // tfe(imm)
535 def tfe : tfe_base <TFEMubufMatchClass>;
2238 SReg_128:$srsrc, i1imm:$slc, i1imm:$tfe, SCSrc_32:$soffset),
2240 #" $nfmt, $vaddr, $srsrc, $slc, $tfe, $soffset", []
2252 i1imm:$slc, i1imm:$tfe, SCSrc_32:$soffset),
2254 #" $nfmt, $vaddr, $srsrc, $slc, $tfe, $soffset", []
2299 bits<1> tfe;
2353 let offen = 0, idxen = 0, tfe = 0, vaddr = 0 in {
2369 let offen = 0, idxen = 0, addr64 = 1, tfe = 0 in {
2429 // FIXME: tfe can't be an operand because it requires a separate
[all …]
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| D | SIIntrinsics.td | 38 llvm_i32_ty], // tfe(imm)
52 llvm_i32_ty], // tfe(imm)
69 llvm_i32_ty, // tfe(imm)
84 llvm_i32_ty, // tfe(imm)
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| D | SIInstrFormats.td | 468 bits<1> tfe;
483 let Inst{55} = tfe;
499 bits<1> tfe;
515 let Inst{55} = tfe;
526 bits<1> tfe;
538 let Inst{16} = tfe;
555 bits<1> tfe;
565 let Inst{55} = tfe;
|
| D | SIInstructions.td | 2223 i32:$r128, i32:$da, i32:$glc, i32:$slc, i32:$tfe, i32:$lwe),
2225 (as_i1imm $r128), (as_i1imm $tfe), (as_i1imm $lwe), (as_i1imm $slc),
2240 i32:$r128, i32:$da, i32:$glc, i32:$slc, i32:$tfe, i32:$lwe),
2242 (as_i1imm $r128), (as_i1imm $tfe), (as_i1imm $lwe), (as_i1imm $slc),
2912 i16:$offset, i1:$glc, i1:$slc, i1:$tfe))),
2913 (Instr_ADDR64 $vaddr, $srsrc, $soffset, $offset, $glc, $slc, $tfe)
2945 imm:$tfe)),
2947 (as_i1imm $slc), (as_i1imm $tfe))
2953 imm:$tfe)),
2955 (as_i1imm $tfe))
[all …]
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| D | SIInstrInfo.cpp | 2192 = getNamedOperand(*MI, AMDGPU::OpName::tfe)) { in legalizeOperands()
|
| /external/apache-xml/src/main/java/org/apache/xalan/processor/ |
| D | ProcessorStylesheetElement.java | 76 catch(TransformerConfigurationException tfe) in startElement()
78 throw new TransformerException(tfe); in startElement()
|
| D | ProcessorLRE.java | 95 catch(TransformerConfigurationException tfe) in startElement()
97 throw new TransformerException(tfe); in startElement()
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | SIInstrInfo.td | 448 i1imm:$tfe, i1imm:$lwe, i1imm:$slc, VReg_128:$vaddr,
459 i1imm:$tfe, SReg_32:$soffset),
470 i1imm:$slc, i1imm:$tfe, SReg_32:$soffset),
481 GPR4Align<SReg_128>:$srsrc, i1imm:$slc, i1imm:$tfe, SReg_32:$soffset),
|
| /external/libvpx/libvpx/vpx_dsp/x86/ |
| D | loopfilter_mmx.asm | 114 pand mm2, [GLOBAL(tfe)] ; set lsb of each byte to zero
598 tfe: label
|
| /external/libvpx/libvpx/vp8/common/x86/ |
| D | vp8_loopfilter_mmx.asm | 114 pand mm2, [GLOBAL(tfe)] ; set lsb of each byte to zero
706 pand mm2, [GLOBAL(tfe)] ; set lsb of each byte to zero
1418 pand mm1, [GLOBAL(tfe)] ; set lsb of each byte to zero
1725 tfe: label
|
| D | loopfilter_sse2.asm | 142 pand xmm2, [GLOBAL(tfe)] ; set lsb of each byte to zero
843 pand xmm5, [GLOBAL(tfe)] ; set lsb of each byte to zero
1283 movdqa xmm6, [GLOBAL(tfe)]
1612 tfe: label
|
| D | loopfilter_block_sse2_x86_64.asm | 50 pand %3, [GLOBAL(tfe)]
799 tfe: label
|
| /external/robolectric/v3/libs/ |
| D | vtd-xml-2.11.jar | META-INF/
META-INF/MANIFEST.MF
com/
com/ximpleware/
com/ ... |
| /external/hyphenation-patterns/hu/ |
| D | hyph-hu.pat.txt | 2051 ag1átfe
20309 2gátfe
26556 2j1átfe
57371 2v1átfe
|