| /external/libdrm/radeon/ |
| D | radeon_cs_space.c | 47 uint32_t read_domains, write_domain; in radeon_cs_setup_bo() local
53 write_domain = sc->write_domain; in radeon_cs_setup_bo()
57 bo->space_accounted = sc->new_accounted = (read_domains << 16) | write_domain; in radeon_cs_setup_bo()
62 if (write_domain && (write_domain == bo->space_accounted)) { in radeon_cs_setup_bo()
72 if (write_domain) { in radeon_cs_setup_bo()
73 if (write_domain == RADEON_GEM_DOMAIN_VRAM) in radeon_cs_setup_bo()
75 else if (write_domain == RADEON_GEM_DOMAIN_GTT) in radeon_cs_setup_bo()
77 sc->new_accounted = write_domain; in radeon_cs_setup_bo()
88 if (write_domain && (old_read & write_domain)) { in radeon_cs_setup_bo()
89 sc->new_accounted = write_domain; in radeon_cs_setup_bo()
[all …]
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| D | radeon_cs_gem.c | 68 uint32_t write_domain; member
178 uint32_t write_domain, in cs_gem_write_reloc() argument
190 if ((read_domain && write_domain) || (!read_domain && !write_domain)) { in cs_gem_write_reloc()
199 if (write_domain == RADEON_GEM_DOMAIN_CPU) { in cs_gem_write_reloc()
220 if (write_domain && (reloc->read_domain & write_domain)) { in cs_gem_write_reloc()
222 reloc->write_domain = write_domain; in cs_gem_write_reloc()
223 } else if (read_domain & reloc->write_domain) { in cs_gem_write_reloc()
226 if (write_domain != reloc->write_domain) in cs_gem_write_reloc()
233 reloc->write_domain |= write_domain; in cs_gem_write_reloc()
267 reloc->write_domain = write_domain; in cs_gem_write_reloc()
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| D | radeon_cs.h | 44 uint32_t write_domain; member
86 uint32_t write_domain,
99 uint32_t write_domain);
113 uint32_t write_domain);
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| D | radeon_cs_int.h | 8 uint32_t write_domain; member
41 uint32_t write_domain,
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| D | radeon_cs.c | 18 uint32_t read_domain, uint32_t write_domain, in radeon_cs_write_reloc() argument
26 write_domain, in radeon_cs_write_reloc()
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| D | radeon_bo_gem.c | 347 radeon_gem_set_domain(struct radeon_bo *bo, uint32_t read_domains, uint32_t write_domain) in radeon_gem_set_domain() argument
355 args.write_domain = write_domain; in radeon_gem_set_domain()
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| D | radeon_bo_gem.h | 42 int radeon_gem_set_domain(struct radeon_bo *bo, uint32_t read_domains, uint32_t write_domain);
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| /external/mesa3d/src/gallium/winsys/i915/drm/ |
| D | i915_drm_batchbuffer.c | 101 unsigned write_domain = 0; in i915_drm_batchbuffer_reloc() local
108 write_domain = 0; in i915_drm_batchbuffer_reloc()
112 write_domain = I915_GEM_DOMAIN_RENDER; in i915_drm_batchbuffer_reloc()
116 write_domain = I915_GEM_DOMAIN_RENDER; in i915_drm_batchbuffer_reloc()
120 write_domain = 0; in i915_drm_batchbuffer_reloc()
124 write_domain = 0; in i915_drm_batchbuffer_reloc()
138 write_domain); in i915_drm_batchbuffer_reloc()
143 write_domain); in i915_drm_batchbuffer_reloc()
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| /external/mesa3d/src/mesa/drivers/dri/intel/ |
| D | intel_batchbuffer.h | 52 uint32_t write_domain,
57 uint32_t write_domain,
159 #define OUT_RELOC(buf, read_domains, write_domain, delta) do { \ argument
161 read_domains, write_domain, delta); \
163 #define OUT_RELOC_FENCED(buf, read_domains, write_domain, delta) do { \ argument
165 read_domains, write_domain, delta); \
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| D | intel_batchbuffer.c | 268 uint32_t read_domains, uint32_t write_domain, in intel_batchbuffer_emit_reloc() argument
275 read_domains, write_domain); in intel_batchbuffer_emit_reloc()
293 uint32_t write_domain, in intel_batchbuffer_emit_reloc_fenced() argument
300 read_domains, write_domain); in intel_batchbuffer_emit_reloc_fenced()
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| /external/libdrm/intel/ |
| D | intel_bufmgr.c | 205 uint32_t read_domains, uint32_t write_domain) in drm_intel_bo_emit_reloc() argument
209 read_domains, write_domain); in drm_intel_bo_emit_reloc()
216 uint32_t read_domains, uint32_t write_domain) in drm_intel_bo_emit_reloc_fence() argument
220 read_domains, write_domain); in drm_intel_bo_emit_reloc_fence()
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| D | intel_bufmgr_priv.h | 190 uint32_t read_domains, uint32_t write_domain);
195 uint32_t write_domain);
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| D | intel_bufmgr_fake.c | 89 uint32_t write_domain; member
206 uint32_t write_domain; member
1256 uint32_t read_domains, uint32_t write_domain) in drm_intel_fake_emit_reloc() argument
1291 r->write_domain = write_domain; in drm_intel_fake_emit_reloc()
1328 target_fake->write_domain |= r->write_domain; in drm_intel_fake_calculate_domains()
1376 if (bo_fake->write_domain != 0) { in drm_intel_fake_reloc_and_validate_buffer()
1413 bo_fake->write_domain = 0; in drm_intel_bo_fake_post_submit()
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| D | intel_bufmgr_gem.c | 1464 set_domain.write_domain = I915_GEM_DOMAIN_CPU; in drm_intel_gem_bo_map()
1466 set_domain.write_domain = 0; in drm_intel_gem_bo_map()
1577 set_domain.write_domain = I915_GEM_DOMAIN_GTT; in drm_intel_gem_bo_map_gtt()
1869 set_domain.write_domain = write_enable ? I915_GEM_DOMAIN_GTT : 0; in drm_intel_gem_bo_start_gtt_access()
1876 set_domain.read_domains, set_domain.write_domain, in drm_intel_gem_bo_start_gtt_access()
1936 uint32_t read_domains, uint32_t write_domain, in do_bo_emit_reloc() argument
1969 assert((write_domain & (write_domain - 1)) == 0); in do_bo_emit_reloc()
2003 bo_gem->relocs[bo_gem->reloc_count].write_domain = write_domain; in do_bo_emit_reloc()
2058 uint32_t read_domains, uint32_t write_domain) in drm_intel_gem_bo_emit_reloc() argument
2067 read_domains, write_domain, in drm_intel_gem_bo_emit_reloc()
[all …]
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| D | intel_bufmgr.h | 153 uint32_t read_domains, uint32_t write_domain);
157 uint32_t read_domains, uint32_t write_domain);
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| /external/mesa3d/src/mesa/drivers/dri/i915/ |
| D | intel_batchbuffer.c | 268 uint32_t read_domains, uint32_t write_domain, in intel_batchbuffer_emit_reloc() argument
275 read_domains, write_domain); in intel_batchbuffer_emit_reloc()
293 uint32_t write_domain, in intel_batchbuffer_emit_reloc_fenced() argument
300 read_domains, write_domain); in intel_batchbuffer_emit_reloc_fenced()
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| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | intel_batchbuffer.c | 268 uint32_t read_domains, uint32_t write_domain, in intel_batchbuffer_emit_reloc() argument
275 read_domains, write_domain); in intel_batchbuffer_emit_reloc()
293 uint32_t write_domain, in intel_batchbuffer_emit_reloc_fenced() argument
300 read_domains, write_domain); in intel_batchbuffer_emit_reloc_fenced()
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| D | gen7_blorp.cpp | 139 uint32_t read_domains, uint32_t write_domain, in gen7_blorp_emit_surface_state() argument
213 read_domains, write_domain); in gen7_blorp_emit_surface_state()
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| /external/mesa3d/src/gallium/winsys/radeon/drm/ |
| D | radeon_drm_cs.c | 204 *added_domains = (rd | wd) & ~(reloc->read_domains | reloc->write_domain); in update_reloc_domains()
207 reloc->write_domain |= wd; in update_reloc_domains()
302 reloc->write_domain = wd; in radeon_add_reloc()
548 if ((usage & RADEON_USAGE_WRITE) && cs->csc->relocs[index].write_domain) in radeon_bo_is_referenced()
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| D | radeon_drm_cs.h | 112 return cs->csc->relocs[index].write_domain != 0; in radeon_bo_is_referenced_by_cs_for_write()
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| /external/drm_gralloc/ |
| D | gralloc_drm_intel.c | 102 uint32_t read_domains, uint32_t write_domain) in batch_reloc() argument
109 target->ibo, 0, read_domains, write_domain); in batch_reloc()
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| /external/kernel-headers/original/uapi/drm/ |
| D | i915_drm.h | 540 __u32 write_domain; member
590 __u32 write_domain; member
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| D | radeon_drm.h | 875 uint32_t write_domain; member
975 uint32_t write_domain; member
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| /external/libdrm/include/drm/ |
| D | i915_drm.h | 541 __u32 write_domain; member
591 __u32 write_domain; member
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| D | radeon_drm.h | 851 uint32_t write_domain; member
950 uint32_t write_domain; member
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