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Searched refs:BW (Results 1 – 14 of 14) sorted by relevance

/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
Dx86-64-avx512bw_vl.s1 # Check 64bit AVX512{BW,VL} instructions
6 vpabsb %xmm29, %xmm30 # AVX512{BW,VL}
7 vpabsb %xmm29, %xmm30{%k7} # AVX512{BW,VL}
8 vpabsb %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
9 vpabsb (%rcx), %xmm30 # AVX512{BW,VL}
10 vpabsb 0x123(%rax,%r14,8), %xmm30 # AVX512{BW,VL}
11 vpabsb 2032(%rdx), %xmm30 # AVX512{BW,VL} Disp8
12 vpabsb 2048(%rdx), %xmm30 # AVX512{BW,VL}
13 vpabsb -2048(%rdx), %xmm30 # AVX512{BW,VL} Disp8
14 vpabsb -2064(%rdx), %xmm30 # AVX512{BW,VL}
[all …]
Dx86-64-avx512bw_vl-wig.s1 # Check 64bit AVX512{BW,VL} WIG instructions
6 vpabsb %xmm29, %xmm30 # AVX512{BW,VL}
7 vpabsb %xmm29, %xmm30{%k7} # AVX512{BW,VL}
8 vpabsb %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
9 vpabsb (%rcx), %xmm30 # AVX512{BW,VL}
10 vpabsb 0x123(%rax,%r14,8), %xmm30 # AVX512{BW,VL}
11 vpabsb 2032(%rdx), %xmm30 # AVX512{BW,VL} Disp8
12 vpabsb 2048(%rdx), %xmm30 # AVX512{BW,VL}
13 vpabsb -2048(%rdx), %xmm30 # AVX512{BW,VL} Disp8
14 vpabsb -2064(%rdx), %xmm30 # AVX512{BW,VL}
[all …]
Davx512bw_vl.s1 # Check 32bit AVX512{BW,VL} instructions
6 vpabsb %xmm5, %xmm6{%k7} # AVX512{BW,VL}
7 vpabsb %xmm5, %xmm6{%k7}{z} # AVX512{BW,VL}
8 vpabsb (%ecx), %xmm6{%k7} # AVX512{BW,VL}
9 vpabsb -123456(%esp,%esi,8), %xmm6{%k7} # AVX512{BW,VL}
10 vpabsb 2032(%edx), %xmm6{%k7} # AVX512{BW,VL} Disp8
11 vpabsb 2048(%edx), %xmm6{%k7} # AVX512{BW,VL}
12 vpabsb -2048(%edx), %xmm6{%k7} # AVX512{BW,VL} Disp8
13 vpabsb -2064(%edx), %xmm6{%k7} # AVX512{BW,VL}
14 vpabsb %ymm5, %ymm6{%k7} # AVX512{BW,VL}
[all …]
Davx512bw_vl-wig.s1 # Check 32bit AVX512{BW,VL} WIG instructions
6 vpabsb %xmm5, %xmm6{%k7} # AVX512{BW,VL}
7 vpabsb %xmm5, %xmm6{%k7}{z} # AVX512{BW,VL}
8 vpabsb (%ecx), %xmm6{%k7} # AVX512{BW,VL}
9 vpabsb -123456(%esp,%esi,8), %xmm6{%k7} # AVX512{BW,VL}
10 vpabsb 2032(%edx), %xmm6{%k7} # AVX512{BW,VL} Disp8
11 vpabsb 2048(%edx), %xmm6{%k7} # AVX512{BW,VL}
12 vpabsb -2048(%edx), %xmm6{%k7} # AVX512{BW,VL} Disp8
13 vpabsb -2064(%edx), %xmm6{%k7} # AVX512{BW,VL}
14 vpabsb %ymm5, %ymm6{%k7} # AVX512{BW,VL}
[all …]
Dx86-64-avx512bw_vl-opts.s1 # Check 64bit AVX512{BW,VL} swap instructions
6 vmovdqu8 %xmm29, %xmm30 # AVX512{BW,VL}
7 vmovdqu8.s %xmm29, %xmm30 # AVX512{BW,VL}
8 vmovdqu8 %xmm29, %xmm30{%k7} # AVX512{BW,VL}
9 vmovdqu8.s %xmm29, %xmm30{%k7} # AVX512{BW,VL}
10 vmovdqu8 %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
11 vmovdqu8.s %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
12 vmovdqu8 %xmm29, %xmm30 # AVX512{BW,VL}
13 vmovdqu8.s %xmm29, %xmm30 # AVX512{BW,VL}
14 vmovdqu8 %xmm29, %xmm30{%k7} # AVX512{BW,VL}
[all …]
Davx512bw_vl-opts.s1 # Check 32bit AVX512{BW,VL} swap instructions
6 vmovdqu8 %xmm5, %xmm6{%k7} # AVX512{BW,VL}
7 vmovdqu8.s %xmm5, %xmm6{%k7} # AVX512{BW,VL}
8 vmovdqu8 %xmm5, %xmm6{%k7}{z} # AVX512{BW,VL}
9 vmovdqu8.s %xmm5, %xmm6{%k7}{z} # AVX512{BW,VL}
10 vmovdqu8 %xmm5, %xmm6{%k7} # AVX512{BW,VL}
11 vmovdqu8.s %xmm5, %xmm6{%k7} # AVX512{BW,VL}
12 vmovdqu8 %xmm5, %xmm6{%k7}{z} # AVX512{BW,VL}
13 vmovdqu8.s %xmm5, %xmm6{%k7}{z} # AVX512{BW,VL}
14 vmovdqu8 %ymm5, %ymm6{%k7} # AVX512{BW,VL}
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/cris/
Dbwtest-err-1.s65 ; best I could get without major changes in BW-handling. Not
/toolchain/binutils/binutils-2.25/cpu/
Dcris.cpu2034 (BW)
2036 ((BW tmpops) (SI newval))
2062 (BW)
2064 ((BW tmpops) (SI newval))
2432 (BW)
2435 Rd ((.sym BW -ext) (cris-get-mem BW Rs)) cbit cbit))
2463 (BW)
2466 Rd ((.sym BW -zext) (cris-get-mem BW Rs)) cbit cbit))
2512 (BW)
2515 (set tmp (ext SI (cris-get-mem BW Rs)))
[all …]
Dm32c.cpu7273 ; add.BW:Q #imm4,sp (m16 #7)
7278 ; add.BW:G #imm,sp (m16 #6)
7280 ; add.BW:G src,dst (m16 #4 m32 #6)
7294 ; add.BW:S #imm,dst2 (m32 #4)
7317 ; adc.BW:G src,dst
7379 ; dadc.BW src,dst
7397 ; dadd.BW src,dst
7450 ; and.BW:G src,dst (m16 #3 m32 #3)
7454 ; and.BW:S #imm,dst2 (m32 #2)
7737 ; cmp.BW:G src,dst (m16 #4 m32 #5)
[all …]
DChangeLog422 (not.BW:G, push.BW:G): Call it.
435 (mov.BW:S r0,r1): Fix typo r1l->r1.
/toolchain/binutils/binutils-2.25/opcodes/
Dmsp430-decode.opc93 #define BW(x) msp430->size = (x ? 8 : 16)
359 opcode:4 sreg:4 Ad:1 BW:1 As:2 Dreg:4
362 opcode:9 BW:1 Ad:2 DSreg:4
Dmsp430-decode.c94 #define BW(x) msp430->size = (x ? 8 : 16) macro
Drx-decode.opc86 /* This is for the BWL and BW bitfields. */
/toolchain/binutils/binutils-2.25/binutils/
DChangeLog-91975081 * m68k-pinsn.c (print_insn_arg): Support BB/BW/BL