12014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
2
3	* or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
4
52014-06-12  Alan Modra  <amodra@gmail.com>
6
7	* or1k.opc: Whitespace fixes.
8
92014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
10
11	* or1korbis.cpu (h-atomic-reserve): New hardware.
12	(h-atomic-address): Likewise.
13	(insn-opcode): Add opcodes for LWA and SWA.
14	(atomic-reserve): New operand.
15	(atomic-address): Likewise.
16	(l-lwa, l-swa): New instructions.
17	(l-lbs): Fix typo in comment.
18	(store-insn): Clear atomic reserve on store to atomic-address.
19	Fix register names in fmt field.
20
212014-04-22  Christian Svensson  <blue@cmd.nu>
22
23	* openrisc.cpu: Delete.
24	* openrisc.opc: Delete.
25	* or1k.cpu: New file.
26	* or1k.opc: New file.
27	* or1kcommon.cpu: New file.
28	* or1korbis.cpu: New file.
29	* or1korfpx.cpu: New file.
30
312013-12-07  Mike Frysinger  <vapier@gentoo.org>
32
33	* epiphany.opc: Remove +x file mode.
34
352013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
36
37	PR binutils/15241
38	* lm32.cpu (Control and status registers): Add CFG2, PSW,
39	TLBVADDR, TLBPADDR and TLBBADVADDR.
40
412012-11-30  Oleg Raikhman  <oleg@adapteva.com>
42	    Joern Rennecke  <joern.rennecke@embecosm.com>
43
44	* epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
45	(load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
46	(testset-insn): Add NO_DIS attribute to t.l.
47	(store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
48	(move-insns): Add NO-DIS attribute to cmov.l.
49	(op-mmr-movts): Add NO-DIS attribute to movts.l.
50	(op-mmr-movfs): Add NO-DIS attribute to movfs.l.
51	(op-rrr): Add NO-DIS attribute to .l.
52	(shift-rrr): Add NO-DIS attribute to .l.
53	(op-shift-rri): Add NO-DIS attribute to i32.l.
54	(bitrl, movtl): Add NO-DIS attribute.
55	(op-iextrrr): Add NO-DIS attribute to .l
56	(op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
57	(op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
58
592012-02-27  Alan Modra  <amodra@gmail.com>
60
61	* mt.opc (print_dollarhex): Trim values to 32 bits.
62
632011-12-15  Nick Clifton  <nickc@redhat.com>
64
65	* frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
66	hosts.
67
682011-10-26  Joern Rennecke  <joern.rennecke@embecosm.com>
69
70	* epiphany.opc (parse_branch_addr): Fix type of valuep.
71	Cast value before printing it as a long.
72	(parse_postindex): Fix type of valuep.
73
742011-10-25  Joern Rennecke  <joern.rennecke@embecosm.com>
75
76	* cpu/epiphany.cpu: New file.
77	* cpu/epiphany.opc: New file.
78
792011-08-22  Nick Clifton  <nickc@redhat.com>
80
81	* fr30.cpu: Newly contributed file.
82	* fr30.opc: Likewise.
83	* ip2k.cpu: Likewise.
84	* ip2k.opc: Likewise.
85	* mep-avc.cpu: Likewise.
86	* mep-avc2.cpu: Likewise.
87	* mep-c5.cpu: Likewise.
88	* mep-core.cpu: Likewise.
89	* mep-default.cpu: Likewise.
90	* mep-ext-cop.cpu: Likewise.
91	* mep-fmax.cpu: Likewise.
92	* mep-h1.cpu: Likewise.
93	* mep-ivc2.cpu: Likewise.
94	* mep-rhcop.cpu: Likewise.
95	* mep-sample-ucidsp.cpu: Likewise.
96	* mep.cpu: Likewise.
97	* mep.opc: Likewise.
98	* openrisc.cpu: Likewise.
99	* openrisc.opc: Likewise.
100	* xstormy16.cpu: Likewise.
101	* xstormy16.opc: Likewise.
102
1032010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
104
105	* frv.opc: #undef DEBUG.
106
1072010-07-03  DJ Delorie  <dj@delorie.com>
108
109	* m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
110
1112010-02-11  Doug Evans  <dje@sebabeach.org>
112
113	* m32r.cpu (HASH-PREFIX): Delete.
114	(duhpo, dshpo): New pmacros.
115	(simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
116	(uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
117	attribute, define with dshpo.
118	(uimm24): Delete HASH-PREFIX attribute.
119	* m32r.opc (CGEN_PRINT_NORMAL): Delete.
120	(print_signed_with_hash_prefix): New function.
121	(print_unsigned_with_hash_prefix): New function.
122	* xc16x.cpu (dowh): New pmacro.
123	(upof16): Define with dowh, specify print handler.
124	(qbit, qlobit, qhibit): Ditto.
125	(upag16): Ditto.
126	* xc16x.opc (CGEN_PRINT_NORMAL): Delete.
127	(print_with_dot_prefix): New functions.
128	(print_with_pof_prefix, print_with_pag_prefix): New functions.
129
1302010-01-24  Doug Evans  <dje@sebabeach.org>
131
132	* frv.cpu (floating-point-conversion): Update call to fp conv op.
133	(floating-point-dual-conversion, ne-floating-point-dual-conversion,
134	conditional-floating-point-conversion, ne-floating-point-conversion,
135	float-parallel-mul-add-double-semantics): Ditto.
136
1372010-01-05  Doug Evans  <dje@sebabeach.org>
138
139	* m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
140	(f-dsp-40-u20, f-dsp-40-u24): Ditto.
141
1422010-01-02  Doug Evans  <dje@sebabeach.org>
143
144	* m32c.opc (parse_signed16): Fix typo.
145
1462009-12-11  Nick Clifton  <nickc@redhat.com>
147
148	* frv.opc: Fix shadowed variable warnings.
149	* m32c.opc: Fix shadowed variable warnings.
150
1512009-11-14  Doug Evans  <dje@sebabeach.org>
152
153	Must use VOID expression in VOID context.
154	* xc16x.cpu (mov4): Fix mode of `sequence'.
155	(mov9, mov10): Ditto.
156	(movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
157	(callr, callseg, calls, trap, rets, reti): Ditto.
158	(jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
159	(atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
160	(exts, exts1, extsr, extsr1, prior): Ditto.
161
1622009-10-23  Doug Evans  <dje@sebabeach.org>
163
164	* m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
165	cgen-ops.h -> cgen/basic-ops.h.
166
1672009-09-25  Alan Modra  <amodra@bigpond.net.au>
168
169	* m32r.cpu (stb-plus): Typo fix.
170
1712009-09-23  Doug Evans  <dje@sebabeach.org>
172
173	* m32r.cpu (sth-plus): Fix address mode and calculation.
174	(stb-plus): Ditto.
175	(clrpsw): Fix mask calculation.
176	(bset, bclr, btst): Make mode in bit calculation match expression.
177
178	* xc16x.cpu (rtl-version): Set to 0.8.
179	(gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
180	make uppercase.  Remove unnecessary name-prefix spec.
181	(grb-names, conditioncode-names, extconditioncode-names): Ditto.
182	(grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
183	(reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
184	(h-cr): New hardware.
185	(muls): Comment out parts that won't compile, add fixme.
186	(mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
187	(scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
188	(bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
189
1902009-07-16  Doug Evans  <dje@sebabeach.org>
191
192	* cpu/simplify.inc (*): One line doc strings don't need \n.
193	(df): Invoke define-full-ifield instead of claiming it's an alias.
194	(dno): Define.
195	(dnop): Mark as deprecated.
196
1972009-06-22  Alan Modra  <amodra@bigpond.net.au>
198
199	* m32c.opc (parse_lab_5_3): Use correct enum.
200
2012009-01-07  Hans-Peter Nilsson  <hp@axis.com>
202
203	* frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
204	(DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
205	(media-arith-sat-semantics): Explicitly sign- or zero-extend
206	arguments of "operation" to DI using "mode" and the new pmacros.
207
2082009-01-03  Hans-Peter Nilsson  <hp@axis.com>
209
210	* cris.cpu (cris-implemented-writable-specregs-v32): Correct size
211	of number 2, PID.
212
2132008-12-23  Jon Beniston <jon@beniston.com>
214
215	* lm32.cpu: New file.
216	* lm32.opc: New file.
217
2182008-01-29  Alan Modra  <amodra@bigpond.net.au>
219
220	* mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
221	to source.
222
2232007-10-22  Hans-Peter Nilsson  <hp@axis.com>
224
225	* cris.cpu (movs, movu): Use result of extension operation when
226	updating flags.
227
2282007-07-04  Nick Clifton  <nickc@redhat.com>
229
230	* cris.cpu: Update copyright notice to refer to GPLv3.
231	* frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
232	m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
233	sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
234	xc16x.opc: Likewise.
235	* iq2000.cpu: Fix copyright notice to refer to FSF.
236
2372007-04-30  Mark Salter  <msalter@sadr.localdomain>
238
239	* frv.cpu (spr-names): Support new coprocessor SPR registers.
240
2412007-04-20  Nick Clifton  <nickc@redhat.com>
242
243	* xc16x.cpu: Restore after accidentally overwriting this file with
244	xc16x.opc.
245
2462007-03-29  DJ Delorie  <dj@redhat.com>
247
248	* m32c.cpu (Imm-8-s4n): Fix print hook.
249	(Lab-24-8, Lab-32-8, Lab-40-8): Fix.
250	(arith-jnz-imm4-dst-defn): Make relaxable.
251	(arith-jnz16-imm4-dst-defn): Fix encodings.
252
2532007-03-20  DJ Delorie  <dj@redhat.com>
254
255	* m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
256	mem20): New.
257	(src16-16-20-An-relative-*): New.
258	(dst16-*-20-An-relative-*): New.
259	(dst16-16-16sa-*): New
260	(dst16-16-16ar-*): New
261	(dst32-16-16sa-Unprefixed-*): New
262	(jsri): Fix operands.
263	(setzx): Fix encoding.
264
2652007-03-08  Alan Modra  <amodra@bigpond.net.au>
266
267	* m32r.opc: Formatting.
268
2692006-05-22  Nick Clifton  <nickc@redhat.com>
270
271	* iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
272
2732006-04-10  DJ Delorie  <dj@redhat.com>
274
275	* m32c.opc (parse_unsigned_bitbase): Take a new parameter which
276	decides if this function accepts symbolic constants or not.
277	(parse_signed_bitbase): Likewise.
278	(parse_unsigned_bitbase8): Pass the new parameter.
279	(parse_unsigned_bitbase11): Likewise.
280	(parse_unsigned_bitbase16): Likewise.
281	(parse_unsigned_bitbase19): Likewise.
282	(parse_unsigned_bitbase27): Likewise.
283	(parse_signed_bitbase8): Likewise.
284	(parse_signed_bitbase11): Likewise.
285	(parse_signed_bitbase19): Likewise.
286
2872006-03-13  DJ Delorie  <dj@redhat.com>
288
289	* m32c.cpu (Bit3-S): New.
290	(btst:s): New.
291	* m32c.opc (parse_bit3_S): New.
292
293	* m32c.cpu (decimal-subtraction16-insn): Add second operand.
294	(btst): Add optional :G suffix for MACH32.
295	(or.b:S): New.
296	(pop.w:G): Add optional :G suffix for MACH16.
297	(push.b.imm): Fix syntax.
298
2992006-03-10  DJ Delorie  <dj@redhat.com>
300
301	* m32c.cpu (mul.l): New.
302	(mulu.l): New.
303
3042006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
305
306	* xc16x.opc (parse_hash): Return NULL if the input was parsed or
307	an error message otherwise.
308	(parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
309	Fix up comments to correctly describe the functions.
310
3112006-02-24  DJ Delorie  <dj@redhat.com>
312
313	* m32c.cpu (RL_TYPE): New attribute, with macros.
314	(Lab-8-24): Add RELAX.
315	(unary-insn-defn-g, binary-arith-imm-dst-defn,
316	binary-arith-imm4-dst-defn): Add 1ADDR attribute.
317	(binary-arith-src-dst-defn): Add 2ADDR attribute.
318	(jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
319	jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
320	attribute.
321	(jsri16, jsri32): Add 1ADDR attribute.
322	(jsr32.w, jsr32.a): Add JUMP attribute.
323
3242006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
325            Anil Paranjape   <anilp1@kpitcummins.com>
326            Shilin Shakti    <shilins@kpitcummins.com>
327
328	* xc16x.cpu: New file containing complete CGEN specific XC16X CPU
329	description.
330	* xc16x.opc: New file containing supporting XC16C routines.
331
3322006-02-10  Nick Clifton  <nickc@redhat.com>
333
334	* iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
335
3362006-01-06  DJ Delorie  <dj@redhat.com>
337
338	* m32c.cpu (mov.w:q): Fix mode.
339	(push32.b.imm): Likewise, for the comment.
340
3412005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
342
343	Second part of ms1 to mt renaming.
344	* mt.cpu (define-arch, define-isa): Set name to mt.
345	(define-mach): Adjust.
346	* mt.opc (CGEN_ASM_HASH): Update.
347	(mt_asm_hash, mt_cgen_insn_supported): Renamed.
348	(parse_loopsize, parse_imm16): Adjust.
349
3502005-12-13  DJ Delorie  <dj@redhat.com>
351
352	* m32c.cpu (jsri): Fix order so register names aren't treated as
353	symbols.
354	(indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
355	indexwd, indexws): Fix encodings.
356
3572005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
358
359	* mt.cpu: Rename from ms1.cpu.
360	* mt.opc: Rename from ms1.opc.
361
3622005-12-06  Hans-Peter Nilsson  <hp@axis.com>
363
364	* cris.cpu (simplecris-common-writable-specregs)
365	(simplecris-common-readable-specregs): Split from
366	simplecris-common-specregs.  All users changed.
367	(cris-implemented-writable-specregs-v0)
368	(cris-implemented-readable-specregs-v0): Similar from
369	cris-implemented-specregs-v0.
370	(cris-implemented-writable-specregs-v3)
371	(cris-implemented-readable-specregs-v3)
372	(cris-implemented-writable-specregs-v8)
373	(cris-implemented-readable-specregs-v8)
374	(cris-implemented-writable-specregs-v10)
375	(cris-implemented-readable-specregs-v10)
376	(cris-implemented-writable-specregs-v32)
377	(cris-implemented-readable-specregs-v32): Similar.
378	(bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
379	insns and specializations.
380
3812005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
382
383	Add ms2
384	* ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
385	model.
386	(f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
387	f-cb2incr, f-rc3): New fields.
388	(LOOP): New instruction.
389	(JAL-HAZARD): New hazard.
390	(imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
391	New operands.
392	(mul, muli, dbnz, iflush): Enable for ms2
393	(jal, reti): Has JAL-HAZARD.
394	(ldctxt, ldfb, stfb): Only ms1.
395	(fbcb): Only ms1,ms1-003.
396	(wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
397	fbcbincrs, mfbcbincrs): Enable for ms2.
398	(loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
399	* ms1.opc (parse_loopsize): New.
400	(parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
401	(print_pcrel): New.
402
4032005-10-28  Dave Brolley  <brolley@redhat.com>
404
405	Contribute the following change:
406	2003-09-24  Dave Brolley  <brolley@redhat.com>
407
408	* frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
409	CGEN_ATTR_VALUE_TYPE.
410	* m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
411	Use cgen_bitset_intersect_p.
412
4132005-10-27  DJ Delorie  <dj@redhat.com>
414
415	* m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
416	(arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
417	arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
418	imm operand is needed.
419	(adjnz, sbjnz): Pass the right operands.
420	(unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
421	unary-insn): Add -g variants for opcodes that need to support :G.
422	(not.BW:G, push.BW:G): Call it.
423	(stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
424	stzx16-imm8-imm8-abs16): Fix operand typos.
425	* m32c.opc (m32c_asm_hash): Support bnCND.
426	(parse_signed4n, print_signed4n): New.
427
4282005-10-26  DJ Delorie  <dj@redhat.com>
429
430	* m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
431	(mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
432	mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
433	dsp8[sp] is signed.
434	(mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
435	(mov.BW:S r0,r1): Fix typo r1l->r1.
436	(tst): Allow :G suffix.
437	* m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
438
4392005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
440
441	* m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
442
4432005-10-25  DJ Delorie  <dj@redhat.com>
444
445	* m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
446	making one a macro of the other.
447
4482005-10-21  DJ Delorie  <dj@redhat.com>
449
450	* m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
451	(indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
452	indexld, indexls): .w variants have `1' bit.
453	(rot32.b): QI, not SI.
454	(rot32.w): HI, not SI.
455	(xchg16): HI for .w variant.
456
4572005-10-19  Nick Clifton  <nickc@redhat.com>
458
459	* m32r.opc (parse_slo16): Fix bad application of previous patch.
460
4612005-10-18  Andreas Schwab  <schwab@suse.de>
462
463	* m32r.opc (parse_slo16): Better version of previous patch.
464
4652005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
466
467	* cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
468	size.
469
4702005-07-25  DJ Delorie  <dj@redhat.com>
471
472	* m32c.opc (parse_unsigned8): Add %dsp8().
473	(parse_signed8): Add %hi8().
474	(parse_unsigned16): Add %dsp16().
475	(parse_signed16): Add %lo16() and %hi16().
476	(parse_lab_5_3): Make valuep a bfd_vma *.
477
4782005-07-18  Nick Clifton  <nickc@redhat.com>
479
480	* m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
481	components.
482	(f-lab32-jmp-s): Fix insertion sequence.
483	(Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
484	(Dsp-40-s8): Make parameter be signed.
485	(Dsp-40-s16): Likewise.
486	(Dsp-48-s8): Likewise.
487	(Dsp-48-s16): Likewise.
488	(Imm-13-u3): Likewise. (Despite its name!)
489	(BitBase16-16-s8): Make the parameter be unsigned.
490	(BitBase16-8-u11-S): Likewise.
491	(Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
492	jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
493	relaxation.
494
495	* m32c.opc: Fix formatting.
496	Use safe-ctype.h instead of ctype.h
497	Move duplicated code sequences into a macro.
498	Fix compile time warnings about signedness mismatches.
499	Remove dead code.
500	(parse_lab_5_3): New parser function.
501
5022005-07-16  Jim Blandy  <jimb@redhat.com>
503
504	* m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
505	to represent isa sets.
506
5072005-07-15  Jim Blandy  <jimb@redhat.com>
508
509	* m32c.cpu, m32c.opc: Fix copyright.
510
5112005-07-14  Jim Blandy  <jimb@redhat.com>
512
513	* m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
514
5152005-07-14  Alan Modra  <amodra@bigpond.net.au>
516
517	* ms1.opc (print_dollarhex): Correct format string.
518
5192005-07-06  Alan Modra  <amodra@bigpond.net.au>
520
521	* iq2000.cpu: Include from binutils cpu dir.
522
5232005-07-05  Nick Clifton  <nickc@redhat.com>
524
525	* iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
526	unsigned in order to avoid compile time warnings about sign
527	conflicts.
528
529	* ms1.opc (parse_*): Likewise.
530	(parse_imm16): Use a "void *" as it is passed both signed and
531	unsigned arguments.
532
5332005-07-01  Nick Clifton  <nickc@redhat.com>
534
535	* frv.opc: Update to ISO C90 function declaration style.
536	* iq2000.opc: Likewise.
537	* m32r.opc: Likewise.
538	* sh.opc: Likewise.
539
5402005-06-15  Dave Brolley  <brolley@redhat.com>
541
542	Contributed by Red Hat.
543	* ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
544	* ms1.opc: New file.  Written by Stan Cox.
545
5462005-05-10  Nick Clifton  <nickc@redhat.com>
547
548	* Update the address and phone number of the FSF organization in
549	the GPL notices in the following files:
550	cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
551	m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
552	sh64-media.cpu, simplify.inc
553
5542005-02-24  Alan Modra  <amodra@bigpond.net.au>
555
556	* frv.opc (parse_A): Warning fix.
557
5582005-02-23  Nick Clifton  <nickc@redhat.com>
559
560	* frv.opc: Fixed compile time warnings about differing signed'ness
561	of pointers passed to functions.
562	* m32r.opc: Likewise.
563
5642005-02-11  Nick Clifton  <nickc@redhat.com>
565
566	* iq2000.opc (parse_jtargq10): Change type of valuep argument to
567	'bfd_vma *' in order avoid compile time warning message.
568
5692005-01-28  Hans-Peter Nilsson  <hp@axis.com>
570
571	* cris.cpu (mstep): Add missing insn.
572
5732005-01-25  Alexandre Oliva  <aoliva@redhat.com>
574
575	2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
576	* frv.cpu: Add support for TLS annotations in loads and calll.
577	* frv.opc (parse_symbolic_address): New.
578	(parse_ldd_annotation): New.
579	(parse_call_annotation): New.
580	(parse_ld_annotation): New.
581	(parse_ulo16, parse_uslo16): Use parse_symbolic_address.
582	Introduce TLS relocations.
583	(parse_d12, parse_s12, parse_u12): Likewise.
584	(parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
585	(parse_call_label, print_at): New.
586
5872004-12-21  Mikael Starvik  <starvik@axis.com>
588
589	* cris.cpu (cris-set-mem): Correct integral write semantics.
590
5912004-11-29  Hans-Peter Nilsson  <hp@axis.com>
592
593	* cris.cpu: New file.
594
5952004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
596
597	* iq2000.cpu: Added quotes around macro arguments so that they
598	will work with newer versions of guile.
599
6002004-10-27  Nick Clifton  <nickc@redhat.com>
601
602	* iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
603	wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
604	operand.
605	* iq2000.cpu (dnop index): Rename to _index to avoid complications
606	with guile.
607
6082004-08-27  Richard Sandiford  <rsandifo@redhat.com>
609
610	* frv.cpu (cfmovs): Change UNIT attribute to FMALL.
611
6122004-05-15  Nick Clifton  <nickc@redhat.com>
613
614	* iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
615
6162004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
617
618	* m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
619
6202004-03-01  Richard Sandiford  <rsandifo@redhat.com>
621
622	* frv.cpu (define-arch frv): Add fr450 mach.
623	(define-mach fr450): New.
624	(define-model fr450): New.  Add profile units to every fr450 insn.
625	(define-attr UNIT): Add MDCUTSSI.
626	(define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
627	(define-attr AUDIO): New boolean.
628	(f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
629	(f-LRA-null, f-TLBPR-null): New fields.
630	(scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
631	(tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
632	(LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
633	(LRA-null, TLBPR-null): New macros.
634	(iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
635	(load-real-address): New macro.
636	(lrai, lrad, tlbpr): New instructions.
637	(media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
638	(mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
639	(mdcutssi): Change UNIT attribute to MDCUTSSI.
640	(media-low-clear-semantics, media-scope-limit-semantics)
641	(media-quad-limit, media-quad-shift): New macros.
642	(mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
643	* frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
644	(frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
645	(frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
646	(fr450_unit_mapping): New array.
647	(fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
648	for new MDCUTSSI unit.
649	(fr450_check_insn_major_constraints): New function.
650	(check_insn_major_constraints): Use it.
651
6522004-03-01  Richard Sandiford  <rsandifo@redhat.com>
653
654	* frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
655	(scutss): Change unit to I0.
656	(calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
657	(mqsaths): Fix FR400-MAJOR categorization.
658	(media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
659	(media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
660	* frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
661	combinations.
662
6632004-03-01  Richard Sandiford  <rsandifo@redhat.com>
664
665	* frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
666	(rstb, rsth, rst, rstd, rstq): Delete.
667	(rstbf, rsthf, rstf, rstdf, rstqf): Delete.
668
6692004-02-23  Nick Clifton  <nickc@redhat.com>
670
671	* Apply these patches from Renesas:
672
673	2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
674
675	* cpu/m32r.opc (my_print_insn): Fixed incorrect output when
676	disassembling codes for 0x*2 addresses.
677
678	2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
679
680	* cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
681
682	2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
683
684	* cpu/m32r.cpu : Add new model m32r2.
685	Add new instructions.
686	Replace occurrances of 'Mitsubishi' with 'Renesas'.
687	Changed PIPE attr of push from O to OS.
688	Care for Little-endian of M32R.
689	* cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
690	Care for Little-endian of M32R.
691	(parse_slo16): signed extension for value.
692
6932004-02-20  Andrew Cagney  <cagney@redhat.com>
694
695	* m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
696	Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
697
698	* sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
699	written by Ben Elliston.
700
7012004-01-14  Richard Sandiford  <rsandifo@redhat.com>
702
703	* frv.cpu (UNIT): Add IACC.
704	(iacc-multiply-r-r): Use it.
705	* frv.opc (fr400_unit_mapping): Add entry for IACC.
706	(fr500_unit_mapping, fr550_unit_mapping): Likewise.
707
7082004-01-06  Alexandre Oliva  <aoliva@redhat.com>
709
710	2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
711	* frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
712	cut&paste errors in shifting/truncating numerical operands.
713	2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
714	* frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
715	(parse_uslo16): Likewise.
716	(parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
717	(parse_d12): Parse gotoff12 and gotofffuncdesc12.
718	(parse_s12): Likewise.
719	2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
720	* frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
721	(parse_uslo16): Likewise.
722	(parse_uhi16): Parse gothi and gotfuncdeschi.
723	(parse_d12): Parse got12 and gotfuncdesc12.
724	(parse_s12): Likewise.
725
7262003-10-10  Dave Brolley  <brolley@redhat.com>
727
728	* frv.cpu (dnpmop): New p-macro.
729	(GRdoublek): Use dnpmop.
730	(CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
731	(store-double-r-r): Use (.sym regtype doublek).
732	(r-store-double): Ditto.
733	(store-double-r-r-u): Ditto.
734	(conditional-store-double): Ditto.
735	(conditional-store-double-u): Ditto.
736	(store-double-r-simm): Ditto.
737	(fmovs): Assign to UNIT FMALL.
738
7392003-10-06  Dave Brolley  <brolley@redhat.com>
740
741	* frv.cpu, frv.opc: Add support for fr550.
742
7432003-09-24  Dave Brolley  <brolley@redhat.com>
744
745	* frv.cpu (u-commit): New modelling unit for fr500.
746	(mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
747	(commit-r): Use u-commit model for fr500.
748	(commit): Ditto.
749	(conditional-float-binary-op): Take profiling data as an argument.
750	Update callers.
751	(ne-float-binary-op): Ditto.
752
7532003-09-19  Michael Snyder  <msnyder@redhat.com>
754
755	* frv.cpu (nldqi): Delete unimplemented instruction.
756
7572003-09-12  Dave Brolley  <brolley@redhat.com>
758
759	* frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
760	(clear-ne-flag-r): Pass insn profiling in as an argument. Call
761	frv_ref_SI to get input register referenced for profiling.
762	(clear-ne-flag-all): Pass insn profiling in as an argument.
763	(clrgr,clrfr,clrga,clrfa): Add profiling information.
764
7652003-09-11  Michael Snyder  <msnyder@redhat.com>
766
767	* frv.cpu: Typographical corrections.
768
7692003-09-09  Dave Brolley  <brolley@redhat.com>
770
771	* frv.cpu (media-dual-complex): Change UNIT to FMALL.
772	(conditional-media-dual-complex, media-quad-complex): Likewise.
773
7742003-09-04  Dave Brolley  <brolley@redhat.com>
775
776	* frv.cpu (register-transfer): Pass in all attributes in on argument.
777	Update all callers.
778	(conditional-register-transfer): Ditto.
779	(cache-preload): Ditto.
780	(floating-point-conversion): Ditto.
781	(floating-point-neg): Ditto.
782	(float-abs): Ditto.
783	(float-binary-op-s): Ditto.
784	(conditional-float-binary-op): Ditto.
785	(ne-float-binary-op): Ditto.
786	(float-dual-arith): Ditto.
787	(ne-float-dual-arith): Ditto.
788
7892003-09-03  Dave Brolley  <brolley@redhat.com>
790
791	* frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
792	* frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
793	MCLRACC-1.
794	(A): Removed operand.
795	(A0,A1): New operands replace operand A.
796	(mnop): Now a real insn
797	(mclracc): Removed insn.
798	(mclracc-0, mclracc-1): New insns replace mclracc.
799	(all insns): Use new UNIT attributes.
800
8012003-08-21  Nick Clifton  <nickc@redhat.com>
802
803	* frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
804	and u-media-dual-btoh with output parameter.
805	(cmbtoh): Add profiling hack.
806
8072003-08-19  Michael Snyder  <msnyder@redhat.com>
808
809	* frv.cpu: Fix typo, Frintkeven -> FRintkeven
810
8112003-06-10  Doug Evans  <dje@sebabeach.org>
812
813	* frv.cpu: Add IDOC attribute.
814
8152003-06-06  Andrew Cagney  <cagney@redhat.com>
816
817	Contributed by Red Hat.
818	* iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
819	Stan Cox, and Frank Ch. Eigler.
820	* iq2000.opc: New file.  Written by Ben Elliston, Frank
821	Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
822	* iq2000m.cpu: New file.  Written by Jeff Johnston.
823	* iq10.cpu: New file.  Written by Jeff Johnston.
824
8252003-06-05  Nick Clifton  <nickc@redhat.com>
826
827	* frv.cpu (FRintieven): New operand.  An even-numbered only
828	version of the FRinti operand.
829	(FRintjeven): Likewise for FRintj.
830	(FRintkeven): Likewise for FRintk.
831	(mdcutssi, media-dual-word-rotate-r-r, mqsaths,
832	media-quad-arith-sat-semantics, media-quad-arith-sat,
833	conditional-media-quad-arith-sat, mdunpackh,
834	media-quad-multiply-semantics, media-quad-multiply,
835	conditional-media-quad-multiply, media-quad-complex-i,
836	media-quad-multiply-acc-semantics, media-quad-multiply-acc,
837	conditional-media-quad-multiply-acc, munpackh,
838	media-quad-multiply-cross-acc-semantics, mdpackh,
839	media-quad-multiply-cross-acc, mbtoh-semantics,
840	media-quad-cross-multiply-cross-acc-semantics,
841	media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
842	media-quad-cross-multiply-acc-semantics, cmbtoh,
843	media-quad-cross-multiply-acc, media-quad-complex, mhtob,
844	media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
845	cmhtob): Use new operands.
846	* frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
847	(parse_even_register): New function.
848
8492003-06-03  Nick Clifton  <nickc@redhat.com>
850
851	* frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
852	immediate value not unsigned.
853
8542003-06-03  Andrew Cagney  <cagney@redhat.com>
855
856	Contributed by Red Hat.
857	* frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
858	and Eric Christopher.
859	* frv.opc: New file.  Written by Catherine Moore, and Dave
860	Brolley.
861	* simplify.inc: New file.  Written by Doug Evans.
862
8632003-05-02  Andrew Cagney  <cagney@redhat.com>
864
865	* New file.
866
867
868Copyright (C) 2003-2012 Free Software Foundation, Inc.
869
870Copying and distribution of this file, with or without modification,
871are permitted in any medium without royalty provided the copyright
872notice and this notice are preserved.
873
874Local Variables:
875mode: change-log
876left-margin: 8
877fill-column: 74
878version-control: never
879End:
880