Home
last modified time | relevance | path

Searched refs:IMM8 (Results 1 – 17 of 17) sorted by relevance

/toolchain/binutils/binutils-2.25/opcodes/
Dh8500-opc.h141 #define IMM8 35 macro
171 {2,'s','E','C','C',O_XORC|O_BYTE,"xorc.b",2,{IMM8,CRB},3, {{0x04,0xff,0 },{0x00,0x00,IMM8 },{0x68,0…
185 {4,'m','E','D','D',O_XOR|O_BYTE,"xor.b",2,{IMM8,RD},3, {{0x04,0xff,0 },{0x00,0x00,IMM8 },{0x60,0xf8…
215 {10,'a','E','!','!',O_TST|O_BYTE,"tst.b",1,{IMM8,0},3, {{0x04,0xff,0 },{0x00,0x00,IMM8 },{0x16,0xff…
236 {14,'s','E','!','E',O_TAS|O_BYTE,"tas.b",1,{IMM8,0},3, {{0x04,0xff,0 },{0x00,0x00,IMM8 },{0x17,0xff…
244 {15,'s','E','!','E',O_TAS|O_UNSZ,"tas",1,{IMM8,0},3, {{0x04,0xff,0 },{0x00,0x00,IMM8 },{0x17,0xff,0…
265 {19,'a','E','D','D',O_SUBX|O_BYTE,"subx.b",2,{IMM8,RD},3, {{0x04,0xff,0 },{0x00,0x00,IMM8 },{0xb0,0…
292 {22,'-','E','D','D',O_SUBS|O_BYTE,"subs.b",2,{IMM8,RD},3, {{0x04,0xff,0 },{0x00,0x00,IMM8 },{0x38,0…
319 {25,'a','E','D','D',O_SUB|O_BYTE,"sub.b",2,{IMM8,RD},3, {{0x04,0xff,0 },{0x00,0x00,IMM8 },{0x30,0xf…
380 {33,'h','E','!','E',O_SHLR|O_BYTE,"shlr.b",1,{IMM8,0},3, {{0x04,0xff,0 },{0x00,0x00,IMM8 },{0x1b,0x…
[all …]
Dia64-opc-a.c104 {"sub", A, OpX2aVeX4X2b (8, 0, 0, 9, 1), {R1, IMM8, R3}, EMPTY},
105 {"and", A, OpX2aVeX4X2b (8, 0, 0, 0xb, 0), {R1, IMM8, R3}, EMPTY},
106 {"andcm", A, OpX2aVeX4X2b (8, 0, 0, 0xb, 1), {R1, IMM8, R3}, EMPTY},
107 {"or", A, OpX2aVeX4X2b (8, 0, 0, 0xb, 2), {R1, IMM8, R3}, EMPTY},
108 {"xor", A, OpX2aVeX4X2b (8, 0, 0, 0xb, 3), {R1, IMM8, R3}, EMPTY},
206 {"cmp.lt", A2, OpX2TaC (0xc, 2, 0, 0), {P1, P2, IMM8, R3}, EMPTY},
209 {"cmp.ge", A2, OpX2TaC (0xc, 2, 0, 0), {P2, P1, IMM8, R3}, EMPTY},
210 {"cmp.lt.unc", A2, OpX2TaC (0xc, 2, 0, 1), {P1, P2, IMM8, R3}, EMPTY},
213 {"cmp.ge.unc", A2, OpX2TaC (0xc, 2, 0, 1), {P2, P1, IMM8, R3}, EMPTY},
214 {"cmp.eq.and", A2, OpX2TaC (0xc, 2, 1, 0), {P1, P2, IMM8, R3}, EMPTY},
[all …]
Dm10300-opc.c81 #define IMM8 (AM2+1) macro
86 #define IMM16 (IMM8+1)
452 { "mov", 0x9000, 0xf000, 0, FMT_S1, 0, {IMM8, AN01}},
472 { "mov", 0x5c00, 0xfc00, 0, FMT_S1, 0, {MEM2(IMM8, SP), AN0}},
475 { "mov", 0x5800, 0xfc00, 0, FMT_S1, 0, {MEM2(IMM8, SP), DN0}},
482 { "mov", 0x4300, 0xf300, 0, FMT_S1, 0, {AM1, MEM2(IMM8, SP)}},
485 { "mov", 0x4200, 0xf300, 0, FMT_S1, 0, {DM1, MEM2(IMM8, SP)}},
524 { "mov", 0xfb8a0000, 0xffff0f00, 0, FMT_D7, AM33, {MEM2(IMM8, SP), RN2}},
526 { "mov", 0xfb9a0000, 0xffff0f00, 0, FMT_D7, AM33, {RM2, MEM2(IMM8, SP)}},
567 { "mov", 0xfbf80000, 0xffff0000, 0, FMT_D7, AM33, {IMM8, XRN02}},
[all …]
Dxstormy16-opc.c292 { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
442 { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
460 { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
478 { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
508 { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
532 { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
556 { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
580 { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
730 { { MNEM, OP (BCOND5), ' ', OP (RM), ',', '#', OP (IMM8), ',', OP (REL12), 0 } },
1020 { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
Dm10200-opc.c63 #define IMM8 (AM1+1) macro
68 #define IMM16 (IMM8+1)
280 { "and", 0xf50000, 0xfffc00, FMT_5, {IMM8, DN0}},
284 { "or", 0xf50800, 0xfffc00, FMT_5, {IMM8, DN0}},
296 { "btst", 0xf50400, 0xfffc00, FMT_5, {IMM8, DN0}},
Dh8500-dis.c175 case IMM8: in print_insn_h8500()
297 case IMM8: in print_insn_h8500()
Dia64-opc.h105 #define IMM8 IA64_OPND_IMM8 macro
Dia64-opc-i.c142 {"mov.i", I, OpX3X6 (0, 0, 0x0a), {AR3, IMM8}, EMPTY},
170 {"dep.z", I, OpX2XYb (5, 1, 1, 1), {R1, IMM8, CPOS6a, LEN6}, EMPTY},
Depiphany-opc.c1309 { { MNEM, ' ', OP (RD), ',', OP (IMM8), 0 } },
3741 { { MNEM, ' ', OP (RD), ',', OP (IMM8), 0 } },
Dia64-opc-m.c120 {"mov.m", M, OpX3X4X2 (0, 0, 8, 2), {AR3, IMM8}, EMPTY},
/toolchain/binutils/binutils-2.25/ld/testsuite/ld-m68hc11/
Dxgate-link.s7 ldw r1,#var1 ; expands to two IMM8 %hi,%lo relocate
8 add r5,#var2 ; expands to two IMM8 %hi,%lo relocate
11 ldl r3,#0x21 ; regular IMM8
12 ldh r6,#var5 ; IMM8 with relocate
13 cmp r1,#0xabcd ; expands to two IMM8 with constant
14 cmp r2,#var3 ; expands to two IMM8 %hi,%lo relocate
Dxgate1.s7 ldw r1,#var1 ; expands to two IMM8 %hi,%lo relocate
/toolchain/binutils/binutils-2.25/include/opcode/
Dh8300.h127 IMM8 = IMM | SRC | L_8, enumerator
276 #define IMM8LIST IMM8, DATA
846 …{CODE, AV_H8SX, 0, NAME, {{IMM8, RDIND, E}}, {{0x7, 0xd, B30 | RDIND, …
847 …{CODE, AV_H8SX, 0, NAME, {{IMM8, RDPOSTINC, E}}, {{PREFIX_0174, 0x6, 0xc, B30 | RDPOSTINC, B31…
848 …{CODE, AV_H8SX, 0, NAME, {{IMM8, RDPOSTDEC, E}}, {{PREFIX_0176, 0x6, 0xc, B30 | RDPOSTDEC, B31…
849 …{CODE, AV_H8SX, 0, NAME, {{IMM8, RDPREINC, E}}, {{PREFIX_0175, 0x6, 0xc, B30 | RDPREINC, B31…
850 …{CODE, AV_H8SX, 0, NAME, {{IMM8, RDPREDEC, E}}, {{PREFIX_0177, 0x6, 0xc, B30 | RDPREDEC, B31…
851 …{CODE, AV_H8SX, 0, NAME, {{IMM8, DISP2DST, E}}, {{PREFIX_017_D2D, 0x6, 0x8, B30 | DSTDISPREG, B31…
852 …{CODE, AV_H8SX, 0, NAME, {{IMM8, DISP16DST, E}}, {{PREFIX_0174, 0x6, 0xe, B30 | DSTDISPREG, B31…
853 …{CODE, AV_H8SX, 0, NAME, {{IMM8, DISP32DST, E}}, {{PREFIX_78R4WD, 0x6, 0xa, 2, B31…
[all …]
DChangeLog-9103120 Likewise IMM8 for mov.w and mov.l. Likewise IMM16U for mov.l.
/toolchain/binutils/binutils-2.25/cpu/
Depiphany.cpu59 (name IMM8)
/toolchain/binutils/binutils-2.25/bfd/
DChangeLog-20121913 Fix carry bug in IMM16 (IMM8 low/high) relocate.
/toolchain/binutils/binutils-2.25/gas/
DChangeLog-02036320 IMM3, IMM6, IMM8 cases to pick up the operand from the right spot.