| /toolchain/binutils/binutils-2.25/opcodes/ |
| D | m10200-opc.c | 144 #define MEM(ADDR) PAREN, ADDR, PAREN macro
174 { "mov", 0x20, 0xf0, FMT_1, {MEM(AN1), DM0}},
179 { "mov", 0xc80000, 0xfc0000, FMT_3, {MEM(IMM16_MEM), DN0}},
180 { "mov", 0xf4c00000, 0xfffc0000, FMT_7, {MEM(IMM24_MEM), DN0}},
182 { "mov", 0x7000, 0xf000, FMT_2, {MEM(AN1), AM0}},
186 { "mov", 0xf7300000, 0xfffc0000, FMT_6, {MEM(IMM16_MEM), AN0}},
187 { "mov", 0xf4d00000, 0xfffc0000, FMT_7, {MEM(IMM24_MEM), AN0}},
188 { "mov", 0x00, 0xf0, FMT_1, {DM0, MEM(AN1)}},
193 { "mov", 0xc00000, 0xfc0000, FMT_3, {DN0, MEM(IMM16_MEM)}},
194 { "mov", 0xf4400000, 0xfffc0000, FMT_7, {DN0, MEM(IMM24_MEM)}},
[all …]
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| D | m10300-opc.c | 425 #define MEM(ADDR) PAREN, ADDR, PAREN macro
460 { "mov", 0x70, 0xf0, 0, FMT_S0, 0, {MEM(AM0), DN1}},
461 { "mov", 0x5800, 0xfcff, 0, FMT_S1, 0, {MEM(SP), DN0}},
462 { "mov", 0x300000, 0xfc0000, 0, FMT_S2, 0, {MEM(IMM16_MEM), DN0}},
463 { "mov", 0xf000, 0xfff0, 0, FMT_D0, 0, {MEM(AM0), AN1}},
464 { "mov", 0x5c00, 0xfcff, 0, FMT_S1, 0, {MEM(SP), AN0}},
465 { "mov", 0xfaa00000, 0xfffc0000, 0, FMT_D2, 0, {MEM(IMM16_MEM), AN0}},
466 { "mov", 0x60, 0xf0, 0, FMT_S0, 0, {DM1, MEM(AN0)}},
467 { "mov", 0x4200, 0xf3ff, 0, FMT_S1, 0, {DM1, MEM(SP)}},
468 { "mov", 0x010000, 0xf30000, 0, FMT_S2, 0, {DM1, MEM(IMM16_MEM)}},
[all …]
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| D | nds32-asm.c | 446 {"lb", "=rt,[%ra+(%rb<<%sv)]", MEM (LB), 4, ATTR_ALL, 0, NULL, 0, NULL},
447 {"lb", "=rt,[%ra+%rb{<<%sv}]", MEM (LB), 4, ATTR_ALL, 0, NULL, 0, NULL},
448 {"lh", "=rt,[%ra+(%rb<<%sv)]", MEM (LH), 4, ATTR_ALL, 0, NULL, 0, NULL},
449 {"lh", "=rt,[%ra+%rb{<<%sv}]", MEM (LH), 4, ATTR_ALL, 0, NULL, 0, NULL},
450 {"lw", "=rt,[%ra+(%rb<<%sv)]", MEM (LW), 4, ATTR_ALL, 0, NULL, 0, NULL},
451 {"lw", "=rt,[%ra+%rb{<<%sv}]", MEM (LW), 4, ATTR_ALL, 0, NULL, 0, NULL},
452 {"ld", "=rt,[%ra+(%rb<<%sv)]", MEM (LD), 4, ATTR_ALL, 0, NULL, 0, NULL},
453 {"lb.bi", "=rt,[%ra],%rb{<<%sv}", MEM (LB_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
454 {"lb.bi", "=rt,[%ra],(%rb<<%sv)", MEM (LB_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
455 {"lb.p", "=rt,[%ra],%rb{<<%sv}", MEM (LB_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
[all …]
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| D | alpha-opc.c | 351 #define MEM(oo) MEM_(oo), MEM_MASK macro
484 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
485 { "lda", MEM(0x08), BASE, ARG_MEM },
486 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
487 { "ldah", MEM(0x09), BASE, ARG_MEM },
488 { "ldbu", MEM(0x0A), BWX, ARG_MEM },
491 { "ldq_u", MEM(0x0B), BASE, ARG_MEM },
492 { "ldwu", MEM(0x0C), BWX, ARG_MEM },
493 { "stw", MEM(0x0D), BWX, ARG_MEM },
494 { "stb", MEM(0x0E), BWX, ARG_MEM },
[all …]
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| D | nds32-asm.h | 277 #define MEM(sub) (OP6 (MEM) | N32_MEM_ ## sub) macro
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| D | ChangeLog-9297 | 1435 (MEM, MEM2): Define.
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| /toolchain/binutils/binutils-2.25/cpu/ |
| D | m32r.cpu | 807 (MEM - () "Memory")
1359 ((PIPE O) (IDOC MEM))
1368 (NO-DIS (PIPE O) (IDOC MEM))
1372 ((IDOC MEM))
1381 (NO-DIS (IDOC MEM))
1393 ((PIPE O) (IDOC MEM))
1420 ((PIPE O) (IDOC MEM))
1426 ((IDOC MEM))
2048 ((PIPE O) (IDOC MEM))
2057 (NO-DIS (PIPE O) (IDOC MEM))
[all …]
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| D | epiphany.cpu | 892 ;; MEM registers in MMR space
895 (comment "MEM registers in MMR space")
901 ;; MEM registers in MMR space
1558 ;; TMP = MEM[RD+RM]; /* Copy content of memory to tmp. */
1560 ;; MEM[RD+RM] = RD; /* If zero, write RD to memory. */
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| D | xstormy16.cpu | 79 (MEM - () "Memory")
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| D | frv.cpu | 1906 (MEM - () "Memory")
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| /toolchain/binutils/binutils-2.25/bfd/ |
| D | xtensa-isa.c | 45 #define CHECK_ALLOC(MEM,ERRVAL) \ argument
47 if ((MEM) == 0) \
55 #define CHECK_ALLOC_FOR_INIT(MEM,ERRVAL,ERRNO_P,ERROR_MSG_P) \ argument
57 if ((MEM) == 0) \
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| /toolchain/binutils/binutils-2.25/gas/config/ |
| D | rl78-parse.y | 151 %token SPL SPH PSW CS ES PMC MEM
1134 | MEM { $$ = 0xff; }
1239 { "mem", MEM, 0xff },
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| /toolchain/binutils/binutils-2.25/include/opcode/ |
| D | nds32.h | 93 N32_TYPE3 (MEM, rt, ra, rb, (sv << 8) | N32_MEM_##sub)
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| /toolchain/binutils/binutils-2.25/include/ |
| D | ChangeLog-9103 | 1427 * remote-sim.h: Clarify sim_read, sim_write MEM argument.
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| /toolchain/binutils/binutils-2.25/gas/ |
| D | ChangeLog-9295 | 5485 * config/tc-i960.h (CTRL, COBR, COJ, REG, MEM*, FBRA, CALLJ,
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