| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mmix/ |
| D | swym-opreg1.s | 9 TRAP 0,5
10 TRAP $0,5
11 TRAP $2,5
12 TRAP $2,0,5
13 TRAP 1,2,3
14 TRAP $1,$2,3
15 TRAP $1,$2,$3
16 TRAP 1,2,$3
21 TRAP 123,$45
22 TRAP 123,45678
|
| D | swym-op.s | 5 TRAP 132,YZ
6 TRAP X,3567
7 TRAP 2345678
|
| D | swym-op.l | 8 5 0008 00845678 TRAP 132,YZ
9 6 000c 00170DEF TRAP X,3567
10 7 0010 0023CACE TRAP 2345678
|
| D | comment-1.s | 5 Main TRAP 123 ignore; x y z
6 TRAP 1,23 all; x y z
7 TRAP 1,2,3 these; x y z
|
| D | swym-opreg2.s | 1 Main TRAP foo+567
|
| D | odd-1.s | 6 TRAP 0,$1
|
| D | list-insns.s | 8 TRAP 3,4,5
|
| D | list-insns.l | 11 8 0004 00030405 TRAP 3,4,5
|
| /toolchain/binutils/binutils-2.25/opcodes/ |
| D | mips-opc.c | 279 #define TRAP INSN_NO_DELAY_SLOT macro
817 {"break", "", 0x0000000d, 0xffffffff, TRAP, 0, I1, 0, 0 },
818 {"break", "c", 0x0000000d, 0xfc00ffff, TRAP, 0, I1, 0, 0 },
819 {"break", "c,q", 0x0000000d, 0xfc00003f, TRAP, 0, I1, 0, 0 },
1008 {"cftc1", "d,E", 0x41000023, 0xffe007ff, WR_1|RD_C1|TRAP|LC, 0, 0, MT32, 0 },
1009 {"cftc1", "d,T", 0x41000023, 0xffe007ff, WR_1|RD_C1|TRAP|LC, 0, 0, MT32, 0 },
1010 {"cftc2", "d,E", 0x41000025, 0xffe007ff, WR_1|RD_C2|TRAP|LC, 0, 0, MT32, IOCT|IOCTP|IOCT2 },
1023 {"cttc1", "t,G", 0x41800023, 0xffe007ff, RD_1|WR_CC|TRAP|CM, 0, 0, MT32, 0 },
1024 {"cttc1", "t,S", 0x41800023, 0xffe007ff, RD_1|WR_CC|TRAP|CM, 0, 0, MT32, 0 },
1025 {"cttc2", "t,g", 0x41800025, 0xffe007ff, RD_1|WR_CC|TRAP|CM, 0, 0, MT32, IOCT|IOCTP|IOCT2 },
[all …]
|
| D | mips16-opc.c | 165 #define TRAP INSN_NO_DELAY_SLOT macro
225 {"break", "6", 0xe805, 0xf81f, TRAP, 0, I1, 0, 0 },
272 {"exit", "L", 0xed09, 0xff1f, TRAP, 0, I1, 0, 0 },
273 {"exit", "L", 0xee09, 0xff1f, TRAP, 0, I1, 0, 0 },
274 {"exit", "", 0xef09, 0xffff, TRAP, 0, I1, 0, 0 },
275 {"exit", "L", 0xef09, 0xff1f, TRAP, 0, I1, 0, 0 },
276 {"entry", "", 0xe809, 0xffff, TRAP, 0, I1, 0, 0 },
277 {"entry", "l", 0xe809, 0xf81f, TRAP, 0, I1, 0, 0 },
354 {"sdbbp", "6", 0xe801, 0xf81f, TRAP, 0, I32, 0, 0 },
|
| D | micromips-opc.c | 202 #define TRAP INSN_NO_DELAY_SLOT macro
434 {"break", "", 0x4680, 0xffff, TRAP, 0, I1, 0, 0 },
435 {"break", "", 0x00000007, 0xffffffff, TRAP, 0, I1, 0, 0 },
436 {"break", "mF", 0x4680, 0xfff0, TRAP, 0, I1, 0, 0 },
437 {"break", "c", 0x00000007, 0xfc00ffff, TRAP, 0, I1, 0, 0 },
438 {"break", "c,q", 0x00000007, 0xfc00003f, TRAP, 0, I1, 0, 0 },
690 {"hypcall", "", 0x0000c37c, 0xffffffff, TRAP, 0, 0, IVIRT, 0 },
691 {"hypcall", "+J", 0x0000c37c, 0xfc00ffff, TRAP, 0, 0, IVIRT, 0 },
963 {"sdbbp", "", 0x46c0, 0xffff, TRAP, 0, I1, 0, 0 },
964 {"sdbbp", "", 0x0000db7c, 0xffffffff, TRAP, 0, I1, 0, 0 },
[all …]
|
| D | ChangeLog-2011 | 57 * micromips-opc.c (micromips_opcodes): Use NODS rather than TRAP
289 (TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT.
293 place of TRAP for "wait", "waiti" and "yield".
295 (TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT.
296 (mips16_opcodes): Use NODS in place of TRAP for "jalrc", "jrc",
|
| D | nds32-asm.c | 416 {"trap", "%swid", MISC (TRAP), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
435 {"trap", "", MISC (TRAP), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
|
| D | ChangeLog-9899 | 878 * d10v-opc.c: Treat TRAP as if it were a branch type instruction.
887 * d30v-opc.c: Add FLAG_JSR attribute to DBT, REIT, RTD, and TRAP
|
| /toolchain/binutils/binutils-2.25/cpu/ |
| D | epiphany.cpu | 341 (- ADD - SUB - - - TRAP) ; TRAP is special extension for simulator
2108 ;; TRAP #disp3 - simulator only and chip as well - make the same grouop as swi
2114 ;; TRAP #N - special sw trap for simulator support; allows simple i/o using fixed arguments
2115 ;; TRAP #0 - write (r0=i/o channel, r1=addr, r2=len) returns status in r0
2116 ;; TRAP #1 - read (r0=i/o channel, r1=addr, r2=len) returns length or -<code> on error
2117 ;; TRAP #2 - open (r0=string path, r1=mode) returns channel# or -<code> on error
2118 ;; TRAP #3 - exit (r0=status code) never returns.
2119 ;; TRAP #4 - print "pass\n" and exit
2120 ;; TRAP #5 - print "fail\n" and exit
2121 ;; TRAP #6 - close (r0=i/o channel)
|
| D | or1kcommon.cpu | 129 ("TRAP" #x0e)
|
| D | or1korbis.cpu | 189 ("TRAP" #x08 )
472 (raise-exception EXCEPT-TRAP)
|
| D | xc16x.cpu | 156 (dnf f-uimm7 "uimm7" (PCREL-ADDR RELOC) 15 7) ;used in TRAP
2215 ; TRAP #uimm7
|
| /toolchain/binutils/binutils-2.25/include/opcode/ |
| D | nios2r1.h | 461 #define MATCH_R1_TRAP MATCH_R1_OPX (TRAP, 0, 0, 0x1d)
|
| /toolchain/binutils/binutils-2.25/gas/doc/ |
| D | c-pdp11.texi | 350 @code{TRAP}
|
| D | c-mmix.texi | 54 symbols, @samp{BIT} symbols, and @code{TRAP} symbols used in @code{mmix}
|
| /toolchain/binutils/binutils-2.25/gas/ |
| D | ChangeLog-2009 | 736 Allow register operands for SWYM as for TRIP and TRAP. Correct
|