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/toolchain/binutils/binutils-2.25/gold/po/
DPOTFILES.in1 aarch64-reloc-property.cc
3 aarch64.cc
4 archive.cc
6 arm-reloc-property.cc
8 arm.cc
9 attributes.cc
11 binary.cc
13 common.cc
15 compressed_output.cc
17 copy-relocs.cc
[all …]
Dgold.pot20 #: archive.cc:135
25 #: archive.cc:229
30 #: archive.cc:317
35 #: archive.cc:349
40 #: archive.cc:369
45 #: archive.cc:380
50 #: archive.cc:411
55 #: archive.cc:421
60 #: archive.cc:518
65 #: archive.cc:702
[all …]
Did.po18 #: archive.cc:107
23 #: archive.cc:189
28 #: archive.cc:221
33 #: archive.cc:241
38 #: archive.cc:252
43 #: archive.cc:282
48 #: archive.cc:292
53 #: archive.cc:389
58 #: archive.cc:530 archive.cc:545
63 #: archive.cc:775
[all …]
Dfi.po20 #: archive.cc:119
25 #: archive.cc:204
30 #: archive.cc:236
35 #: archive.cc:256
40 #: archive.cc:267
45 #: archive.cc:297
50 #: archive.cc:307
55 #: archive.cc:404
60 #: archive.cc:560
65 #: archive.cc:879
[all …]
Dit.po20 #: archive.cc:119
25 #: archive.cc:204
30 #: archive.cc:236
35 #: archive.cc:256
40 #: archive.cc:267
45 #: archive.cc:297
50 #: archive.cc:307
55 #: archive.cc:404
60 #: archive.cc:560
65 #: archive.cc:879
[all …]
Des.po19 #: archive.cc:119
24 #: archive.cc:204
29 #: archive.cc:236
34 #: archive.cc:256
39 #: archive.cc:267
44 #: archive.cc:297
49 #: archive.cc:307
54 #: archive.cc:404
59 #: archive.cc:560
64 #: archive.cc:879
[all …]
Dvi.po25 #: archive.cc:119
30 #: archive.cc:204
35 #: archive.cc:236
40 #: archive.cc:256
45 #: archive.cc:267
50 #: archive.cc:297
55 #: archive.cc:307
60 #: archive.cc:404
65 #: archive.cc:560
70 #: archive.cc:879
[all …]
/toolchain/binutils/binutils-2.25/gold/
DMakefile.am60 archive.cc \
61 attributes.cc \
62 binary.cc \
63 common.cc \
64 compressed_output.cc \
65 copy-relocs.cc \
66 cref.cc \
67 defstd.cc \
68 descriptors.cc \
69 dirsearch.cc \
[all …]
DChangeLog5 * aarch64.cc (Reloc_stub::stub_type_for_reloc): Return PC-relative
11 * aarch64.cc (Target_aarch64::Relocate::relocate): Don't apply
19 * aarch64.cc (Target_aarch64::Scan::local): Add support for
24 * version.cc (print_version): Just print current year.
25 * dwp.cc (print_version): Likewise.
35 * powerpc.cc (Global_symbol_visitor_opd::operator()): Set default
44 * object.cc (write_local_symbols): avoid std::vector copy.
48 * merge.cc (get_output_offset): Use upper_bound instead of lower_bound.
52 * gdb-index.cc (Gdb_index_info_reader::visit_top_die): Recognize
58 * incremental.cc: Remove redundant include of "output.h".
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/bfin/
Dcontrol_code.s4 cc = r6 == r0; define
7 cc = r0 < r1; define
10 cc = r5 <= 3; define
11 cc = r6 < r7 (iu); define
12 cc = R7 < 4 (iu); define
19 cc = sp == p0; define
24 cc = r3 <= 3; define
28 cc = r2 <= 0 (IU); define
34 cc = A0 < a1; define
35 cc = a0 <= a1; define
[all …]
Dparallel4.d14 18: 12 cc 00 c0 DISALGNEXCPT \|\| \[I1\] = R0 \|\| NOP;
16 20: 17 cc 02 0a R5 = BYTEOP3P \(R1:0, R3:2\) \(LO\) \|\| \[I1\+\+\] = R0 \|\| NOP;
18 28: 37 cc 02 00 R0 = BYTEOP3P \(R1:0, R3:2\) \(HI\) \|\| \[I1--\] = R0 \|\| NOP;
20 30: 17 cc 02 22 R1 = BYTEOP3P \(R1:0, R3:2\) \(LO, R\) \|\| \[I2\] = R0 \|\| NOP;
22 38: 37 cc 02 24 R2 = BYTEOP3P \(R1:0, R3:2\) \(HI, R\) \|\| \[I2\+\+\] = R0 \|\| NOP;
24 40: 0c cc 7f 45 R5 = A1.L \+ A1.H, R2 = A0.L \+ A0.H \|\| \[I2--\] = R0 \|\| NOP;
26 48: 15 cc 82 06 \(R2, R3\) = BYTEOP16P \(R1:0, R3:2\) \|\| \[I3\] = R0 \|\| NOP;
28 50: 15 cc 82 21 \(R6, R0\) = BYTEOP16P \(R1:0, R3:2\) \(R\) \|\| \[I3\+\+\] = R0 \|\| NOP;
30 58: 14 cc 02 4e R7 = BYTEOP1P \(R1:0, R3:2\) \(T\) \|\| \[I3--\] = R0 \|\| NOP;
32 60: 14 cc 02 44 R2 = BYTEOP1P \(R1:0, R3:2\) \(T\) \|\| \[P0\] = R0 \|\| NOP;
[all …]
Dparallel.d32 60: 10 cc 3f 00 A0 = ABS A0 \|\| P2 = \[SP \+ 0x3c\] \|\| R0 = \[I0\];
34 68: 10 cc 3f 40 A0 = ABS A1 \|\| P3 = \[FP -0x3c\] \|\| R1 = \[I1 \+\+ M0\];
36 70: 30 cc 3f 00 A1 = ABS A0 \|\| P4 = \[FP -0x4\] \|\| R2 = \[I1\+\+\];
38 78: 30 cc 3f 40 A1 = ABS A1 \|\| FP = \[SP\] \|\| R3 = \[I2--\];
40 80: 10 cc 3f c0 A1 = ABS A1, A0 = ABS A0 \|\| R4 = \[P5 \+ 0x38\] \|\| R0.H = W\[I0\];
42 88: 07 cc 10 80 R0 = ABS R2 \|\| B\[SP\] = R0 \|\| R1.H = W\[I1\+\+\];
44 90: 02 cc 10 a8 R4.L = R2.H \+ R0.L \(S\) \|\| B\[FP\] = R0 \|\| R2.H = W\[I2--\];
46 98: 22 cc 09 aa R5.H = R1.H \+ R1.L \(S\) \|\| B\[P0\] = R0 \|\| R3.L = W\[I3\];
48 a0: 02 cc 35 0c R6.L = R6.L \+ R5.L \(NS\) \|\| B\[P1\] = R0 \|\| R4.L = W\[I3\+\+\];
50 a8: 05 cc 01 98 R4.L = R0 \+ R1 \(RND20\) \|\| B\[P2\] = R0 \|\| R5.L = W\[I2--\];
[all …]
Dparallel3.d8 …0: 0c cc 0d 08 R4.H = R4.L = SIGN \(R1.H\) \* R5.H \+ SIGN \(R1.L\) \* R5.L \|\| \[P0\] = P0 \|\|…
18 28: 06 cc 28 8a R5 = ABS R5 \(V\) \|\| \[P0 \+ 0x3c\] = P0 \|\| NOP;
20 30: 06 cc 00 84 R2 = ABS R0 \(V\) \|\| \[P0 \+ 0x38\] = P0 \|\| NOP;
22 38: 00 cc 1a 0a R5 = R3 \+\|\+ R2 \|\| \[P0 \+ 0x34\] = P0 \|\| NOP;
24 40: 00 cc 1a 3a R5 = R3 \+\|\+ R2 \(SCO\) \|\| \[P1\] = P0 \|\| NOP;
26 48: 00 cc 06 8e R7 = R0 -\|\+ R6 \|\| \[P1\+\+\] = P0 \|\| NOP;
28 50: 00 cc 0b a4 R2 = R1 -\|\+ R3 \(S\) \|\| \[P1--\] = P0 \|\| NOP;
30 58: 00 cc 02 48 R4 = R0 \+\|- R2 \|\| \[P1 \+ 0x30\] = P0 \|\| NOP;
32 60: 00 cc 0a 5a R5 = R1 \+\|- R2 \(CO\) \|\| \[P1 \+ 0x2c\] = P0 \|\| NOP;
34 68: 00 cc 1c cc R6 = R3 -\|- R4 \|\| \[P1 \+ 0x28\] = P0 \|\| NOP;
[all …]
Dexpected_comparison_errors.s4 cc = A0 < a0; define
5 cc = A1 < a1; define
6 cc = A1 < a0; define
7 cc = a0 <= a0; define
8 cc = a1 <= a1; define
9 cc = a1 <= a0; define
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
Dx86-64-avx512er.d85 [ ]*[a-f0-9]+: 62 02 7d 48 cc f5 vrsqrt28ps %zmm29,%zmm30
86 [ ]*[a-f0-9]+: 62 02 7d 4f cc f5 vrsqrt28ps %zmm29,%zmm30\{%k7\}
87 [ ]*[a-f0-9]+: 62 02 7d cf cc f5 vrsqrt28ps %zmm29,%zmm30\{%k7\}\{z\}
88 [ ]*[a-f0-9]+: 62 02 7d 18 cc f5 vrsqrt28ps \{sae\},%zmm29,%zmm30
89 [ ]*[a-f0-9]+: 62 62 7d 48 cc 31 vrsqrt28ps \(%rcx\),%zmm30
90 [ ]*[a-f0-9]+: 62 22 7d 48 cc b4 f0 23 01 00 00 vrsqrt28ps 0x123\(%rax,%r14,8\),%zmm30
91 [ ]*[a-f0-9]+: 62 62 7d 58 cc 31 vrsqrt28ps \(%rcx\)\{1to16\},%zmm30
92 [ ]*[a-f0-9]+: 62 62 7d 48 cc 72 7f vrsqrt28ps 0x1fc0\(%rdx\),%zmm30
93 [ ]*[a-f0-9]+: 62 62 7d 48 cc b2 00 20 00 00 vrsqrt28ps 0x2000\(%rdx\),%zmm30
94 [ ]*[a-f0-9]+: 62 62 7d 48 cc 72 80 vrsqrt28ps -0x2000\(%rdx\),%zmm30
[all …]
Dx86-64-avx512er-intel.d86 [ ]*[a-f0-9]+: 62 02 7d 48 cc f5 vrsqrt28ps zmm30,zmm29
87 [ ]*[a-f0-9]+: 62 02 7d 4f cc f5 vrsqrt28ps zmm30\{k7\},zmm29
88 [ ]*[a-f0-9]+: 62 02 7d cf cc f5 vrsqrt28ps zmm30\{k7\}\{z\},zmm29
89 [ ]*[a-f0-9]+: 62 02 7d 18 cc f5 vrsqrt28ps zmm30,zmm29,\{sae\}
90 [ ]*[a-f0-9]+: 62 62 7d 48 cc 31 vrsqrt28ps zmm30,ZMMWORD PTR \[rcx\]
91 [ ]*[a-f0-9]+: 62 22 7d 48 cc b4 f0 23 01 00 00 vrsqrt28ps zmm30,ZMMWORD PTR \[rax\+r14\*8\+0x123…
92 [ ]*[a-f0-9]+: 62 62 7d 58 cc 31 vrsqrt28ps zmm30,DWORD PTR \[rcx\]\{1to16\}
93 [ ]*[a-f0-9]+: 62 62 7d 48 cc 72 7f vrsqrt28ps zmm30,ZMMWORD PTR \[rdx\+0x1fc0\]
94 [ ]*[a-f0-9]+: 62 62 7d 48 cc b2 00 20 00 00 vrsqrt28ps zmm30,ZMMWORD PTR \[rdx\+0x2000\]
95 [ ]*[a-f0-9]+: 62 62 7d 48 cc 72 80 vrsqrt28ps zmm30,ZMMWORD PTR \[rdx-0x2000\]
[all …]
Davx512er.d85 [ ]*[a-f0-9]+: 62 f2 7d 48 cc f5 vrsqrt28ps %zmm5,%zmm6
86 [ ]*[a-f0-9]+: 62 f2 7d 4f cc f5 vrsqrt28ps %zmm5,%zmm6\{%k7\}
87 [ ]*[a-f0-9]+: 62 f2 7d cf cc f5 vrsqrt28ps %zmm5,%zmm6\{%k7\}\{z\}
88 [ ]*[a-f0-9]+: 62 f2 7d 18 cc f5 vrsqrt28ps \{sae\},%zmm5,%zmm6
89 [ ]*[a-f0-9]+: 62 f2 7d 48 cc 31 vrsqrt28ps \(%ecx\),%zmm6
90 [ ]*[a-f0-9]+: 62 f2 7d 48 cc b4 f4 c0 1d fe ff vrsqrt28ps -0x1e240\(%esp,%esi,8\),%zmm6
91 [ ]*[a-f0-9]+: 62 f2 7d 58 cc 30 vrsqrt28ps \(%eax\)\{1to16\},%zmm6
92 [ ]*[a-f0-9]+: 62 f2 7d 48 cc 72 7f vrsqrt28ps 0x1fc0\(%edx\),%zmm6
93 [ ]*[a-f0-9]+: 62 f2 7d 48 cc b2 00 20 00 00 vrsqrt28ps 0x2000\(%edx\),%zmm6
94 [ ]*[a-f0-9]+: 62 f2 7d 48 cc 72 80 vrsqrt28ps -0x2000\(%edx\),%zmm6
[all …]
Dx86-64-sha.d9 [ ]*[a-f0-9]+: 0f 3a cc ca 09 sha1rnds4 \$0x9,%xmm2,%xmm1
10 [ ]*[a-f0-9]+: 0f 3a cc 10 07 sha1rnds4 \$0x7,\(%rax\),%xmm2
11 [ ]*[a-f0-9]+: 0f 3a cc 58 12 05 sha1rnds4 \$0x5,0x12\(%rax\),%xmm3
12 [ ]*[a-f0-9]+: 0f 3a cc 24 58 01 sha1rnds4 \$0x1,\(%rax,%rbx,2\),%xmm4
33 [ ]*[a-f0-9]+: 0f 38 cc ca sha256msg1 %xmm2,%xmm1
34 [ ]*[a-f0-9]+: 0f 38 cc 08 sha256msg1 \(%rax\),%xmm1
35 [ ]*[a-f0-9]+: 0f 38 cc 48 12 sha256msg1 0x12\(%rax\),%xmm1
36 [ ]*[a-f0-9]+: 0f 38 cc 0c 58 sha256msg1 \(%rax,%rbx,2\),%xmm1
41 [ ]*[a-f0-9]+: 0f 3a cc ca 09 sha1rnds4 \$0x9,%xmm2,%xmm1
42 [ ]*[a-f0-9]+: 0f 3a cc 10 07 sha1rnds4 \$0x7,\(%rax\),%xmm2
[all …]
Dsha.d9 [ ]*[a-f0-9]+: 0f 3a cc ca 09 sha1rnds4 \$0x9,%xmm2,%xmm1
10 [ ]*[a-f0-9]+: 0f 3a cc 10 07 sha1rnds4 \$0x7,\(%eax\),%xmm2
11 [ ]*[a-f0-9]+: 0f 3a cc 58 12 05 sha1rnds4 \$0x5,0x12\(%eax\),%xmm3
12 [ ]*[a-f0-9]+: 0f 3a cc 24 58 01 sha1rnds4 \$0x1,\(%eax,%ebx,2\),%xmm4
33 [ ]*[a-f0-9]+: 0f 38 cc ca sha256msg1 %xmm2,%xmm1
34 [ ]*[a-f0-9]+: 0f 38 cc 08 sha256msg1 \(%eax\),%xmm1
35 [ ]*[a-f0-9]+: 0f 38 cc 48 12 sha256msg1 0x12\(%eax\),%xmm1
36 [ ]*[a-f0-9]+: 0f 38 cc 0c 58 sha256msg1 \(%eax,%ebx,2\),%xmm1
41 [ ]*[a-f0-9]+: 0f 3a cc ca 09 sha1rnds4 \$0x9,%xmm2,%xmm1
42 [ ]*[a-f0-9]+: 0f 3a cc 10 07 sha1rnds4 \$0x7,\(%eax\),%xmm2
[all …]
Davx512er-intel.d86 [ ]*[a-f0-9]+: 62 f2 7d 48 cc f5 vrsqrt28ps zmm6,zmm5
87 [ ]*[a-f0-9]+: 62 f2 7d 4f cc f5 vrsqrt28ps zmm6\{k7\},zmm5
88 [ ]*[a-f0-9]+: 62 f2 7d cf cc f5 vrsqrt28ps zmm6\{k7\}\{z\},zmm5
89 [ ]*[a-f0-9]+: 62 f2 7d 18 cc f5 vrsqrt28ps zmm6,zmm5,\{sae\}
90 [ ]*[a-f0-9]+: 62 f2 7d 48 cc 31 vrsqrt28ps zmm6,ZMMWORD PTR \[ecx\]
91 [ ]*[a-f0-9]+: 62 f2 7d 48 cc b4 f4 c0 1d fe ff vrsqrt28ps zmm6,ZMMWORD PTR \[esp\+esi\*8-0x1e240…
92 [ ]*[a-f0-9]+: 62 f2 7d 58 cc 30 vrsqrt28ps zmm6,DWORD PTR \[eax\]\{1to16\}
93 [ ]*[a-f0-9]+: 62 f2 7d 48 cc 72 7f vrsqrt28ps zmm6,ZMMWORD PTR \[edx\+0x1fc0\]
94 [ ]*[a-f0-9]+: 62 f2 7d 48 cc b2 00 20 00 00 vrsqrt28ps zmm6,ZMMWORD PTR \[edx\+0x2000\]
95 [ ]*[a-f0-9]+: 62 f2 7d 48 cc 72 80 vrsqrt28ps zmm6,ZMMWORD PTR \[edx-0x2000\]
[all …]
/toolchain/binutils/binutils-2.25/gold/testsuite/
DMakefile.am100 libgoldtest_a_SOURCES = test.cc testmain.cc testfile.cc
128 object_unittest_SOURCES = object_unittest.cc
131 binary_unittest_SOURCES = binary_unittest.cc
134 leb128_unittest_SOURCES = leb128_unittest.cc
154 flagstest_debug.o: constructor_test.cc
156 flagstest_ndebug.o: constructor_test.cc
174 gc_comdat_test_1.o: gc_comdat_test_1.cc
176 gc_comdat_test_2.o: gc_comdat_test_2.cc
186 gc_tls_test.o: gc_tls_test.cc
196 gc_orphan_section_test.o: gc_orphan_section_test.cc
[all …]
/toolchain/binutils/binutils-2.25/
DREADME.google58 gold/errors.cc
68 gold/layout.cc
78 gold/powerpc.cc
85 gold/powerpc.cc
91 gold/aarch64.cc
97 gold/powerpc.cc
105 gold/aarch64.cc
112 gold/aarch64.cc
119 gold/powerpc.cc
120 gold/symtab.cc
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/cr16/
Dstord_test.d21 26: 00 cc 00 00 stord \(r1,r0\),\[r12\]0x0:m
23 2e: 00 cc ff 00 stord \(r1,r0\),\[r12\]0xff:m
25 36: 20 cc ff 0f stord \(r3,r2\),\[r12\]0xfff:m
27 3e: 30 cc 34 12 stord \(r4,r3\),\[r12\]0x1234:m
29 46: 40 cc 34 12 stord \(r5,r4\),\[r13\]0x1234:m
31 4e: 10 cc 67 45 stord \(r2,r1\),\[r12\]0x4567:m
44 78: cc ed
46 7e: cc ed
48 84: cc ed
63 b4: cc ed
[all …]
/toolchain/binutils/binutils-2.25/ld/testsuite/ld-frv/
Dtls-relax-shared-2.d11 [0-9a-f ]+: 90 cc f0 10 lddi @\(gr15,16\),gr8
13 [0-9a-f ]+: 90 cc f0 30 lddi @\(gr15,48\),gr8
15 [0-9a-f ]+: 90 cc f0 40 lddi @\(gr15,64\),gr8
17 [0-9a-f ]+: 90 cc f0 50 lddi @\(gr15,80\),gr8
19 [0-9a-f ]+: 90 cc f0 58 lddi @\(gr15,88\),gr8
21 [0-9a-f ]+: 90 cc f0 68 lddi @\(gr15,104\),gr8
23 [0-9a-f ]+: 90 cc ff a8 lddi @\(gr15,-88\),gr8
25 [0-9a-f ]+: 90 cc ff b0 lddi @\(gr15,-80\),gr8
27 [0-9a-f ]+: 90 cc ff c8 lddi @\(gr15,-56\),gr8
29 [0-9a-f ]+: 90 cc ff d8 lddi @\(gr15,-40\),gr8
[all …]
Dtls-shared-2.d11 [0-9a-f ]+: 90 cc f0 10 lddi @\(gr15,16\),gr8
13 [0-9a-f ]+: 90 cc f0 30 lddi @\(gr15,48\),gr8
15 [0-9a-f ]+: 90 cc f0 40 lddi @\(gr15,64\),gr8
17 [0-9a-f ]+: 90 cc f0 50 lddi @\(gr15,80\),gr8
19 [0-9a-f ]+: 90 cc f0 58 lddi @\(gr15,88\),gr8
21 [0-9a-f ]+: 90 cc f0 68 lddi @\(gr15,104\),gr8
23 [0-9a-f ]+: 90 cc ff a8 lddi @\(gr15,-88\),gr8
25 [0-9a-f ]+: 90 cc ff b0 lddi @\(gr15,-80\),gr8
27 [0-9a-f ]+: 90 cc ff c8 lddi @\(gr15,-56\),gr8
29 [0-9a-f ]+: 90 cc ff d8 lddi @\(gr15,-40\),gr8
[all …]

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