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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
Dopts.s8 add %dl,%cl
9 add.s %dl,%cl
14 addb %dl,%cl
15 addb.s %dl,%cl
20 adc %dl,%cl
21 adc.s %dl,%cl
26 adcb %dl,%cl
27 adcb.s %dl,%cl
32 and %dl,%cl
33 and.s %dl,%cl
[all …]
Dx86-64-opts.s8 add %dl,%cl
9 add.s %dl,%cl
14 addb %dl,%cl
15 addb.s %dl,%cl
24 adc %dl,%cl
25 adc.s %dl,%cl
30 adcb %dl,%cl
31 adcb.s %dl,%cl
40 and %dl,%cl
41 and.s %dl,%cl
[all …]
Dhlebad.s32 xacquire adcb $100,%cl
33 xacquire lock adcb $100,%cl
34 lock xacquire adcb $100,%cl
35 xrelease adcb $100,%cl
36 xrelease lock adcb $100,%cl
37 lock xrelease adcb $100,%cl
82 xacquire adcb $100,%cl
83 xacquire lock adcb $100,%cl
84 lock xacquire adcb $100,%cl
85 xrelease adcb $100,%cl
[all …]
Dhlebad.l388 [ ]*32[ ]+xacquire adcb \$100,%cl
389 [ ]*33[ ]+xacquire lock adcb \$100,%cl
390 [ ]*34[ ]+lock xacquire adcb \$100,%cl
391 [ ]*35[ ]+xrelease adcb \$100,%cl
392 [ ]*36[ ]+xrelease lock adcb \$100,%cl
393 [ ]*37[ ]+lock xrelease adcb \$100,%cl
441 [ ]*82[ ]+xacquire adcb \$100,%cl
442 [ ]*83[ ]+xacquire lock adcb \$100,%cl
443 [ ]*84[ ]+lock xacquire adcb \$100,%cl
444 [ ]*85[ ]+xrelease adcb \$100,%cl
[all …]
Dx86-64-hlebad.s41 xacquire adcb $100,%cl
42 xacquire lock adcb $100,%cl
43 lock xacquire adcb $100,%cl
44 xrelease adcb $100,%cl
45 xrelease lock adcb $100,%cl
46 lock xrelease adcb $100,%cl
111 xacquire adcb $100,%cl
112 xacquire lock adcb $100,%cl
113 lock xacquire adcb $100,%cl
114 xrelease adcb $100,%cl
[all …]
Dx86-64-hlebad.l513 [ ]*41[ ]+xacquire adcb \$100,%cl
514 [ ]*42[ ]+xacquire lock adcb \$100,%cl
515 [ ]*43[ ]+lock xacquire adcb \$100,%cl
516 [ ]*44[ ]+xrelease adcb \$100,%cl
517 [ ]*45[ ]+xrelease lock adcb \$100,%cl
518 [ ]*46[ ]+lock xrelease adcb \$100,%cl
586 [ ]*111[ ]+xacquire adcb \$100,%cl
587 [ ]*112[ ]+xacquire lock adcb \$100,%cl
588 [ ]*113[ ]+lock xacquire adcb \$100,%cl
589 [ ]*114[ ]+xrelease adcb \$100,%cl
[all …]
Dopts-intel.d11 [ ]*[a-f0-9]+: 00 d1 add cl,dl
12 [ ]*[a-f0-9]+: 02 ca add.s cl,dl
17 [ ]*[a-f0-9]+: 00 d1 add cl,dl
18 [ ]*[a-f0-9]+: 02 ca add.s cl,dl
23 [ ]*[a-f0-9]+: 10 d1 adc cl,dl
24 [ ]*[a-f0-9]+: 12 ca adc.s cl,dl
29 [ ]*[a-f0-9]+: 10 d1 adc cl,dl
30 [ ]*[a-f0-9]+: 12 ca adc.s cl,dl
35 [ ]*[a-f0-9]+: 20 d1 and cl,dl
36 [ ]*[a-f0-9]+: 22 ca and.s cl,dl
[all …]
Dsse2avx-opts-intel.d12 [ ]*[a-f0-9]+: 00 d1 add cl,dl
13 [ ]*[a-f0-9]+: 02 ca add.s cl,dl
18 [ ]*[a-f0-9]+: 00 d1 add cl,dl
19 [ ]*[a-f0-9]+: 02 ca add.s cl,dl
24 [ ]*[a-f0-9]+: 10 d1 adc cl,dl
25 [ ]*[a-f0-9]+: 12 ca adc.s cl,dl
30 [ ]*[a-f0-9]+: 10 d1 adc cl,dl
31 [ ]*[a-f0-9]+: 12 ca adc.s cl,dl
36 [ ]*[a-f0-9]+: 20 d1 and cl,dl
37 [ ]*[a-f0-9]+: 22 ca and.s cl,dl
[all …]
Dopts.d10 [ ]*[a-f0-9]+: 00 d1 addb %dl,%cl
11 [ ]*[a-f0-9]+: 02 ca addb.s %dl,%cl
16 [ ]*[a-f0-9]+: 00 d1 addb %dl,%cl
17 [ ]*[a-f0-9]+: 02 ca addb.s %dl,%cl
22 [ ]*[a-f0-9]+: 10 d1 adcb %dl,%cl
23 [ ]*[a-f0-9]+: 12 ca adcb.s %dl,%cl
28 [ ]*[a-f0-9]+: 10 d1 adcb %dl,%cl
29 [ ]*[a-f0-9]+: 12 ca adcb.s %dl,%cl
34 [ ]*[a-f0-9]+: 20 d1 andb %dl,%cl
35 [ ]*[a-f0-9]+: 22 ca andb.s %dl,%cl
[all …]
Dsse2avx-opts.d12 [ ]*[a-f0-9]+: 00 d1 addb %dl,%cl
13 [ ]*[a-f0-9]+: 02 ca addb.s %dl,%cl
18 [ ]*[a-f0-9]+: 00 d1 addb %dl,%cl
19 [ ]*[a-f0-9]+: 02 ca addb.s %dl,%cl
24 [ ]*[a-f0-9]+: 10 d1 adcb %dl,%cl
25 [ ]*[a-f0-9]+: 12 ca adcb.s %dl,%cl
30 [ ]*[a-f0-9]+: 10 d1 adcb %dl,%cl
31 [ ]*[a-f0-9]+: 12 ca adcb.s %dl,%cl
36 [ ]*[a-f0-9]+: 20 d1 andb %dl,%cl
37 [ ]*[a-f0-9]+: 22 ca andb.s %dl,%cl
[all …]
Dx86-64-opts-intel.d11 [ ]*[a-f0-9]+: 00 d1 add cl,dl
12 [ ]*[a-f0-9]+: 02 ca add.s cl,dl
17 [ ]*[a-f0-9]+: 00 d1 add cl,dl
18 [ ]*[a-f0-9]+: 02 ca add.s cl,dl
27 [ ]*[a-f0-9]+: 10 d1 adc cl,dl
28 [ ]*[a-f0-9]+: 12 ca adc.s cl,dl
33 [ ]*[a-f0-9]+: 10 d1 adc cl,dl
34 [ ]*[a-f0-9]+: 12 ca adc.s cl,dl
43 [ ]*[a-f0-9]+: 20 d1 and cl,dl
44 [ ]*[a-f0-9]+: 22 ca and.s cl,dl
[all …]
Dx86-64-sse2avx-opts.d12 [ ]*[a-f0-9]+: 00 d1 addb %dl,%cl
13 [ ]*[a-f0-9]+: 02 ca addb.s %dl,%cl
18 [ ]*[a-f0-9]+: 00 d1 addb %dl,%cl
19 [ ]*[a-f0-9]+: 02 ca addb.s %dl,%cl
28 [ ]*[a-f0-9]+: 10 d1 adcb %dl,%cl
29 [ ]*[a-f0-9]+: 12 ca adcb.s %dl,%cl
34 [ ]*[a-f0-9]+: 10 d1 adcb %dl,%cl
35 [ ]*[a-f0-9]+: 12 ca adcb.s %dl,%cl
44 [ ]*[a-f0-9]+: 20 d1 andb %dl,%cl
45 [ ]*[a-f0-9]+: 22 ca andb.s %dl,%cl
[all …]
Dx86-64-sse2avx-opts-intel.d12 [ ]*[a-f0-9]+: 00 d1 add cl,dl
13 [ ]*[a-f0-9]+: 02 ca add.s cl,dl
18 [ ]*[a-f0-9]+: 00 d1 add cl,dl
19 [ ]*[a-f0-9]+: 02 ca add.s cl,dl
28 [ ]*[a-f0-9]+: 10 d1 adc cl,dl
29 [ ]*[a-f0-9]+: 12 ca adc.s cl,dl
34 [ ]*[a-f0-9]+: 10 d1 adc cl,dl
35 [ ]*[a-f0-9]+: 12 ca adc.s cl,dl
44 [ ]*[a-f0-9]+: 20 d1 and cl,dl
45 [ ]*[a-f0-9]+: 22 ca and.s cl,dl
[all …]
Dx86-64-opts.d10 [ ]*[a-f0-9]+: 00 d1 addb %dl,%cl
11 [ ]*[a-f0-9]+: 02 ca addb.s %dl,%cl
16 [ ]*[a-f0-9]+: 00 d1 addb %dl,%cl
17 [ ]*[a-f0-9]+: 02 ca addb.s %dl,%cl
26 [ ]*[a-f0-9]+: 10 d1 adcb %dl,%cl
27 [ ]*[a-f0-9]+: 12 ca adcb.s %dl,%cl
32 [ ]*[a-f0-9]+: 10 d1 adcb %dl,%cl
33 [ ]*[a-f0-9]+: 12 ca adcb.s %dl,%cl
42 [ ]*[a-f0-9]+: 20 d1 andb %dl,%cl
43 [ ]*[a-f0-9]+: 22 ca andb.s %dl,%cl
[all …]
Dx86-64-sse4_2.s5 crc32 %cl,%ebx
6 crc32 %cl,%rbx
14 crc32b %cl,%ebx
15 crc32b %cl,%rbx
43 crc32 ebx,cl
44 crc32 rbx,cl
52 crc32 ebx,cl
53 crc32 rbx,cl
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ilp32/
Dx86-64-opts-intel.d11 [ ]*[a-f0-9]+: 00 d1 add cl,dl
12 [ ]*[a-f0-9]+: 02 ca add.s cl,dl
17 [ ]*[a-f0-9]+: 00 d1 add cl,dl
18 [ ]*[a-f0-9]+: 02 ca add.s cl,dl
27 [ ]*[a-f0-9]+: 10 d1 adc cl,dl
28 [ ]*[a-f0-9]+: 12 ca adc.s cl,dl
33 [ ]*[a-f0-9]+: 10 d1 adc cl,dl
34 [ ]*[a-f0-9]+: 12 ca adc.s cl,dl
43 [ ]*[a-f0-9]+: 20 d1 and cl,dl
44 [ ]*[a-f0-9]+: 22 ca and.s cl,dl
[all …]
Dx86-64-sse2avx-opts-intel.d12 [ ]*[a-f0-9]+: 00 d1 add cl,dl
13 [ ]*[a-f0-9]+: 02 ca add.s cl,dl
18 [ ]*[a-f0-9]+: 00 d1 add cl,dl
19 [ ]*[a-f0-9]+: 02 ca add.s cl,dl
28 [ ]*[a-f0-9]+: 10 d1 adc cl,dl
29 [ ]*[a-f0-9]+: 12 ca adc.s cl,dl
34 [ ]*[a-f0-9]+: 10 d1 adc cl,dl
35 [ ]*[a-f0-9]+: 12 ca adc.s cl,dl
44 [ ]*[a-f0-9]+: 20 d1 and cl,dl
45 [ ]*[a-f0-9]+: 22 ca and.s cl,dl
[all …]
Dx86-64-sse2avx-opts.d12 [ ]*[a-f0-9]+: 00 d1 addb %dl,%cl
13 [ ]*[a-f0-9]+: 02 ca addb.s %dl,%cl
18 [ ]*[a-f0-9]+: 00 d1 addb %dl,%cl
19 [ ]*[a-f0-9]+: 02 ca addb.s %dl,%cl
28 [ ]*[a-f0-9]+: 10 d1 adcb %dl,%cl
29 [ ]*[a-f0-9]+: 12 ca adcb.s %dl,%cl
34 [ ]*[a-f0-9]+: 10 d1 adcb %dl,%cl
35 [ ]*[a-f0-9]+: 12 ca adcb.s %dl,%cl
44 [ ]*[a-f0-9]+: 20 d1 andb %dl,%cl
45 [ ]*[a-f0-9]+: 22 ca andb.s %dl,%cl
[all …]
Dx86-64-opts.d11 [ ]*[a-f0-9]+: 00 d1 addb %dl,%cl
12 [ ]*[a-f0-9]+: 02 ca addb.s %dl,%cl
17 [ ]*[a-f0-9]+: 00 d1 addb %dl,%cl
18 [ ]*[a-f0-9]+: 02 ca addb.s %dl,%cl
27 [ ]*[a-f0-9]+: 10 d1 adcb %dl,%cl
28 [ ]*[a-f0-9]+: 12 ca adcb.s %dl,%cl
33 [ ]*[a-f0-9]+: 10 d1 adcb %dl,%cl
34 [ ]*[a-f0-9]+: 12 ca adcb.s %dl,%cl
43 [ ]*[a-f0-9]+: 20 d1 andb %dl,%cl
44 [ ]*[a-f0-9]+: 22 ca andb.s %dl,%cl
[all …]
/toolchain/binutils/binutils-2.25/libiberty/
Dsimple-object-elf.c696 unsigned char cl; in simple_object_elf_write_ehdr() local
704 cl = attrs->ei_class; in simple_object_elf_write_ehdr()
716 ehdr_size = (cl == ELFCLASS32 in simple_object_elf_write_ehdr()
725 buf[EI_CLASS] = cl; in simple_object_elf_write_ehdr()
730 ELF_SET_FIELD (fns, cl, Ehdr, buf, e_type, Elf_Half, ET_REL); in simple_object_elf_write_ehdr()
731 ELF_SET_FIELD (fns, cl, Ehdr, buf, e_machine, Elf_Half, attrs->machine); in simple_object_elf_write_ehdr()
732 ELF_SET_FIELD (fns, cl, Ehdr, buf, e_version, Elf_Word, EV_CURRENT); in simple_object_elf_write_ehdr()
735 ELF_SET_FIELD (fns, cl, Ehdr, buf, e_shoff, Elf_Addr, ehdr_size); in simple_object_elf_write_ehdr()
736 ELF_SET_FIELD (fns, cl, Ehdr, buf, e_flags, Elf_Word, attrs->flags); in simple_object_elf_write_ehdr()
737 ELF_SET_FIELD (fns, cl, Ehdr, buf, e_ehsize, Elf_Half, ehdr_size); in simple_object_elf_write_ehdr()
[all …]
/toolchain/binutils/binutils-2.25/opcodes/
Dlm32-dis.c459 cpu_desc_list *cl = 0; in print_insn_lm32() local
509 for (cl = cd_list; cl; cl = cl->next) in print_insn_lm32()
511 if (cgen_bitset_compare (cl->isa, isa) == 0 && in print_insn_lm32()
512 cl->mach == mach && in print_insn_lm32()
513 cl->endian == endian) in print_insn_lm32()
515 cd = cl->cd; in print_insn_lm32()
543 cl = xmalloc (sizeof (struct cpu_desc_list)); in print_insn_lm32()
544 cl->cd = cd; in print_insn_lm32()
545 cl->isa = prev_isa; in print_insn_lm32()
546 cl->mach = mach; in print_insn_lm32()
[all …]
Dor1k-dis.c453 cpu_desc_list *cl = 0; in print_insn_or1k() local
503 for (cl = cd_list; cl; cl = cl->next) in print_insn_or1k()
505 if (cgen_bitset_compare (cl->isa, isa) == 0 && in print_insn_or1k()
506 cl->mach == mach && in print_insn_or1k()
507 cl->endian == endian) in print_insn_or1k()
509 cd = cl->cd; in print_insn_or1k()
537 cl = xmalloc (sizeof (struct cpu_desc_list)); in print_insn_or1k()
538 cl->cd = cd; in print_insn_or1k()
539 cl->isa = prev_isa; in print_insn_or1k()
540 cl->mach = mach; in print_insn_or1k()
[all …]
Dxstormy16-dis.c480 cpu_desc_list *cl = 0; in print_insn_xstormy16() local
530 for (cl = cd_list; cl; cl = cl->next) in print_insn_xstormy16()
532 if (cgen_bitset_compare (cl->isa, isa) == 0 && in print_insn_xstormy16()
533 cl->mach == mach && in print_insn_xstormy16()
534 cl->endian == endian) in print_insn_xstormy16()
536 cd = cl->cd; in print_insn_xstormy16()
564 cl = xmalloc (sizeof (struct cpu_desc_list)); in print_insn_xstormy16()
565 cl->cd = cd; in print_insn_xstormy16()
566 cl->isa = prev_isa; in print_insn_xstormy16()
567 cl->mach = mach; in print_insn_xstormy16()
[all …]
Diq2000-dis.c501 cpu_desc_list *cl = 0; in print_insn_iq2000() local
551 for (cl = cd_list; cl; cl = cl->next) in print_insn_iq2000()
553 if (cgen_bitset_compare (cl->isa, isa) == 0 && in print_insn_iq2000()
554 cl->mach == mach && in print_insn_iq2000()
555 cl->endian == endian) in print_insn_iq2000()
557 cd = cl->cd; in print_insn_iq2000()
585 cl = xmalloc (sizeof (struct cpu_desc_list)); in print_insn_iq2000()
586 cl->cd = cd; in print_insn_iq2000()
587 cl->isa = prev_isa; in print_insn_iq2000()
588 cl->mach = mach; in print_insn_iq2000()
[all …]
Dip2k-dis.c600 cpu_desc_list *cl = 0; in print_insn_ip2k() local
650 for (cl = cd_list; cl; cl = cl->next) in print_insn_ip2k()
652 if (cgen_bitset_compare (cl->isa, isa) == 0 && in print_insn_ip2k()
653 cl->mach == mach && in print_insn_ip2k()
654 cl->endian == endian) in print_insn_ip2k()
656 cd = cl->cd; in print_insn_ip2k()
684 cl = xmalloc (sizeof (struct cpu_desc_list)); in print_insn_ip2k()
685 cl->cd = cd; in print_insn_ip2k()
686 cl->isa = prev_isa; in print_insn_ip2k()
687 cl->mach = mach; in print_insn_ip2k()
[all …]

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