| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/ |
| D | addsub.s | 27 .macro adjust_rm op, rd, rn, rm_r, rm_n, extend, amount
31 .ifnc \extend, UXTX
32 .ifnc \extend, SXTX
33 .ifnc \extend, LSL
35 \op \rd, \rn, W\()\rm_n, \extend
37 \op \rd, \rn, W\()\rm_n, \extend #\amount
46 \op \rd, \rn, \rm_r\()\rm_n, \extend
48 \op \rd, \rn, \rm_r\()\rm_n, \extend #\amount
55 .macro do_addsub_ext type, op, Rn, reg, extend, amount
58 .ifb \extend
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| D | ldst-reg-reg-offset.s | 76 .macro extend op macro
83 extend \op
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| D | diagnostic.l | 24 [^:]*:26: Error: extend operator expected at operand 3 -- `add sp,x0,x7,lsr#2'
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| /toolchain/binutils/binutils-2.25/opcodes/ |
| D | mips-dis.c | 1828 unsigned extend, bfd_boolean is_offset) in print_mips16_insn_arg() argument
1837 extend = 0; in print_mips16_insn_arg()
1864 amask = extend & 0xf; in print_mips16_insn_arg()
1890 frame_size = ((extend & 0xf0) | (insn & 0x0f)) * 8; in print_mips16_insn_arg()
1898 nsreg = (extend >> 8) & 0x7; in print_mips16_insn_arg()
1940 uval = ((insn & 0x1f) << 21) | ((insn & 0x3e0) << 11) | extend; in print_mips16_insn_arg()
1952 uval |= ((extend & 0x1f) << 11) | (extend & 0x7e0); in print_mips16_insn_arg()
1954 uval |= ((extend & 0xf) << 11) | (extend & 0x7f0); in print_mips16_insn_arg()
1956 uval = ((extend >> 6) & 0x1f) | (extend & 0x20); in print_mips16_insn_arg()
2031 int extend = 0; in print_insn_mips16() local
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| D | ChangeLog-2011 | 538 * arm-dis.c (print_insn_thumb32): Do not sign extend addresses
730 (OP_sI): Handle b_T_mode. Properly sign-extend byte.
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| D | cgen-ibld.in | 486 /* sign extend? */
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| D | ChangeLog-2012 | 861 * rx-decode.opc (MOV): Do not sign-extend immediates which are
961 (FIELDD): Sign extend with xor,sub.
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| /toolchain/binutils/binutils-2.25/gas/doc/ |
| D | c-lm32.texi | 42 @cindex @code{-msign-extend-enabled} command line option, LM32
43 @item -msign-extend-enabled
44 Enable sign extend instructions.
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| D | c-i386.texi | 508 There are a few exceptions. The sign extend and zero extend
510 sign/zero extend @emph{from} and a size to zero extend @emph{to}. This
512 syntax. Base names for sign extend and zero extend are
517 ``move sign extend @emph{from} %al @emph{to} %edx.'' Possible suffixes,
539 @samp{cbw} --- sign-extend byte in @samp{%al} to word in @samp{%ax},
542 @samp{cwde} --- sign-extend word in @samp{%ax} to long in @samp{%eax},
545 @samp{cwd} --- sign-extend word in @samp{%ax} to long in @samp{%dx:%ax},
548 @samp{cdq} --- sign-extend dword in @samp{%eax} to quad in @samp{%edx:%eax},
551 @samp{cdqe} --- sign-extend dword in @samp{%eax} to quad in @samp{%rax}
555 @samp{cqo} --- sign-extend quad in @samp{%rax} to octuple in
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| D | c-xgate.texi | 195 @cindex @code{extend} directive XGATE
197 @item .extend
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| D | c-bfin.texi | 95 One instruction may extend across multiple lines or more than one
102 Comments are introduced by the @samp{#} character and extend to the
168 extend beyond bit 31.
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| D | c-m68hc11.texi | 388 @cindex @code{extend} directive M68HC11
390 @item .extend
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| D | c-arm.texi | 140 accept various extension mnemonics that extend the processor using the
667 @cindex @code{.extend} directive, ARM
669 @item .extend @var{expression} [, @var{expression}]*
729 See @code{.extend}.
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| D | c-pdp11.texi | 323 Comments are started with a @code{#} or a @code{/} character, and extend
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| D | c-aarch64.texi | 68 accept, or restrict, various extension mnemonics that extend the
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| D | c-m68k.texi | 413 @cindex @code{extend} directive M680x0
415 @item .extend
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/score/ |
| D | addi.s | 29 \insn16 r15, 15 #No transform. Because 2**15 = 32768, extend range of addi
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| /toolchain/binutils/binutils-2.25/cpu/ |
| D | lm32.cpu | 598 (dni sextb "sign extend byte" ()
605 (dni sexth "sign extend half-word" ()
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| D | mt.opc | 201 /* Parse hex values like 0xffff as unsigned, and sign extend
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| D | mep-core.cpu | 521 (define-pmacro (extend-cdisp10 val)
531 ((value pc) (extend-cdisp10 value))
532 ((value pc) (extend-cdisp10 value))
1352 (dnci extb "sign extend byte" ()
1359 (dnci exth "sign extend half-word" ()
1366 (dnci extub "zero extend byte" ()
1373 (dnci extuh "zero extend half-word" ()
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| D | ChangeLog | 203 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
205 (media-arith-sat-semantics): Explicitly sign- or zero-extend
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| D | or1korbis.cpu | 223 "extend byte/half opcode enums" ((MACH ORBIS-MACHS))
233 "extend word opcode enums" ((MACH ORBIS-MACHS))
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| /toolchain/binutils/binutils-2.25/opcodes/po/ |
| D | opcodes.pot | 118 msgid "invalid extend/shift operator"
164 msgid "extend operator expected"
168 msgid "missing extend operator"
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| /toolchain/binutils/binutils-2.25/gold/ |
| D | layout.h | 93 init(off_t len, bool extend);
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| /toolchain/binutils/binutils-2.25/ld/emultempl/ |
| D | sh64elf.em | 238 /* Size up and extend the .cranges section, merging generated entries. */
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