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Searched refs:op5 (Results 1 – 3 of 3) sorted by relevance

/toolchain/binutils/binutils-2.25/include/opcode/
Dnds32.h95 #define N16_TYPE55(op5, rt5, ra5) \ argument
96 (0x8000 | __MF (N16_T55_##op5, 10, 5) | __MF (rt5, 5, 5) \
119 #define N16_TYPE10(op5, imm10) \ argument
120 (0x8000 | __MF (N16_T10_##op5, 10, 5) | __MF (imm10, 0, 10))
/toolchain/binutils/binutils-2.25/cpu/
Dfr30.cpu147 (dnf f-op5 "5th bit of opcode" () 4 1)
260 ; insn-op5: bit 4 (5th bit origin 0)
262 (define-normal-insn-enum insn-op5 "insn op5 enums" () OP5_ f-op5
Dxstormy16.cpu261 (dnf f-op5 "opcode" () 16 4)
262 (define-normal-insn-enum insn-op5 "insn op enums" () OP5_ f-op5
264 (dnop bcond5 "branch condition opcode" () h-branchcond f-op5)