/toolchain/binutils/binutils-2.25/opcodes/ |
D | w65-opc.h | 410 print_operand (0, " #$0", args);\ 415 print_operand (0, " #$0", args);\ 420 print_operand (0, " #$0", args);\ 424 print_operand (0, " a", 0);\ 429 print_operand (0, " $0", args);\ 434 print_operand (0, " $0", args);\ 445 print_operand (1, " <$0", args);\ 450 print_operand (1, " <$0,x", args);\ 455 print_operand (1, " <$0,y", args);\ 460 print_operand (1, " (<$0)", args);\ [all …]
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D | pdp11-dis.c | 83 print_operand (bfd_vma *memaddr, int code, disassemble_info *info) in print_operand() function 183 return print_operand (memaddr, code, info); in print_foperand() 229 if (print_operand (&memaddr, dst, info) < 0) in print_insn_pdp11() 247 if (print_operand (&memaddr, dst, info) < 0) in print_insn_pdp11() 253 if (print_operand (&memaddr, dst, info) < 0) in print_insn_pdp11() 287 if (print_operand (&memaddr, dst, info) < 0) in print_insn_pdp11() 296 if (print_operand (&memaddr, dst, info) < 0) in print_insn_pdp11() 305 if (print_operand (&memaddr, src, info) < 0) in print_insn_pdp11() 308 if (print_operand (&memaddr, dst, info) < 0) in print_insn_pdp11()
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D | d10v-dis.c | 31 print_operand (struct d10v_operand *oper, in print_operand() function 174 print_operand (oper, insn, op, memaddr, info); in dis_long() 224 print_operand (oper, ins[j], op, memaddr, info); in dis_2_short()
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D | tic80-dis.c | 101 print_operand (struct disassemble_info *info, in print_operand() function 238 print_operand (info, value, insn, operand, memaddr); in print_one_instruction()
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D | w65-dis.c | 35 print_operand (int lookup, char *format, int *args) in print_operand() function
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D | lm32-dis.c | 164 cd->print_operand = lm32_cgen_print_operand; in lm32_cgen_init_dis()
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D | or1k-dis.c | 158 cd->print_operand = or1k_cgen_print_operand; in or1k_cgen_init_dis()
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D | xstormy16-dis.c | 185 cd->print_operand = xstormy16_cgen_print_operand; in xstormy16_cgen_init_dis()
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D | iq2000-dis.c | 206 cd->print_operand = iq2000_cgen_print_operand; in iq2000_cgen_init_dis()
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D | ip2k-dis.c | 305 cd->print_operand = ip2k_cgen_print_operand; in ip2k_cgen_init_dis()
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D | m32r-dis.c | 296 cd->print_operand = m32r_cgen_print_operand; in m32r_cgen_init_dis()
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D | fr30-dis.c | 316 cd->print_operand = fr30_cgen_print_operand; in fr30_cgen_init_dis()
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D | epiphany-dis.c | 294 cd->print_operand = epiphany_cgen_print_operand; in epiphany_cgen_init_dis()
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D | mt-dis.c | 307 cd->print_operand = mt_cgen_print_operand; in mt_cgen_init_dis()
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D | frv-dis.c | 413 cd->print_operand = frv_cgen_print_operand; in frv_cgen_init_dis()
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D | xc16x-dis.c | 437 cd->print_operand = xc16x_cgen_print_operand; in xc16x_cgen_init_dis()
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D | ChangeLog-9899 | 882 * d10v-dis.c (print_operand): If num is nonzero, then 1413 * w65-dis.c (print_operand): Likewise. 1586 * d10v-dis.c (print_operand): Likewise. 1641 (print_operand): If there's a reloc, don't calculate the
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D | m32c-dis.c | 908 cd->print_operand = m32c_cgen_print_operand; in m32c_cgen_init_dis()
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D | mep-dis.c | 1204 cd->print_operand = mep_cgen_print_operand; in mep_cgen_init_dis()
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D | ChangeLog-0001 | 39 * d10v-dis.c (print_operand): Apply REGISTER_MASK to `num' of 42 * d10v-dis.c (print_operand): Disregard OPERAND_SP in register
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D | ChangeLog-9297 | 89 * d10v-dis.c (print_operand): 915 * d10v-dis.c (print_operand): Change address printing 1794 * d10v-dis.c (print_operand): Now uses pre_defined_registers
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D | ChangeLog-0203 | 1781 * pdp11-dis.c (print_operand): Clean up formatting for mode 67.
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/toolchain/binutils/binutils-2.25/include/opcode/ |
D | cgen.h | 1284 void (*print_operand) member 1290 void (*print_operand) (); member 1295 #define CGEN_CPU_PRINT_OPERAND(cd) ((cd)->print_operand)
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/toolchain/binutils/binutils-2.25/gas/config/ |
D | tc-crx.c | 159 static void print_operand (int, int, argument *); 1252 print_operand (int nbits, int shift, argument *arg) in print_operand() function 1640 print_operand (cur_size[i], instruction->operands[i].shift, in assemble_insn()
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D | tc-cr16.c | 1876 print_operand (int nbits, int shift, argument *arg) in print_operand() function 2392 print_operand (cur_size[i], instruction->operands[i].shift, in assemble_insn()
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