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Searched refs:uimm5 (Results 1 – 17 of 17) sorted by relevance

/toolchain/binutils/binutils-2.25/gas/testsuite/gas/rx/
Dshlr.sm1 shlr #{uimm5},{reg}
3 shlr #{uimm5},{reg},{reg}
Dshll.sm1 shll #{uimm5},{reg}
3 shll #{uimm5},{reg},{reg}
Dshar.sm1 shar #{uimm5},{reg}
3 shar #{uimm5},{reg},{reg}
Drotl.sm1 rotl #{uimm5},{reg}
Drotr.sm1 rotr #{uimm5},{reg}
Dbmcnd.sm2 bm{cnd} #{uimm5}, {reg}
Dbtst.sm4 btst #{uimm5}, {reg}
Dbnot.sm4 bnot #{uimm5}, {reg}
Dbset.sm4 bset #{uimm5}, {reg}
Dbclr.sm4 bclr #{uimm5}, {reg}
Dmacros.inc20 macro uimm5 {0;31}
/toolchain/binutils/binutils-2.25/gas/config/
Dbfin-parse.y213 #define uimm5(x) EXPR_VALUE (x) macro
2184 $$ = DSP32SHIFTIMM (1, &$1, -uimm5 ($5), &$3, 2, 0);
2215 $$ = DSP32SHIFTIMM (0, &$1, -uimm5 ($5), &$3, 2, HL2 ($1, $3));
2225 $$ = DSP32SHIFTIMM (0, &$1, -uimm5 ($5), &$3,
2241 $$ = DSP32SHIFTIMM (1, &$1, -uimm5 ($5), &$3, $6.s0, 0);
2246 $$ = DSP32SHIFTIMM (2, &$1, -uimm5 ($5), &$3, $6.s0, 0);
2443 $$ = LOGI2OP ($3, uimm5 ($5), 4);
2455 $$ = LOGI2OP ($3, uimm5 ($5), 2);
2467 $$ = LOGI2OP ($3, uimm5 ($5), 3);
2478 $$ = LOGI2OP ($5, uimm5 ($7), 0);
[all …]
/toolchain/binutils/binutils-2.25/opcodes/
Dbfin-dis.c456 #define uimm5(x) fmtconst (c_uimm5, x, 0, outf) macro
1568 OUTS (outf, uimm5 (src)); in decode_LOGI2op_0()
1579 OUTS (outf, uimm5 (src)); in decode_LOGI2op_0()
1590 OUTS (outf, uimm5 (src)); in decode_LOGI2op_0()
1601 OUTS (outf, uimm5 (src)); in decode_LOGI2op_0()
1612 OUTS (outf, uimm5 (src)); in decode_LOGI2op_0()
1622 OUTS (outf, uimm5 (src)); in decode_LOGI2op_0()
1628 OUTS (outf, uimm5 (src)); in decode_LOGI2op_0()
1634 OUTS (outf, uimm5 (src)); in decode_LOGI2op_0()
4373 OUTS (outf, uimm5 (immag)); in decode_dsp32shiftimm_0()
[all …]
/toolchain/binutils/binutils-2.25/include/opcode/
Dcr16.h124 uimm3, uimm3_1, uimm4, uimm4_1, uimm5, uimm16, uimm20, uimm32, enumerator
/toolchain/binutils/binutils-2.25/cpu/
Dmep-core.cpu763 (dnop uimm5 "bit/shift val (5 bits)" (all-mep-core-isas) h-uint f-5u8)
1512 "slt3 \\$0,$rn,$uimm5"
1513 (+ MAJ_6 rn uimm5 (f-sub3 1))
1514 (if (lt rn (zext SI uimm5))
1521 "sltu3 \\$0,$rn,$uimm5"
1522 (+ MAJ_6 rn uimm5 (f-sub3 5))
1523 (if (ltu rn (zext SI uimm5))
1653 "sra $rn,$uimm5"
1654 (+ MAJ_6 rn uimm5 (f-sub3 3))
1655 (set rn (sra rn uimm5))
[all …]
Dm32r.cpu474 (dnf f-uimm5 "uimm5" () 11 5)
677 (duhpo uimm5 "5 bit shift count" () h-uint f-uimm5)
2034 (.str sym "i $dr,$uimm5")
2035 (+ OP1_5 (f-shift-op2 op2-i-op) dr uimm5)
2036 (set dr (sem-op dr uimm5))
DChangeLog116 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX