| /external/llvm/lib/Target/ARM/ |
| D | ARMHazardRecognizer.cpp | 19 static bool hasRAWHazard(MachineInstr *DefMI, MachineInstr *MI, in hasRAWHazard()
45 MachineInstr *DefMI = LastMI; in getHazardType() local
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| D | MLxExpansionPass.cpp | 95 MachineInstr *DefMI = MRI->getVRegDef(Reg); in getAccDefMI() local
149 MachineInstr *DefMI = MRI->getVRegDef(Reg); in hasLoopHazard() local
220 MachineInstr *DefMI = getAccDefMI(MI); in FindMLxHazard() local
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| D | ARMBaseInstrInfo.cpp | 1891 MachineInstr *DefMI = canFoldIntoMOVCC(MI->getOperand(2).getReg(), MRI, this); in optimizeSelect() local
2637 MachineInstr *DefMI, unsigned Reg, in FoldImmediate()
3463 const MachineInstr *DefMI, in adjustDefLatency()
3644 const MachineInstr *DefMI, unsigned DefIdx, in getOperandLatency()
4038 const MachineInstr *DefMI, unsigned DefIdx, in hasHighOperandLatency()
4058 const MachineInstr *DefMI, unsigned DefIdx) const { in hasLowDefLatency() argument
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| /external/llvm/lib/CodeGen/ |
| D | LiveRangeEdit.cpp | 52 const MachineInstr *DefMI, in checkRematerializable()
66 MachineInstr *DefMI = LIS.getInstructionFromIndex(VNI->def); in scanRemattable() local
166 MachineInstr *DefMI = nullptr, *UseMI = nullptr; in foldAsLoad() local
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| D | TargetSchedule.cpp | 155 const MachineInstr *DefMI, unsigned DefOperIdx, in computeOperandLatency()
268 computeOutputLatency(const MachineInstr *DefMI, unsigned DefOperIdx, in computeOutputLatency()
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| D | MachineTraceMetrics.cpp | 602 const MachineInstr *DefMI; member
761 const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg); in computeCrossBlockCriticalPath() local
951 addLiveIns(const MachineInstr *DefMI, unsigned DefOp, in addLiveIns()
1108 const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg); in computeInstrHeights() local
1251 bool MachineTraceMetrics::Trace::isDepInTrace(const MachineInstr *DefMI, in isDepInTrace()
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| D | MachineSink.cpp | 174 MachineInstr *DefMI = MRI->getVRegDef(SrcReg); in INITIALIZE_PASS_DEPENDENCY() local
393 MachineInstr *DefMI = MRI->getVRegDef(Reg); in isWorthBreakingCriticalEdge() local
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| D | InlineSpiller.cpp | 113 MachineInstr *DefMI; member
665 MachineInstr *DefMI = nullptr; in analyzeSiblingValues() local
740 MachineInstr *DefMI = LIS.getInstructionFromIndex(SVI.SpillVNI->def); in hoistSpill() local
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| D | TargetInstrInfo.cpp | 1058 const MachineInstr *DefMI, in hasLowDefLatency()
1073 const MachineInstr *DefMI, unsigned DefIdx, in getOperandLatency()
1110 const MachineInstr *DefMI, unsigned DefIdx, in computeOperandLatency()
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| D | RegisterCoalescer.cpp | 654 MachineInstr *DefMI = LIS->getInstructionFromIndex(AValNo->def); in removeCopyByCommutingDef() local
887 MachineInstr *DefMI = LIS->getInstructionFromIndex(ValNo->def); in reMaterializeTrivialDef() local
1833 LaneBitmask JoinVals::computeWriteLanes(const MachineInstr *DefMI, bool &Redef) in computeWriteLanes() argument
1918 const MachineInstr *DefMI = nullptr; in analyzeValue() local
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| D | PHIElimination.cpp | 395 if (MachineInstr *DefMI = MRI->getVRegDef(SrcReg)) in LowerPHINode() local
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| D | EarlyIfConversion.cpp | 245 MachineInstr *DefMI = MRI->getVRegDef(Reg); in canSpeculateInstrs() local
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| D | MachineCSE.cpp | 133 MachineInstr *DefMI = MRI->getVRegDef(Reg); in INITIALIZE_PASS_DEPENDENCY() local
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| D | TailDuplication.cpp | 251 MachineInstr *DefMI = MRI->getVRegDef(VReg); in TailDuplicateAndUpdate() local
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| D | AggressiveAntiDepBreaker.cpp | 702 MachineInstr *DefMI = Q.second.Operand->getParent(); in FindSuitableFreeRegisters() local
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| /external/llvm/lib/Target/X86/ |
| D | X86OptimizeLEAs.cpp | 132 for (auto DefMI : List) { in chooseBestLEA() local
258 MachineInstr *DefMI; in removeRedundantAddrCalc() local
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| D | X86CallFrameOptimization.cpp | 543 MachineBasicBlock::iterator DefMI = MRI->getVRegDef(Reg); in canFoldIntoRegPush() local
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCVSXSwapRemoval.cpp | 614 MachineInstr* DefMI = MRI->getVRegDef(Reg); in formWebs() local
694 MachineInstr *DefMI = MRI->getVRegDef(UseReg); in recordUnoptimizableWebs() local
750 MachineInstr *DefMI = MRI->getVRegDef(UseReg); in markSwapsForRemoval() local
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| D | PPCMIPeephole.cpp | 124 MachineInstr *DefMI = MRI->getVRegDef(TrueReg1); in simplifyCode() local
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| D | PPCInstrInfo.h | 131 const MachineInstr *DefMI, in hasLowDefLatency()
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| D | PPCInstrInfo.cpp | 141 const MachineInstr *DefMI, unsigned DefIdx, in getOperandLatency()
1188 bool PPCInstrInfo::FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI, in FoldImmediate()
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| /external/llvm/include/llvm/Target/ |
| D | TargetInstrInfo.h | 1122 MachineInstr *&DefMI) const { in optimizeLoadInstr()
1132 virtual bool FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI, in FoldImmediate()
1206 const MachineInstr *DefMI, unsigned DefIdx, in hasHighOperandLatency()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsOptimizePICCall.cpp | 261 MachineInstr *DefMI = MRI.getVRegDef(Reg); in isCallViaRegister() local
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 285 const MachineInstr *DefMI = MRI.getVRegDef(VReg); in removeCopies() local
303 const MachineInstr *DefMI = MRI.getVRegDef(VReg); in canFoldIntoCSel() local
2954 MachineInstr *DefMI = MRI->getVRegDef(VReg); in optimizeCondBranch() local
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| D | AArch64ExpandPseudoInsts.cpp | 62 MachineInstrBuilder &DefMI) { in transferImpOps()
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