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Searched defs:EndIdx (Results 1 – 9 of 9) sorted by relevance

/external/llvm/utils/TableGen/
DCodeGenRegisters.cpp1554 for (unsigned SubIdx = 0, EndIdx = RegUnitSets.size(); in pruneUnitSets() local
1648 for (unsigned Idx = 0, EndIdx = RegUnitSets.size(); Idx != EndIdx; ++Idx) { in computeRegUnitSets() local
1829 for (unsigned Idx = 0, EndIdx = RegUnitSets.size(); Idx != EndIdx; ++Idx) in computeDerivedInfo() local
1834 for (unsigned Idx = 0, EndIdx = RegUnitSets.size(); Idx != EndIdx; ++Idx) in computeDerivedInfo() local
1842 for (unsigned Idx = 0, EndIdx = RegUnitSets.size(); Idx != EndIdx; ++Idx) { in computeDerivedInfo() local
DSubtargetEmitter.cpp975 for (unsigned UseIdx = 0, EndIdx = Reads.size(); in GenSchedClassTables() local
/external/llvm/lib/CodeGen/
DPostRASchedulerList.cpp152 void setEndIndex(unsigned EndIdx) { EndIndex = EndIdx; } in setEndIndex()
DLiveInterval.cpp790 SlotIndex EndIdx = Indexes.getMBBEndIdx(MBB); in searchForVNI() local
/external/llvm/lib/Target/AArch64/
DAArch64ExpandPseudoInsts.cpp292 int EndIdx = NotSet; in trySequenceOfOnes() local
DAArch64InstrInfo.cpp715 for (unsigned OpIdx = 0, EndIdx = Instr->getNumOperands(); OpIdx < EndIdx; in UpdateOperandRegClass() local
/external/llvm/lib/Transforms/InstCombine/
DInstCombineVectorOps.cpp821 unsigned EndIdx = Mask.back(); in isShuffleExtractingFromLHS() local
/external/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp866 unsigned StartIdx, EndIdx; member
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp8144 int EndIdx = in lowerVectorShuffleAsBroadcast() local