| /external/llvm/lib/Target/Sparc/ |
| D | SparcRegisterInfo.cpp | 113 unsigned FramePtr) in replaceFI() argument
119 MI.getOperand(FIOperandNum).ChangeToRegister(FramePtr, false); in replaceFI()
139 .addReg(FramePtr); in replaceFI()
157 .addReg(FramePtr); in replaceFI()
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| /external/llvm/lib/Target/ARM/ |
| D | Thumb1FrameLowering.cpp | 108 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue() local
164 if (Reg == FramePtr) in emitPrologue()
241 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr) in emitPrologue()
247 nullptr, MRI->getDwarfRegNum(FramePtr, true), CFAOffset)); in emitPrologue()
254 nullptr, MRI->getDwarfRegNum(FramePtr, true))); in emitPrologue()
339 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitEpilogue() local
368 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes, in emitEpilogue()
376 .addReg(FramePtr)); in emitEpilogue()
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| D | ARMFrameLowering.cpp | 313 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue() local
372 if (Reg == FramePtr) in emitPrologue()
527 dl, TII, FramePtr, ARM::SP, in emitPrologue()
532 nullptr, MRI->getDwarfRegNum(FramePtr, true), in emitPrologue()
540 nullptr, MRI->getDwarfRegNum(FramePtr, true))); in emitPrologue()
710 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitEpilogue() local
748 emitARMRegPlusImmediate(MBB, MBBI, dl, ARM::SP, FramePtr, -NumBytes, in emitEpilogue()
760 emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes, in emitEpilogue()
770 .addReg(FramePtr).addImm((unsigned)ARMCC::AL).addReg(0).addReg(0); in emitEpilogue()
774 .addReg(FramePtr)); in emitEpilogue()
[all …]
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| D | ARMAsmPrinter.cpp | 1093 unsigned FramePtr = RegInfo->getFrameRegister(MF); in EmitUnwindingInstruction() local
1199 if (DstReg == FramePtr && FramePtr != ARM::SP) in EmitUnwindingInstruction()
1202 ATS.emitSetFP(FramePtr, ARM::SP, -Offset); in EmitUnwindingInstruction()
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| D | ARMExpandPseudoInsts.cpp | 915 unsigned FramePtr = RI.getFrameRegister(MF); in ExpandMI() local
921 FramePtr, -NumBytes, ARMCC::AL, 0, *TII); in ExpandMI()
924 FramePtr, -NumBytes, *TII, RI); in ExpandMI()
927 FramePtr, -NumBytes, ARMCC::AL, 0, in ExpandMI()
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| D | ARMFastISel.cpp | 2491 unsigned FramePtr = RegInfo->getFrameRegister(*(FuncInfo.MF)); in SelectIntrinsicCall() local
2492 unsigned SrcReg = FramePtr; in SelectIntrinsicCall()
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| /external/llvm/lib/Target/X86/ |
| D | X86FrameLowering.cpp | 927 unsigned FramePtr = TRI->getFrameRegister(MF); in emitPrologue() local
930 ? getX86SubSuperRegister(FramePtr, MVT::i64, false) in emitPrologue()
931 : FramePtr; in emitPrologue()
1061 .addImm(FramePtr) in emitPrologue()
1069 FramePtr) in emitPrologue()
1248 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), FramePtr), in emitPrologue()
1251 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rr), FramePtr) in emitPrologue()
1257 .addImm(FramePtr) in emitPrologue()
1347 FramePtr, true, X86FI->getRestoreBasePointerOffset()) in emitPrologue()
1363 .addReg(FramePtr) in emitPrologue()
[all …]
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| D | X86RegisterInfo.cpp | 72 FramePtr = Use64BitReg ? X86::RBP : X86::EBP; in X86RegisterInfo()
77 FramePtr = X86::EBP; in X86RegisterInfo()
519 if (!MRI->canReserveReg(FramePtr)) in canRealignStack()
551 BasePtr = (FrameIndex < 0 ? FramePtr : getBaseRegister()); in eliminateFrameIndex()
553 BasePtr = (FrameIndex < 0 ? FramePtr : StackPtr); in eliminateFrameIndex()
557 BasePtr = (TFI->hasFP(MF) ? FramePtr : StackPtr); in eliminateFrameIndex()
598 assert(BasePtr == FramePtr && "Expected the FP as base register"); in eliminateFrameIndex()
621 return TFI->hasFP(MF) ? FramePtr : StackPtr; in getFrameRegister()
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| D | X86RegisterInfo.h | 45 unsigned FramePtr; variable
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| D | X86ISelLowering.cpp | 22113 unsigned FramePtr = RegInfo->getFrameRegister(*MF); in emitEHSjLjSetJmp() local
22117 FramePtr, true, X86FI->getRestoreBasePointerOffset()) in emitEHSjLjSetJmp()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreFrameLowering.cpp | 35 static const unsigned FramePtr = XCore::R10; variable
152 FramePtr)); in GetSpillList()
306 BuildMI(MBB, MBBI, dl, TII.get(XCore::LDAWSP_ru6), FramePtr).addImm(0); in emitPrologue()
309 MRI->getDwarfRegNum(FramePtr, true)); in emitPrologue()
385 BuildMI(MBB, MBBI, dl, TII.get(XCore::SETSP_1r)).addReg(FramePtr); in emitEpilogue()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64FrameLowering.cpp | 206 unsigned FramePtr) const { in emitCalleeSavedFrameMoves()
239 if (HasFP && (FramePtr == Reg || Reg == AArch64::LR)) { in emitCalleeSavedFrameMoves()
407 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue() local
476 unsigned Reg = RegInfo->getDwarfRegNum(FramePtr, true); in emitPrologue()
507 emitCalleeSavedFrameMoves(MBB, MBBI, FramePtr); in emitPrologue()
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| D | AArch64FrameLowering.h | 29 unsigned FramePtr) const;
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| D | AArch64FastISel.cpp | 3311 unsigned FramePtr = RegInfo->getFrameRegister(*(FuncInfo.MF)); in fastLowerIntrinsicCall() local
3314 TII.get(TargetOpcode::COPY), SrcReg).addReg(FramePtr); in fastLowerIntrinsicCall()
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| /external/llvm/lib/CodeGen/ |
| D | SjLjEHPrepare.cpp | 412 Value *FramePtr = Builder.CreateConstGEP2_32(doubleUnderJBufTy, JBufPtr, 0, 0, in setupEntryBlockAndCallSites() local
416 Builder.CreateStore(Val, FramePtr, /*isVolatile=*/true); in setupEntryBlockAndCallSites()
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