| /external/llvm/lib/Target/ARM/InstPrinter/ |
| D | ARMInstPrinter.cpp | 116 const MCOperand &MO1 = MI->getOperand(1); in printInst() local
127 printRegName(O, MO1.getReg()); in printInst()
139 const MCOperand &MO1 = MI->getOperand(1); in printInst() local
149 printRegName(O, MO1.getReg()); in printInst()
362 const MCOperand &MO1 = MI->getOperand(OpNum); in printThumbLdrLabelOperand() local
363 if (MO1.isExpr()) { in printThumbLdrLabelOperand()
364 MO1.getExpr()->print(O, &MAI); in printThumbLdrLabelOperand()
370 int32_t OffImm = (int32_t)MO1.getImm(); in printThumbLdrLabelOperand()
392 const MCOperand &MO1 = MI->getOperand(OpNum); in printSORegRegOperand() local
396 printRegName(O, MO1.getReg()); in printSORegRegOperand()
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCCodeEmitter.cpp | 562 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); in EncodeAddrModeOpValues() local
566 int32_t SImm = MO1.getImm(); in EncodeAddrModeOpValues()
871 const MCOperand &MO1 = MI.getOperand(OpIdx); in getThumbAddrModeRegRegOpValue() local
873 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getThumbAddrModeRegRegOpValue()
1011 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); in getT2AddrModeImm0_1020s4OpValue() local
1013 unsigned Imm8 = MO1.getImm(); in getT2AddrModeImm0_1020s4OpValue()
1078 const MCOperand &MO1 = MI.getOperand(OpIdx+1); in getLdStSORegOpValue() local
1081 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getLdStSORegOpValue()
1130 const MCOperand &MO1 = MI.getOperand(OpIdx+1); in getAddrMode2OffsetOpValue() local
1131 unsigned Imm = MO1.getImm(); in getAddrMode2OffsetOpValue()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ExpandPseudoInsts.cpp | 652 const MachineOperand &MO1 = MI.getOperand(1); in expandMI() local
653 unsigned Flags = MO1.getTargetFlags(); in expandMI()
661 if (MO1.isGlobal()) { in expandMI()
662 MIB1.addGlobalAddress(MO1.getGlobal(), 0, Flags | AArch64II::MO_PAGE); in expandMI()
663 MIB2.addGlobalAddress(MO1.getGlobal(), 0, in expandMI()
665 } else if (MO1.isSymbol()) { in expandMI()
666 MIB1.addExternalSymbol(MO1.getSymbolName(), Flags | AArch64II::MO_PAGE); in expandMI()
667 MIB2.addExternalSymbol(MO1.getSymbolName(), in expandMI()
670 assert(MO1.isCPI() && in expandMI()
672 MIB1.addConstantPoolIndex(MO1.getIndex(), MO1.getOffset(), in expandMI()
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| /external/llvm/lib/Target/X86/ |
| D | X86OptimizeLEAs.cpp | 69 bool isIdenticalOp(const MachineOperand &MO1, const MachineOperand &MO2);
179 bool OptimizeLEAPass::isIdenticalOp(const MachineOperand &MO1, in isIdenticalOp() argument
181 return MO1.isIdenticalTo(MO2) && in isIdenticalOp()
182 (!MO1.isReg() || in isIdenticalOp()
183 !TargetRegisterInfo::isPhysicalRegister(MO1.getReg())); in isIdenticalOp()
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| D | X86FloatingPoint.cpp | 1301 const MachineOperand &MO1 = MI->getOperand(1); in handleSpecialFP() local
1303 bool KillsSrc = MI->killsRegister(MO1.getReg()); in handleSpecialFP()
1307 unsigned SrcFP = getFPReg(MO1); in handleSpecialFP()
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| D | X86InstrInfo.cpp | 6248 MachineOperand &MO1 = DataMI->getOperand(1); in unfoldMemoryOperand() local
6249 if (MO1.getImm() == 0) { in unfoldMemoryOperand()
6262 MO1.ChangeToRegister(MO0.getReg(), false); in unfoldMemoryOperand()
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| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64MCCodeEmitter.cpp | 267 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); in getAddSubImmOpValue() local
268 assert(AArch64_AM::getShiftType(MO1.getImm()) == AArch64_AM::LSL && in getAddSubImmOpValue()
270 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); in getAddSubImmOpValue()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonAsmPrinter.cpp | 399 MCOperand &MO1 = MappedInst.getOperand(1); in HexagonProcessInstruction() local
400 unsigned High = RI->getSubReg(MO1.getReg(), Hexagon::subreg_hireg); in HexagonProcessInstruction()
401 unsigned Low = RI->getSubReg(MO1.getReg(), Hexagon::subreg_loreg); in HexagonProcessInstruction()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMExpandPseudoInsts.cpp | 1023 const MachineOperand &MO1 = MI.getOperand(1); in ExpandMI() local
1024 const GlobalValue *GV = MO1.getGlobal(); in ExpandMI()
1076 const MachineOperand &MO1 = MI.getOperand(1); in ExpandMI() local
1077 const GlobalValue *GV = MO1.getGlobal(); in ExpandMI()
1078 unsigned TF = MO1.getTargetFlags(); in ExpandMI()
1089 .addGlobalAddress(GV, MO1.getOffset(), TF | LO16TF) in ExpandMI()
1094 .addGlobalAddress(GV, MO1.getOffset(), TF | HI16TF) in ExpandMI()
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| D | ARMAsmPrinter.cpp | 963 const MachineOperand &MO1 = MI->getOperand(1); in EmitJumpTableAddrs() local
964 unsigned JTI = MO1.getIndex(); in EmitJumpTableAddrs()
1010 const MachineOperand &MO1 = MI->getOperand(1); in EmitJumpTableInsts() local
1011 unsigned JTI = MO1.getIndex(); in EmitJumpTableInsts()
1036 const MachineOperand &MO1 = MI->getOperand(1); in EmitJumpTableTBInst() local
1037 unsigned JTI = MO1.getIndex(); in EmitJumpTableTBInst()
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| D | ARMBaseInstrInfo.cpp | 1470 const MachineOperand &MO1 = MI1->getOperand(1); in produceSameValue() local
1471 if (MO0.getOffset() != MO1.getOffset()) in produceSameValue()
1481 return MO0.getGlobal() == MO1.getGlobal(); in produceSameValue()
1486 int CPI1 = MO1.getIndex(); in produceSameValue()
1527 const MachineOperand &MO1 = MI1->getOperand(i); in produceSameValue() local
1528 if (!MO0.isIdenticalTo(MO1)) in produceSameValue()
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| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.cpp | 1122 const MCOperand MO1 = MI->getOperand(OpNum + 1); in printAMIndexedWB() local
1124 if (MO1.isImm()) { in printAMIndexedWB()
1125 O << ", #" << (MO1.getImm() * Scale); in printAMIndexedWB()
1127 assert(MO1.isExpr() && "Unexpected operand type!"); in printAMIndexedWB()
1129 MO1.getExpr()->print(O, &MAI); in printAMIndexedWB()
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| /external/llvm/lib/Target/Hexagon/AsmParser/ |
| D | HexagonAsmParser.cpp | 1462 MCOperand &MO1, MCOperand &MO2) { in makeCombineInst() argument
1466 TmpInst.addOperand(MO1); in makeCombineInst()
1807 MCOperand &MO1 = Inst.getOperand(1); in processInstruction() local
1815 Inst = makeCombineInst(Hexagon::A2_combineii, Rdd, MO1, MO2); in processInstruction()
1822 MCOperand &MO1 = Inst.getOperand(1); in processInstruction() local
1824 if (MO1.getExpr()->evaluateAsAbsolute(Value)) { in processInstruction()
1830 Inst = makeCombineInst(Hexagon::A4_combineii, Rdd, MO1, MO2); in processInstruction()
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| /external/llvm/docs/ |
| D | WritingAnLLVMBackend.rst | 1842 machine operand, ``MO1``, is extracted. The helper methods such as
1855 const MachineOperand &MO1 = MI.getOperand(CurOp++);
1857 if (MO1.isImmediate())
1858 emitConstant(MO1.getImm(), Size);
1864 if (MO1.isGlobalAddress()) {
1865 bool NeedStub = isa<Function>(MO1.getGlobal());
1866 bool isLazy = gvNeedsLazyPtr(MO1.getGlobal());
1867 emitGlobalAddress(MO1.getGlobal(), rt, MO1.getOffset(), 0,
1869 } else if (MO1.isExternalSymbol())
1870 emitExternalSymbolAddress(MO1.getSymbolName(), rt);
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