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Searched refs:TM (Results 1 – 25 of 580) sorted by relevance

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/external/llvm/lib/Target/Mips/
DMipsTargetObjectFile.cpp39 void MipsTargetObjectFile::Initialize(MCContext &Ctx, const TargetMachine &TM){ in Initialize() argument
40 TargetLoweringObjectFileELF::Initialize(Ctx, TM); in Initialize()
41 InitializeELF(TM.Options.UseInitArray); in Initialize()
48 this->TM = &static_cast<const MipsTargetMachine &>(TM); in Initialize()
63 IsGlobalInSmallSection(const GlobalValue *GV, const TargetMachine &TM) const { in IsGlobalInSmallSection()
68 return IsGlobalInSmallSectionImpl(GV, TM); in IsGlobalInSmallSection()
70 return IsGlobalInSmallSection(GV, TM, getKindForGlobal(GV, TM)); in IsGlobalInSmallSection()
76 IsGlobalInSmallSection(const GlobalValue *GV, const TargetMachine &TM, in IsGlobalInSmallSection() argument
78 return (IsGlobalInSmallSectionImpl(GV, TM) && in IsGlobalInSmallSection()
87 const TargetMachine &TM) const { in IsGlobalInSmallSectionImpl()
[all …]
DMipsTargetObjectFile.h20 const MipsTargetMachine *TM; variable
23 void Initialize(MCContext &Ctx, const TargetMachine &TM) override;
27 bool IsGlobalInSmallSection(const GlobalValue *GV, const TargetMachine &TM,
30 const TargetMachine &TM) const;
32 const TargetMachine &TM) const;
36 const TargetMachine &TM) const override;
40 const TargetMachine &TM) const;
DMips.h26 ModulePass *createMipsOs16Pass(MipsTargetMachine &TM);
27 ModulePass *createMips16HardFloatPass(MipsTargetMachine &TM);
29 FunctionPass *createMipsModuleISelDagPass(MipsTargetMachine &TM);
30 FunctionPass *createMipsOptimizePICCallPass(MipsTargetMachine &TM);
31 FunctionPass *createMipsDelaySlotFillerPass(MipsTargetMachine &TM);
32 FunctionPass *createMipsLongBranchPass(MipsTargetMachine &TM);
DMipsSubtarget.cpp64 const MipsTargetMachine &TM) in MipsSubtarget() argument
73 Os16(Mips_Os16), HasMSA(false), UseTCCInDIV(false), HasEVA(false), TM(TM), in MipsSubtarget()
76 MipsInstrInfo::create(initializeSubtargetDependencies(CPU, FS, TM))), in MipsSubtarget()
78 TLInfo(MipsTargetLowering::create(TM, *this)) { in MipsSubtarget()
117 if (NoABICalls && TM.getRelocationModel() == Reloc::PIC_) in MipsSubtarget()
144 const TargetMachine &TM) { in initializeSubtargetDependencies() argument
145 std::string CPUName = MIPS_MC::selectMipsCPU(TM.getTargetTriple(), CPU); in initializeSubtargetDependencies()
164 return TM.getRelocationModel(); in getRelocationModel()
171 const MipsABIInfo &MipsSubtarget::getABI() const { return TM.getABI(); } in getABI()
/external/llvm/include/llvm/CodeGen/
DTargetLoweringObjectFileImpl.h44 void emitPersonalityValue(MCStreamer &Streamer, const DataLayout &TM,
54 const TargetMachine &TM) const override;
58 const TargetMachine &TM) const override;
61 const TargetMachine &TM) const override;
70 Mangler &Mang, const TargetMachine &TM,
76 const TargetMachine &TM,
96 Mangler &Mang, const TargetMachine &TM) const override;
100 const TargetMachine &TM) const override;
104 const TargetMachine &TM) const override;
112 Mangler &Mang, const TargetMachine &TM,
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/external/llvm/include/llvm/Target/
DTargetLoweringObjectFile.h60 virtual void Initialize(MCContext &ctx, const TargetMachine &TM);
62 virtual void emitPersonalityValue(MCStreamer &Streamer, const DataLayout &TM,
68 Mangler &Mang, const TargetMachine &TM) const {} in emitModuleFlags() argument
79 const TargetMachine &TM);
85 Mangler &Mang, const TargetMachine &TM) const;
91 const TargetMachine &TM) const { in SectionForGlobal() argument
92 return SectionForGlobal(GV, getKindForGlobal(GV, TM), Mang, TM); in SectionForGlobal()
97 const TargetMachine &TM) const;
100 const TargetMachine &TM) const;
110 Mangler &Mang, const TargetMachine &TM) const = 0;
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/external/llvm/lib/Target/
DTargetLoweringObjectFile.cpp44 const TargetMachine &TM) { in Initialize() argument
46 InitMCObjectFileInfo(TM.getTargetTriple(), TM.getRelocationModel(), in Initialize()
47 TM.getCodeModel(), *Ctx); in Initialize()
105 const TargetMachine &TM) const { in getSymbolWithGlobalValueBase()
110 TM.getNameWithPrefix(NameStr, GV, Mang); in getSymbolWithGlobalValueBase()
116 const GlobalValue *GV, Mangler &Mang, const TargetMachine &TM, in getCFIPersonalitySymbol() argument
118 return TM.getSymbol(GV, Mang); in getCFIPersonalitySymbol()
133 const TargetMachine &TM){ in getKindForGlobal() argument
137 Reloc::Model ReloModel = TM.getRelocationModel(); in getKindForGlobal()
146 if (isSuitableForBSS(GVar, TM.Options.NoZerosInBSS)) in getKindForGlobal()
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/external/llvm/lib/Target/Hexagon/
DHexagonTargetObjectFile.cpp32 const TargetMachine &TM) { in Initialize() argument
33 TargetLoweringObjectFileELF::Initialize(Ctx, TM); in Initialize()
34 InitializeELF(TM.Options.UseInitArray); in Initialize()
54 const TargetMachine &TM) const { in IsGlobalInSmallSection()
63 return IsGlobalInSmallSection(GV, TM, getKindForGlobal(GV, TM)); in IsGlobalInSmallSection()
69 IsGlobalInSmallSection(const GlobalValue *GV, const TargetMachine &TM, in IsGlobalInSmallSection() argument
88 const TargetMachine &TM) const { in SelectSectionForGlobal()
91 if (Kind.isBSS() && IsGlobalInSmallSection(GV, TM, Kind)) in SelectSectionForGlobal()
93 if (Kind.isData() && IsGlobalInSmallSection(GV, TM, Kind)) in SelectSectionForGlobal()
97 return TargetLoweringObjectFileELF::SelectSectionForGlobal(GV, Kind, Mang,TM); in SelectSectionForGlobal()
/external/llvm/lib/Target/AArch64/
DAArch64TargetMachine.cpp184 AArch64PassConfig(AArch64TargetMachine *TM, PassManagerBase &PM) in AArch64PassConfig() argument
185 : TargetPassConfig(TM, PM) { in AArch64PassConfig()
186 if (TM->getOptLevel() != CodeGenOpt::None) in AArch64PassConfig()
218 addPass(createAtomicExpandPass(TM)); in addIRPasses()
223 if (TM->getOptLevel() != CodeGenOpt::None && EnableAtomicTidy) in addIRPasses()
229 if (TM->getOptLevel() != CodeGenOpt::None) in addIRPasses()
230 addPass(createInterleavedAccessPass(TM)); in addIRPasses()
232 if (TM->getOptLevel() == CodeGenOpt::Aggressive && EnableGEPOpt) { in addIRPasses()
236 addPass(createSeparateConstOffsetFromGEPPass(TM, true)); in addIRPasses()
250 if (TM->getOptLevel() != CodeGenOpt::None && EnablePromoteConstant) in addPreISel()
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DAArch64TargetObjectFile.cpp22 const TargetMachine &TM) { in Initialize() argument
23 TargetLoweringObjectFileELF::Initialize(Ctx, TM); in Initialize()
24 InitializeELF(TM.Options.UseInitArray); in Initialize()
34 const TargetMachine &TM, MachineModuleInfo *MMI, in getTTypeGlobalReference() argument
41 const MCSymbol *Sym = TM.getSymbol(GV, Mang); in getTTypeGlobalReference()
51 GV, Encoding, Mang, TM, MMI, Streamer); in getTTypeGlobalReference()
55 const GlobalValue *GV, Mangler &Mang, const TargetMachine &TM, in getCFIPersonalitySymbol() argument
57 return TM.getSymbol(GV, Mang); in getCFIPersonalitySymbol()
/external/mesa3d/src/gallium/drivers/radeon/
DAMDGPUTargetMachine.cpp75 AMDGPUPassConfig(AMDGPUTargetMachine *TM, PassManagerBase &PM) in AMDGPUPassConfig() argument
76 : TargetPassConfig(TM, PM) {} in AMDGPUPassConfig()
98 const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>(); in addPreISel()
107 PM->add(createAMDGPUPeepholeOpt(*TM)); in addInstSelector()
113 const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>(); in addPreRegAlloc()
116 PM->add(createSIAssignInterpRegsPass(*TM)); in addPreRegAlloc()
118 PM->add(createAMDGPUConvertToISAPass(*TM)); in addPreRegAlloc()
133 PM->add(createAMDGPUCFGPreparationPass(*TM)); in addPreEmitPass()
134 PM->add(createAMDGPUCFGStructurizerPass(*TM)); in addPreEmitPass()
136 const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>(); in addPreEmitPass()
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/external/llvm/lib/Target/ARM/
DARMSubtarget.cpp90 const ARMBaseTargetMachine &TM, bool IsLittle) in ARMSubtarget() argument
93 IsLittle(IsLittle), TargetTriple(TT), Options(TM.Options), TM(TM), in ARMSubtarget()
102 TLInfo(TM, *this) {} in ARMSubtarget()
163 assert((!TM.getMCAsmInfo() || in initializeEnvironment()
164 (TM.getMCAsmInfo()->getExceptionHandlingType() == in initializeEnvironment()
259 assert(TM.TargetABI != ARMBaseTargetMachine::ARM_ABI_UNKNOWN); in isAPCS_ABI()
260 return TM.TargetABI == ARMBaseTargetMachine::ARM_ABI_APCS; in isAPCS_ABI()
263 assert(TM.TargetABI != ARMBaseTargetMachine::ARM_ABI_UNKNOWN); in isAAPCS_ABI()
264 return TM.TargetABI == ARMBaseTargetMachine::ARM_ABI_AAPCS || in isAAPCS_ABI()
265 TM.TargetABI == ARMBaseTargetMachine::ARM_ABI_AAPCS16; in isAAPCS_ABI()
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DARMTargetObjectFile.cpp29 const TargetMachine &TM) { in Initialize() argument
30 bool isAAPCS_ABI = static_cast<const ARMTargetMachine &>(TM).TargetABI == in Initialize()
32 TargetLoweringObjectFileELF::Initialize(Ctx, TM); in Initialize()
45 const TargetMachine &TM, MachineModuleInfo *MMI, in getTTypeGlobalReference() argument
47 if (TM.getMCAsmInfo()->getExceptionHandlingType() != ExceptionHandling::ARM) in getTTypeGlobalReference()
49 GV, Encoding, Mang, TM, MMI, Streamer); in getTTypeGlobalReference()
53 return MCSymbolRefExpr::create(TM.getSymbol(GV, Mang), in getTTypeGlobalReference()
/external/llvm/lib/CodeGen/
DTargetLoweringObjectFileImpl.cpp52 const GlobalValue *GV, Mangler &Mang, const TargetMachine &TM, in getCFIPersonalitySymbol() argument
57 TM.getSymbol(GV, Mang)->getName()); in getCFIPersonalitySymbol()
59 return TM.getSymbol(GV, Mang); in getCFIPersonalitySymbol()
89 const TargetMachine &TM, MachineModuleInfo *MMI, in getTTypeGlobalReference() argument
95 MCSymbol *SSym = getSymbolWithGlobalValueBase(GV, ".DW.stub", Mang, TM); in getTTypeGlobalReference()
101 MCSymbol *Sym = TM.getSymbol(GV, Mang); in getTTypeGlobalReference()
111 getTTypeGlobalReference(GV, Encoding, Mang, TM, MMI, Streamer); in getTTypeGlobalReference()
206 const TargetMachine &TM) const { in getExplicitSectionGlobal()
245 const TargetMachine &TM, bool EmitUniqueSection, in selectELFSectionForGlobal() argument
274 bool UniqueSectionNames = TM.getUniqueSectionNames(); in selectELFSectionForGlobal()
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DLLVMTargetMachine.cpp92 addPassesToGenerateCode(LLVMTargetMachine *TM, PassManagerBase &PM, in addPassesToGenerateCode() argument
98 if (TM->Options.EmulatedTLS) in addPassesToGenerateCode()
99 PM.add(createLowerEmuTLSPass(TM)); in addPassesToGenerateCode()
102 PM.add(createTargetTransformInfoWrapperPass(TM->getTargetIRAnalysis())); in addPassesToGenerateCode()
106 TargetPassConfig *PassConfig = TM->createPassConfig(PM); in addPassesToGenerateCode()
125 *TM->getMCAsmInfo(), *TM->getMCRegisterInfo(), TM->getObjFileLowering()); in addPassesToGenerateCode()
129 PM.add(new MachineFunctionAnalysis(*TM, MFInitializer)); in addPassesToGenerateCode()
132 TM->setO0WantsFastISel(EnableFastISelOption != cl::BOU_FALSE); in addPassesToGenerateCode()
134 (TM->getOptLevel() == CodeGenOpt::None && in addPassesToGenerateCode()
135 TM->getO0WantsFastISel())) in addPassesToGenerateCode()
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/external/strace/linux/32/
Dsyscallent.h204 [196] = { 3, TI|TM|SI, SEN(shmat), "shmat" },
205 [197] = { 1, TI|TM|SI, SEN(shmdt), "shmdt" },
222 [214] = { 1, TM|SI, SEN(brk), "brk" },
223 [215] = { 2, TM|SI, SEN(munmap), "munmap" },
224 [216] = { 5, TM|SI, SEN(mremap), "mremap" },
230 [222] = { 6, TD|TM|SI, SEN(ARCH_mmap), "mmap2" },
234 [226] = { 3, TM|SI, SEN(mprotect), "mprotect" },
235 [227] = { 3, TM, SEN(msync), "msync" },
236 [228] = { 2, TM, SEN(mlock), "mlock" },
237 [229] = { 2, TM, SEN(munlock), "munlock" },
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/external/strace/linux/64/
Dsyscallent.h197 [196] = { 3, TI|TM|SI, SEN(shmat), "shmat" },
198 [197] = { 1, TI|TM|SI, SEN(shmdt), "shmdt" },
215 [214] = { 1, TM|SI, SEN(brk), "brk" },
216 [215] = { 2, TM|SI, SEN(munmap), "munmap" },
217 [216] = { 5, TM|SI, SEN(mremap), "mremap" },
223 [222] = { 6, TD|TM|SI, SEN(mmap), "mmap" },
227 [226] = { 3, TM|SI, SEN(mprotect), "mprotect" },
228 [227] = { 3, TM, SEN(msync), "msync" },
229 [228] = { 2, TM, SEN(mlock), "mlock" },
230 [229] = { 2, TM, SEN(munlock), "munlock" },
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/external/llvm/lib/Target/NVPTX/
DNVPTXLowerKernelArgs.cpp114 NVPTXLowerKernelArgs(const NVPTXTargetMachine *TM = nullptr) in NVPTXLowerKernelArgs() argument
115 : FunctionPass(ID), TM(TM) {} in NVPTXLowerKernelArgs()
121 const NVPTXTargetMachine *TM; member in __anon2b34b82e0111::NVPTXLowerKernelArgs
200 if (TM && TM->getDrvInterface() == NVPTX::CUDA) { in runOnFunction()
224 else if (TM && TM->getDrvInterface() == NVPTX::CUDA) in runOnFunction()
232 llvm::createNVPTXLowerKernelArgsPass(const NVPTXTargetMachine *TM) { in createNVPTXLowerKernelArgsPass() argument
233 return new NVPTXLowerKernelArgs(TM); in createNVPTXLowerKernelArgsPass()
/external/llvm/lib/Target/AMDGPU/
DAMDGPUTargetObjectFile.cpp26 const TargetMachine &TM) const { in SelectSectionForGlobal()
30 return TargetLoweringObjectFileELF::SelectSectionForGlobal(GV, Kind, Mang, TM); in SelectSectionForGlobal()
39 const TargetMachine &TM){ in Initialize() argument
40 TargetLoweringObjectFileELF::Initialize(Ctx, TM); in Initialize()
41 InitializeELF(TM.Options.UseInitArray); in Initialize()
74 const TargetMachine &TM) const { in SelectSectionForGlobal()
86 return AMDGPUTargetObjectFile::SelectSectionForGlobal(GV, Kind, Mang, TM); in SelectSectionForGlobal()
DAMDGPUTargetMachine.cpp128 AMDGPUPassConfig(TargetMachine *TM, PassManagerBase &PM) in AMDGPUPassConfig() argument
129 : TargetPassConfig(TM, PM) { in AMDGPUPassConfig()
158 R600PassConfig(TargetMachine *TM, PassManagerBase &PM) in R600PassConfig() argument
159 : AMDGPUPassConfig(TM, PM) { } in R600PassConfig()
169 GCNPassConfig(TargetMachine *TM, PassManagerBase &PM) in GCNPassConfig() argument
170 : AMDGPUPassConfig(TM, PM) { } in GCNPassConfig()
246 addPass(createR600VectorRegMerger(*TM)); in addPreRegAlloc()
254 addPass(createR600ClauseMergePass(*TM), false); in addPreSched2()
259 addPass(createR600ExpandSpecialInstrsPass(*TM), false); in addPreEmitPass()
261 addPass(createR600Packetizer(*TM), false); in addPreEmitPass()
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/external/strace/linux/mips/
Dsyscallent-n32.h12 [6009] = { 6, TD|TM|SI, SEN(mmap), "mmap" },
13 [6010] = { 3, TM|SI, SEN(mprotect), "mprotect" },
14 [6011] = { 2, TM|SI, SEN(munmap), "munmap" },
15 [6012] = { 1, TM|SI, SEN(brk), "brk" },
27 [6024] = { 5, TM|SI, SEN(mremap), "mremap" },
28 [6025] = { 3, TM, SEN(msync), "msync" },
29 [6026] = { 3, TM, SEN(mincore), "mincore" },
30 [6027] = { 3, TM, SEN(madvise), "madvise" },
32 [6029] = { 3, TI|TM|SI, SEN(shmat), "shmat" },
68 [6065] = { 1, TI|TM|SI, SEN(shmdt), "shmdt" },
[all …]
Dsyscallent-n64.h12 [5009] = { 6, TD|TM|SI, SEN(mmap), "mmap" },
13 [5010] = { 3, TM|SI, SEN(mprotect), "mprotect" },
14 [5011] = { 2, TM|SI, SEN(munmap), "munmap" },
15 [5012] = { 1, TM|SI, SEN(brk), "brk" },
27 [5024] = { 5, TM|SI, SEN(mremap), "mremap" },
28 [5025] = { 3, TM, SEN(msync), "msync" },
29 [5026] = { 3, TM, SEN(mincore), "mincore" },
30 [5027] = { 3, TM, SEN(madvise), "madvise" },
32 [5029] = { 3, TI|TM|SI, SEN(shmat), "shmat" },
68 [5065] = { 1, TI|TM|SI, SEN(shmdt), "shmdt" },
[all …]
/external/strace/linux/x86_64/
Dsyscallent.h10 [ 9] = { 6, TD|TM|SI, SEN(mmap), "mmap" },
11 [ 10] = { 3, TM|SI, SEN(mprotect), "mprotect" },
12 [ 11] = { 2, TM|SI, SEN(munmap), "munmap" },
13 [ 12] = { 1, TM|SI, SEN(brk), "brk" },
26 [ 25] = { 5, TM|SI, SEN(mremap), "mremap" },
27 [ 26] = { 3, TM, SEN(msync), "msync" },
28 [ 27] = { 3, TM, SEN(mincore), "mincore" },
29 [ 28] = { 3, TM, SEN(madvise), "madvise" },
31 [ 30] = { 3, TI|TM|SI, SEN(shmat), "shmat" },
68 [ 67] = { 1, TI|TM|SI, SEN(shmdt), "shmdt" },
[all …]
/external/strace/linux/ia64/
Dsyscallent.h79 [1060] = { 1, TM|SI, SEN(brk), "brk" },
133 [1114] = { 3, TI|TM|SI, SEN(shmat), "shmat" },
134 [1115] = { 1, TI|TM|SI, SEN(shmdt), "shmdt" },
144 [1125] = { 5, TM|SI, SEN(remap_file_pages), "remap_file_pages" },
170 [1151] = { 6, TD|TM|SI, SEN(mmap), "mmap" },
171 [1152] = { 2, TM|SI, SEN(munmap), "munmap" },
172 [1153] = { 2, TM, SEN(mlock), "mlock" },
173 [1154] = { 1, TM, SEN(mlockall), "mlockall" },
174 [1155] = { 3, TM|SI, SEN(mprotect), "mprotect" },
175 [1156] = { 5, TM|SI, SEN(mremap), "mremap" },
[all …]
/external/strace/linux/hppa/
Dsyscallent.h50 [ 45] = { 1, TM|SI, SEN(brk), "brk" },
77 [ 72] = { 3, TM, SEN(mincore), "mincore" },
94 [ 89] = { 6, TD|TM|SI, SEN(mmap_4koff), "mmap2" },
95 [ 90] = { 6, TD|TM|SI, SEN(mmap), "mmap" },
96 [ 91] = { 2, TM|SI, SEN(munmap), "munmap" },
124 [119] = { 3, TM, SEN(madvise), "madvise" },
130 [125] = { 3, TM|SI, SEN(mprotect), "mprotect" },
149 [144] = { 3, TM, SEN(msync), "msync" },
155 [150] = { 2, TM, SEN(mlock), "mlock" },
156 [151] = { 2, TM, SEN(munlock), "munlock" },
[all …]

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