| /external/llvm/lib/Target/AMDGPU/ |
| D | SIFoldOperands.cpp | 55 MachineInstr *UseMI; member
61 UseMI(MI), UseOpNo(OpNo) { in FoldCandidate()
109 MachineInstr *MI = Fold.UseMI; in updateOperand()
133 if (Candidate.UseMI == MI) in isUseMIInFoldList()
199 static void foldOperand(MachineOperand &OpToFold, MachineInstr *UseMI, in foldOperand() argument
205 const MachineOperand &UseOp = UseMI->getOperand(UseOpIdx); in foldOperand()
244 if (UseMI->getOpcode() == AMDGPU::COPY) { in foldOperand()
245 unsigned DestReg = UseMI->getOperand(0).getReg(); in foldOperand()
255 UseMI->setDesc(TII->get(MovOp)); in foldOperand()
256 CopiesToReplace.push_back(UseMI); in foldOperand()
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| D | SIInstrInfo.cpp | 1047 bool SIInstrInfo::FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI, in FoldImmediate() argument
1052 unsigned Opc = UseMI->getOpcode(); in FoldImmediate()
1056 if (hasModifiersSet(*UseMI, AMDGPU::OpName::src0_modifiers) || in FoldImmediate()
1057 hasModifiersSet(*UseMI, AMDGPU::OpName::src1_modifiers) || in FoldImmediate()
1058 hasModifiersSet(*UseMI, AMDGPU::OpName::src2_modifiers)) { in FoldImmediate()
1062 MachineOperand *Src0 = getNamedOperand(*UseMI, AMDGPU::OpName::src0); in FoldImmediate()
1063 MachineOperand *Src1 = getNamedOperand(*UseMI, AMDGPU::OpName::src1); in FoldImmediate()
1064 MachineOperand *Src2 = getNamedOperand(*UseMI, AMDGPU::OpName::src2); in FoldImmediate()
1092 UseMI->RemoveOperand(AMDGPU::getNamedOperandIdx(Opc, in FoldImmediate()
1094 UseMI->RemoveOperand(AMDGPU::getNamedOperandIdx(Opc, in FoldImmediate()
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| /external/llvm/lib/CodeGen/ |
| D | MachineTraceMetrics.cpp | 624 static bool getDataDeps(const MachineInstr *UseMI, in getDataDeps() argument
628 if (UseMI->isDebugValue()) in getDataDeps()
632 for (MachineInstr::const_mop_iterator I = UseMI->operands_begin(), in getDataDeps()
633 E = UseMI->operands_end(); I != E; ++I) { in getDataDeps()
646 Deps.push_back(DataDep(MRI, Reg, UseMI->getOperandNo(I))); in getDataDeps()
654 static void getPHIDeps(const MachineInstr *UseMI, in getPHIDeps() argument
661 assert(UseMI->isPHI() && UseMI->getNumOperands() % 2 && "Bad PHI"); in getPHIDeps()
662 for (unsigned i = 1; i != UseMI->getNumOperands(); i += 2) { in getPHIDeps()
663 if (UseMI->getOperand(i + 1).getMBB() == Pred) { in getPHIDeps()
664 unsigned Reg = UseMI->getOperand(i).getReg(); in getPHIDeps()
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| D | LiveRangeEdit.cpp | 166 MachineInstr *DefMI = nullptr, *UseMI = nullptr; in foldAsLoad() local
178 if (UseMI && UseMI != MI) in foldAsLoad()
183 UseMI = MI; in foldAsLoad()
186 if (!DefMI || !UseMI) in foldAsLoad()
193 LIS.getInstructionIndex(UseMI))) in foldAsLoad()
203 << " into single use: " << *UseMI); in foldAsLoad()
206 if (UseMI->readsWritesVirtualRegister(LI->reg, &Ops).second) in foldAsLoad()
209 MachineInstr *FoldMI = TII.foldMemoryOperand(UseMI, Ops, DefMI); in foldAsLoad()
213 LIS.ReplaceMachineInstrInMaps(UseMI, FoldMI); in foldAsLoad()
214 UseMI->eraseFromParent(); in foldAsLoad()
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| D | RegisterScavenging.cpp | 294 MachineBasicBlock::iterator &UseMI) { in findSurvivorReg() argument
352 UseMI = RestorePointMI; in findSurvivorReg()
389 MachineBasicBlock::iterator UseMI; in scavengeRegister() local
390 unsigned SReg = findSurvivorReg(I, Candidates, 25, UseMI); in scavengeRegister()
415 if (!TRI->saveScavengerRegister(*MBB, I, UseMI, RC, SReg)) { in scavengeRegister()
427 TII->loadRegFromStackSlot(*MBB, UseMI, SReg, Scavenged[SI].FrameIndex, in scavengeRegister()
429 II = std::prev(UseMI); in scavengeRegister()
435 Scavenged[SI].Restore = std::prev(UseMI); in scavengeRegister()
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| D | TargetSchedule.cpp | 156 const MachineInstr *UseMI, unsigned UseOperIdx) const { in computeOperandLatency() argument
163 if (UseMI) { in computeOperandLatency()
165 UseMI, UseOperIdx); in computeOperandLatency()
195 if (!UseMI) in computeOperandLatency()
199 const MCSchedClassDesc *UseDesc = resolveSchedClass(UseMI); in computeOperandLatency()
202 unsigned UseIdx = findUseIdx(UseMI, UseOperIdx); in computeOperandLatency()
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| D | OptimizePHIs.cpp | 147 for (MachineInstr &UseMI : MRI->use_instructions(DstReg)) { in IsDeadPHICycle()
148 if (!UseMI.isPHI() || !IsDeadPHICycle(&UseMI, PHIsInCycle)) in IsDeadPHICycle()
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| D | RegisterCoalescer.cpp | 693 MachineInstr *UseMI = MO.getParent(); in removeCopyByCommutingDef() local
694 unsigned OpNo = &MO - &UseMI->getOperand(0); in removeCopyByCommutingDef()
695 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI); in removeCopyByCommutingDef()
700 if (UseMI->isRegTiedToDefOperand(OpNo)) in removeCopyByCommutingDef()
742 MachineInstr *UseMI = UseMO.getParent(); in removeCopyByCommutingDef() local
743 if (UseMI->isDebugValue()) { in removeCopyByCommutingDef()
749 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI).getRegSlot(true); in removeCopyByCommutingDef()
760 if (UseMI == CopyMI) in removeCopyByCommutingDef()
762 if (!UseMI->isCopy()) in removeCopyByCommutingDef()
764 if (UseMI->getOperand(0).getReg() != IntB.reg || in removeCopyByCommutingDef()
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| D | MachineLICM.cpp | 950 for (MachineInstr &UseMI : MRI->use_instructions(Reg)) { in HasLoopPHIUse()
952 if (UseMI.isPHI()) { in HasLoopPHIUse()
955 if (CurLoop->contains(&UseMI)) in HasLoopPHIUse()
960 if (isExitBlock(UseMI.getParent())) in HasLoopPHIUse()
965 if (UseMI.isCopy() && CurLoop->contains(&UseMI)) in HasLoopPHIUse()
966 Work.push_back(&UseMI); in HasLoopPHIUse()
980 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(Reg)) { in HasHighOperandLatency()
981 if (UseMI.isCopyLike()) in HasHighOperandLatency()
983 if (!CurLoop->contains(UseMI.getParent())) in HasHighOperandLatency()
985 for (unsigned i = 0, e = UseMI.getNumOperands(); i != e; ++i) { in HasHighOperandLatency()
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| D | MachineSSAUpdater.cpp | 223 MachineInstr *UseMI = U.getParent(); in RewriteUse() local
225 if (UseMI->isPHI()) { in RewriteUse()
226 MachineBasicBlock *SourceBB = findCorrespondingPred(UseMI, &U); in RewriteUse()
229 NewVR = GetValueInMiddleOfBlock(UseMI->getParent()); in RewriteUse()
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| D | TailDuplication.cpp | 271 MachineInstr *UseMI = UseMO.getParent(); in TailDuplicateAndUpdate() local
273 if (UseMI->isDebugValue()) { in TailDuplicateAndUpdate()
278 UseMI->eraseFromParent(); in TailDuplicateAndUpdate()
281 if (UseMI->getParent() == DefBB && !UseMI->isPHI()) in TailDuplicateAndUpdate()
346 for (MachineInstr &UseMI : MRI->use_instructions(Reg)) { in isDefLiveOut()
347 if (UseMI.isDebugValue()) in isDefLiveOut()
349 if (UseMI.getParent() != BB) in isDefLiveOut()
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| D | PeepholeOptimizer.cpp | 456 MachineInstr *UseMI = UseMO.getParent(); in INITIALIZE_PASS_DEPENDENCY() local
457 if (UseMI == MI) in INITIALIZE_PASS_DEPENDENCY()
460 if (UseMI->isPHI()) { in INITIALIZE_PASS_DEPENDENCY()
486 if (UseMI->getOpcode() == TargetOpcode::SUBREG_TO_REG) in INITIALIZE_PASS_DEPENDENCY()
489 MachineBasicBlock *UseMBB = UseMI->getParent(); in INITIALIZE_PASS_DEPENDENCY()
492 if (!LocalMIs.count(UseMI)) in INITIALIZE_PASS_DEPENDENCY()
529 MachineInstr *UseMI = UseMO->getParent(); in INITIALIZE_PASS_DEPENDENCY() local
530 MachineBasicBlock *UseMBB = UseMI->getParent(); in INITIALIZE_PASS_DEPENDENCY()
541 MachineInstr *Copy = BuildMI(*UseMBB, UseMI, UseMI->getDebugLoc(), in INITIALIZE_PASS_DEPENDENCY()
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| D | TwoAddressInstructionPass.cpp | 500 MachineInstr &UseMI = *MRI->use_instr_nodbg_begin(Reg); in findOnlyInterestingUse() local
501 if (UseMI.getParent() != MBB) in findOnlyInterestingUse()
505 if (isCopyToReg(UseMI, TII, SrcReg, DstReg, IsSrcPhys, IsDstPhys)) { in findOnlyInterestingUse()
507 return &UseMI; in findOnlyInterestingUse()
510 if (isTwoAddrUse(UseMI, Reg, DstReg)) { in findOnlyInterestingUse()
512 return &UseMI; in findOnlyInterestingUse()
740 while (MachineInstr *UseMI = findOnlyInterestingUse(Reg, MBB, MRI, TII,IsCopy, in scanUses() local
742 if (IsCopy && !Processed.insert(UseMI).second) in scanUses()
745 DenseMap<MachineInstr*, unsigned>::iterator DI = DistanceMap.find(UseMI); in scanUses()
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| D | MachineRegisterInfo.cpp | 439 MachineInstr *UseMI = &*I; in markUsesInDebugValueAsUndef() local
440 if (UseMI->isDebugValue()) in markUsesInDebugValueAsUndef()
441 UseMI->getOperand(0).setReg(0U); in markUsesInDebugValueAsUndef()
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| /external/llvm/lib/Target/ARM/ |
| D | MLxExpansionPass.cpp | 124 MachineInstr *UseMI = &*MRI->use_instr_nodbg_begin(Reg); in getDefReg() local
125 if (UseMI->getParent() != MBB) in getDefReg()
128 while (UseMI->isCopy() || UseMI->isInsertSubreg()) { in getDefReg()
129 Reg = UseMI->getOperand(0).getReg(); in getDefReg()
133 UseMI = &*MRI->use_instr_nodbg_begin(Reg); in getDefReg()
134 if (UseMI->getParent() != MBB) in getDefReg()
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| D | ThumbRegisterInfo.cpp | 447 MachineBasicBlock::iterator &UseMI, const TargetRegisterClass *RC, in saveScavengerRegister() argument
452 return ARMBaseRegisterInfo::saveScavengerRegister(MBB, I, UseMI, RC, Reg); in saveScavengerRegister()
469 for (MachineBasicBlock::iterator II = I; !done && II != UseMI ; ++II) { in saveScavengerRegister()
476 UseMI = II; in saveScavengerRegister()
484 UseMI = II; in saveScavengerRegister()
491 AddDefaultPred(BuildMI(MBB, UseMI, DL, TII.get(ARM::tMOVr)). in saveScavengerRegister()
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| D | ARMBaseInstrInfo.cpp | 2636 bool ARMBaseInstrInfo::FoldImmediate(MachineInstr *UseMI, in FoldImmediate() argument
2660 const MCInstrDesc &UseMCID = UseMI->getDesc(); in FoldImmediate()
2663 if (UseMI->getOperand(NumOps-1).getReg() == ARM::CPSR) in FoldImmediate()
2669 unsigned UseOpc = UseMI->getOpcode(); in FoldImmediate()
2684 Commute = UseMI->getOperand(2).getReg() != Reg; in FoldImmediate()
2736 unsigned Reg1 = UseMI->getOperand(OpIdx).getReg(); in FoldImmediate()
2737 bool isKill = UseMI->getOperand(OpIdx).isKill(); in FoldImmediate()
2739 AddDefaultCC(AddDefaultPred(BuildMI(*UseMI->getParent(), in FoldImmediate()
2740 UseMI, UseMI->getDebugLoc(), in FoldImmediate()
2744 UseMI->setDesc(get(NewUseOpc)); in FoldImmediate()
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| D | ThumbRegisterInfo.h | 56 MachineBasicBlock::iterator &UseMI,
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| D | ARMBaseInstrInfo.h | 278 bool FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI,
286 const MachineInstr *UseMI,
342 const MachineInstr *UseMI,
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 142 const MachineInstr *UseMI, in getOperandLatency() argument
145 UseMI, UseIdx); in getOperandLatency()
164 if (UseMI->isBranch() && IsRegCR) { in getOperandLatency()
1188 bool PPCInstrInfo::FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI, in FoldImmediate() argument
1204 const MCInstrDesc &UseMCID = UseMI->getDesc(); in FoldImmediate()
1211 for (UseIdx = 0; UseIdx < UseMI->getNumOperands(); ++UseIdx) in FoldImmediate()
1212 if (UseMI->getOperand(UseIdx).isReg() && in FoldImmediate()
1213 UseMI->getOperand(UseIdx).getReg() == Reg) in FoldImmediate()
1216 assert(UseIdx < UseMI->getNumOperands() && "Cannot find Reg in UseMI"); in FoldImmediate()
1248 UseMI->getOperand(UseIdx).setReg(ZeroReg); in FoldImmediate()
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| D | PPCVSXSwapRemoval.cpp | 671 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DefReg)) { in recordUnoptimizableWebs()
672 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs()
684 DEBUG(UseMI.dump()); in recordUnoptimizableWebs()
735 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DefReg)) { in markSwapsForRemoval()
736 int UseIdx = SwapMap[&UseMI]; in markSwapsForRemoval()
740 DEBUG(UseMI.dump()); in markSwapsForRemoval()
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| D | PPCInstrInfo.h | 121 const MachineInstr *UseMI,
204 bool FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI,
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| /external/llvm/lib/Target/Mips/ |
| D | Mips16RegisterInfo.cpp | 63 MachineBasicBlock::iterator &UseMI, in saveScavengerRegister() argument
69 TII.copyPhysReg(MBB, UseMI, DL, Reg, Mips::T0, true); in saveScavengerRegister()
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| D | Mips16RegisterInfo.h | 34 MachineBasicBlock::iterator &UseMI,
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| /external/llvm/include/llvm/Target/ |
| D | TargetInstrInfo.h | 1132 virtual bool FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI, in FoldImmediate() argument
1166 const MachineInstr *UseMI,
1173 const MachineInstr *UseMI, unsigned UseIdx)
1207 const MachineInstr *UseMI, unsigned UseIdx) const { in hasHighOperandLatency() argument
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