| /external/v8/test/unittests/compiler/ |
| D | instruction-sequence-unittest.h | 23 struct VReg { struct
24 VReg() : value_(kNoValue) {} in VReg() function
25 VReg(PhiInstruction* phi) : value_(phi->virtual_register()) {} // NOLINT in VReg() argument
26 explicit VReg(int value) : value_(value) {} in VReg() function
30 typedef std::pair<VReg, VReg> VRegPair; argument
51 TestOperand(TestOperandType type, VReg vreg, int value = kNoValue)
55 VReg vreg_;
59 static TestOperand Same() { return TestOperand(kSameAsFirst, VReg()); } in Same()
63 return TestOperand(type, VReg(), index); in ExplicitReg()
66 static TestOperand Reg(VReg vreg, int index = kNoValue) {
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| D | instruction-sequence-unittest.cc | 146 InstructionSequenceTest::VReg InstructionSequenceTest::Define( in Define()
148 VReg vreg = NewReg(); in Define()
162 PhiInstruction* InstructionSequenceTest::Phi(VReg incoming_vreg_0, in Phi()
163 VReg incoming_vreg_1, in Phi()
164 VReg incoming_vreg_2, in Phi()
165 VReg incoming_vreg_3) { in Phi()
166 VReg inputs[] = {incoming_vreg_0, incoming_vreg_1, incoming_vreg_2, in Phi()
182 PhiInstruction* InstructionSequenceTest::Phi(VReg incoming_vreg_0, in Phi()
192 VReg vreg) { in SetInput()
198 InstructionSequenceTest::VReg InstructionSequenceTest::DefineConstant( in DefineConstant()
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| D | register-allocator-unittest.cc | 194 VReg t_vals[kPhis]; in TEST_F()
201 VReg f_vals[kPhis]; in TEST_F()
224 VReg vals[kPhis]; in TEST_F()
266 VReg parameters[kParams]; in TEST_F()
331 VReg constants[kDefaultNRegs]; in TEST_F()
360 VReg values[kNumRegs]; in TEST_F()
386 VReg values[kNumRegs]; in TEST_F()
498 VReg values[kDefaultNRegs]; in TEST_F()
534 VReg values[kDefaultNRegs]; in TEST_F()
735 VReg p_0; in TEST_P()
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyMachineFunctionInfo.h | 56 void stackifyVReg(unsigned VReg) { in stackifyVReg() argument
57 if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size()) in stackifyVReg()
58 VRegStackified.resize(TargetRegisterInfo::virtReg2Index(VReg) + 1); in stackifyVReg()
59 VRegStackified.set(TargetRegisterInfo::virtReg2Index(VReg)); in stackifyVReg()
61 bool isVRegStackified(unsigned VReg) const { in isVRegStackified() argument
62 if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size()) in isVRegStackified()
64 return VRegStackified.test(TargetRegisterInfo::virtReg2Index(VReg)); in isVRegStackified()
68 void setWAReg(unsigned VReg, unsigned WAReg) { in setWAReg() argument
70 assert(TargetRegisterInfo::virtReg2Index(VReg) < WARegs.size()); in setWAReg()
71 WARegs[TargetRegisterInfo::virtReg2Index(VReg)] = WAReg; in setWAReg()
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| D | WebAssemblyRegNumbering.cpp | 91 unsigned VReg = TargetRegisterInfo::index2VirtReg(VRegIdx); in runOnMachineFunction() local
93 if (MFI.isVRegStackified(VReg)) { in runOnMachineFunction()
94 MFI.setWAReg(VReg, INT32_MIN | NumStackRegs++); in runOnMachineFunction()
98 if (MRI.use_empty(VReg)) in runOnMachineFunction()
100 if (MFI.getWAReg(VReg) == WebAssemblyFunctionInfo::UnusedReg) in runOnMachineFunction()
101 MFI.setWAReg(VReg, NumArgRegs + CurReg++); in runOnMachineFunction()
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| D | WebAssemblyRegColoring.cpp | 65 unsigned VReg) { in computeWeight() argument
67 for (MachineOperand &MO : MRI->reg_nodbg_operands(VReg)) in computeWeight()
99 unsigned VReg = TargetRegisterInfo::index2VirtReg(i); in runOnMachineFunction() local
100 if (MFI.isVRegStackified(VReg)) in runOnMachineFunction()
103 if (MRI->use_empty(VReg)) in runOnMachineFunction()
106 LiveInterval *LI = &Liveness->getInterval(VReg); in runOnMachineFunction()
108 LI->weight = computeWeight(MRI, MBFI, VReg); in runOnMachineFunction()
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| D | WebAssemblyRegStackify.cpp | 240 unsigned VReg = MO.getReg(); in runOnMachineFunction() local
243 if (!TargetRegisterInfo::isVirtualRegister(VReg)) in runOnMachineFunction()
246 if (MFI.isVRegStackified(VReg)) { in runOnMachineFunction()
248 Stack.push_back(VReg); in runOnMachineFunction()
250 assert(Stack.pop_back_val() == VReg); in runOnMachineFunction()
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| D | WebAssemblyAsmPrinter.cpp | 173 unsigned VReg = TargetRegisterInfo::index2VirtReg(Idx); in EmitFunctionBodyStart() local
174 unsigned WAReg = MFI->getWAReg(VReg); in EmitFunctionBodyStart()
184 Local.addOperand(MCOperand::createImm(getRegType(VReg).SimpleTy)); in EmitFunctionBodyStart()
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| /external/llvm/include/llvm/CodeGen/ |
| D | RegAllocPBQP.h | 154 void setNodeIdForVReg(unsigned VReg, GraphBase::NodeId NId) { in setNodeIdForVReg() argument
155 VRegToNodeId[VReg] = NId; in setNodeIdForVReg()
158 GraphBase::NodeId getNodeIdForVReg(unsigned VReg) const { in getNodeIdForVReg() argument
159 auto VRegItr = VRegToNodeId.find(VReg); in getNodeIdForVReg()
165 void eraseNodeIdForVReg(unsigned VReg) { in eraseNodeIdForVReg() argument
166 VRegToNodeId.erase(VReg); in eraseNodeIdForVReg()
195 VReg(0) in NodeMetadata()
205 OptUnsafeEdges(new unsigned[NumOpts]), VReg(Other.VReg), in NodeMetadata()
221 OptUnsafeEdges(std::move(Other.OptUnsafeEdges)), VReg(Other.VReg), in NodeMetadata()
237 VReg = Other.VReg;
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| D | LiveIntervalUnion.h | 125 Query(LiveInterval *VReg, LiveIntervalUnion *LIU): in Query() argument
126 LiveUnion(LIU), VirtReg(VReg), CheckedFirstInterference(false), in Query()
141 void init(unsigned UTag, LiveInterval *VReg, LiveIntervalUnion *LIU) { in init() argument
142 assert(VReg && LIU && "Invalid arguments"); in init()
143 if (UserTag == UTag && VirtReg == VReg && in init()
150 VirtReg = VReg; in init()
168 bool isSeenInterference(LiveInterval *VReg) const;
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| D | MachineRegisterInfo.h | 178 bool shouldTrackSubRegLiveness(unsigned VReg) const { in shouldTrackSubRegLiveness() argument
179 assert(TargetRegisterInfo::isVirtualRegister(VReg) && "Must pass a VReg"); in shouldTrackSubRegLiveness()
180 return shouldTrackSubRegLiveness(*getRegClass(VReg)); in shouldTrackSubRegLiveness()
599 void setRegAllocationHint(unsigned VReg, unsigned Type, unsigned PrefReg) { in setRegAllocationHint() argument
600 assert(TargetRegisterInfo::isVirtualRegister(VReg)); in setRegAllocationHint()
601 RegAllocHints[VReg].first = Type; in setRegAllocationHint()
602 RegAllocHints[VReg].second = PrefReg; in setRegAllocationHint()
607 void setSimpleHint(unsigned VReg, unsigned PrefReg) { in setSimpleHint() argument
608 setRegAllocationHint(VReg, /*Type=*/0, PrefReg); in setSimpleHint()
614 getRegAllocationHint(unsigned VReg) const { in getRegAllocationHint() argument
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| D | ScheduleDAGInstrs.h | 38 VReg2SUnit(unsigned VReg, LaneBitmask LaneMask, SUnit *SU) in VReg2SUnit()
39 : VirtReg(VReg), LaneMask(LaneMask), SU(SU) {} in VReg2SUnit()
50 VReg2SUnitOperIdx(unsigned VReg, LaneBitmask LaneMask, in VReg2SUnitOperIdx()
52 : VReg2SUnit(VReg, LaneMask, SU), OperandIndex(OperandIndex) {} in VReg2SUnitOperIdx()
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| D | CallingConvLower.h | 166 ForwardedRegister(unsigned VReg, MCPhysReg PReg, MVT VT) in ForwardedRegister()
167 : VReg(VReg), PReg(PReg), VT(VT) {} in ForwardedRegister()
168 unsigned VReg; member
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| /external/llvm/lib/CodeGen/ |
| D | LiveRangeEdit.cpp | 35 unsigned VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg)); in createEmptyIntervalFrom() local
37 VRM->setIsSplitFromReg(VReg, VRM->getOriginal(OldReg)); in createEmptyIntervalFrom()
39 LiveInterval &LI = LIS.createEmptyInterval(VReg); in createEmptyIntervalFrom()
44 unsigned VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg)); in createFrom() local
46 VRM->setIsSplitFromReg(VReg, VRM->getOriginal(OldReg)); in createFrom()
48 return VReg; in createFrom()
352 unsigned VReg = LI->reg; in eliminateDeadDefs() local
354 TheDelegate->LRE_WillShrinkVirtReg(VReg); in eliminateDeadDefs()
364 if (VReg == RegsBeingSpilled[i]) { in eliminateDeadDefs()
379 unsigned Original = VRM ? VRM->getOriginal(VReg) : 0; in eliminateDeadDefs()
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| D | RegAllocPBQP.cpp | 133 void spillVReg(unsigned VReg, SmallVectorImpl<unsigned> &NewIntervals,
298 unsigned VReg = G.getNodeMetadata(NId).getVReg(); in apply() local
299 LiveInterval &LI = LIS.getInterval(VReg); in apply()
566 unsigned VReg = Worklist.back(); in initializeGraph() local
569 const TargetRegisterClass *TRC = MRI.getRegClass(VReg); in initializeGraph()
570 LiveInterval &VRegLI = LIS.getInterval(VReg); in initializeGraph()
607 spillVReg(VReg, NewVRegs, MF, LIS, VRM, VRegSpiller); in initializeGraph()
621 G.getNodeMetadata(NId).setVReg(VReg); in initializeGraph()
624 G.getMetadata().setNodeIdForVReg(VReg, NId); in initializeGraph()
628 void RegAllocPBQP::spillVReg(unsigned VReg, in spillVReg() argument
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| D | LiveIntervalUnion.cpp | 150 LiveInterval *VReg = LiveUnionI.value(); in collectInterferingVRegs() local
151 if (VReg != RecentReg && !isSeenInterference(VReg)) { in collectInterferingVRegs()
152 RecentReg = VReg; in collectInterferingVRegs()
153 InterferingVRegs.push_back(VReg); in collectInterferingVRegs()
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| D | MachineFunction.cpp | 469 unsigned VReg = MRI.getLiveInVirtReg(PReg); in addLiveIn() local
470 if (VReg) { in addLiveIn()
471 const TargetRegisterClass *VRegRC = MRI.getRegClass(VReg); in addLiveIn()
481 return VReg; in addLiveIn()
483 VReg = MRI.createVirtualRegister(RC); in addLiveIn()
484 MRI.addLiveIn(PReg, VReg); in addLiveIn()
485 return VReg; in addLiveIn()
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| D | TailDuplication.cpp | 246 unsigned VReg = SSAUpdateVRs[i]; in TailDuplicateAndUpdate() local
247 SSAUpdate.Initialize(VReg); in TailDuplicateAndUpdate()
251 MachineInstr *DefMI = MRI->getVRegDef(VReg); in TailDuplicateAndUpdate()
255 SSAUpdate.AddAvailableValue(DefBB, VReg); in TailDuplicateAndUpdate()
260 SSAUpdateVals.find(VReg); in TailDuplicateAndUpdate()
268 MachineRegisterInfo::use_iterator UI = MRI->use_begin(VReg); in TailDuplicateAndUpdate()
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| D | CallingConvLower.cpp | 246 unsigned VReg = MF.addLiveIn(PReg, RC); in analyzeMustTailForwardedRegisters() local
247 Forwards.push_back(ForwardedRegister(VReg, PReg, RegVT)); in analyzeMustTailForwardedRegisters()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 288 unsigned VReg = getDstOfOnlyCopyToRegUse(Op.getNode(), Op.getResNo()); in getVR() local
291 if (!VReg) { in getVR()
294 VReg = MRI->createVirtualRegister(RC); in getVR()
297 TII->get(TargetOpcode::IMPLICIT_DEF), VReg); in getVR()
298 return VReg; in getVR()
321 unsigned VReg = getVR(Op, VRBaseMap); in AddRegisterOperand() local
322 assert(TargetRegisterInfo::isVirtualRegister(VReg) && "Not a vreg?"); in AddRegisterOperand()
336 if (DstRC && !MRI->constrainRegClass(VReg, DstRC, MinRCSize)) { in AddRegisterOperand()
339 TII->get(TargetOpcode::COPY), NewVReg).addReg(VReg); in AddRegisterOperand()
340 VReg = NewVReg; in AddRegisterOperand()
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| D | FunctionLoweringInfo.cpp | 519 unsigned &VReg = I.first->second; in getCatchPadExceptionPointerVReg() local
521 VReg = MRI.createVirtualRegister(RC); in getCatchPadExceptionPointerVReg()
522 assert(VReg && "null vreg in exception pointer table!"); in getCatchPadExceptionPointerVReg()
523 return VReg; in getCatchPadExceptionPointerVReg()
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| /external/llvm/lib/CodeGen/MIRParser/ |
| D | MIRParser.cpp | 349 for (const auto &VReg : YamlMF.VirtualRegisters) { in initializeRegisterInfo() local
350 const auto *RC = getRegClass(MF, VReg.Class.Value); in initializeRegisterInfo()
352 return error(VReg.Class.SourceRange.Start, in initializeRegisterInfo()
354 VReg.Class.Value + "'"); in initializeRegisterInfo()
356 if (!PFS.VirtualRegisterSlots.insert(std::make_pair(VReg.ID.Value, Reg)) in initializeRegisterInfo()
358 return error(VReg.ID.SourceRange.Start, in initializeRegisterInfo()
360 Twine(VReg.ID.Value) + "'"); in initializeRegisterInfo()
361 if (!VReg.PreferredRegister.Value.empty()) { in initializeRegisterInfo()
364 VReg.PreferredRegister.Value, PFS, in initializeRegisterInfo()
366 return error(Error, VReg.PreferredRegister.SourceRange); in initializeRegisterInfo()
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| /external/llvm/lib/Target/ARM/ |
| D | ThumbRegisterInfo.cpp | 508 unsigned VReg = 0; in eliminateFrameIndex() local
595 VReg = MF.getRegInfo().createVirtualRegister(&ARM::tGPRRegClass); in eliminateFrameIndex()
600 emitThumbRegPlusImmInReg(MBB, II, dl, VReg, FrameReg, in eliminateFrameIndex()
603 emitLoadConstPool(MBB, II, dl, VReg, 0, Offset); in eliminateFrameIndex()
607 emitThumbRegPlusImmediate(MBB, II, dl, VReg, FrameReg, Offset, TII, in eliminateFrameIndex()
610 MI.getOperand(FIOperandNum).ChangeToRegister(VReg, false, false, true); in eliminateFrameIndex()
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| /external/llvm/lib/Target/NVPTX/InstPrinter/ |
| D | NVPTXInstPrinter.cpp | 66 unsigned VReg = RegNo & 0x0FFFFFFF; in printRegName() local
67 OS << VReg; in printRegName()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonStoreWidening.cpp | 451 unsigned VReg = MF->getRegInfo().createVirtualRegister(RC); in createWideStores() local
452 MachineInstr *TfrI = BuildMI(*MF, DL, TfrD, VReg) in createWideStores()
466 .addReg(VReg, RegState::Kill); in createWideStores()
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