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Searched refs:simm16 (Results 1 – 12 of 12) sorted by relevance

/external/llvm/lib/Target/AMDGPU/
DSIInstructions.td413 (ins SReg_64:$sdst, u16imm:$simm16), " $sdst, $simm16"
418 (ins SReg_32:$sdst, u16imm:$simm16), " $sdst, $simm16"
424 (ins i32imm:$imm, u16imm:$simm16), " $imm, $simm16"
431 def S_NOP : SOPP <0x00000000, (ins i16imm:$simm16), "s_nop $simm16">;
437 let simm16 = 0;
444 0x00000002, (ins sopp_brtarget:$simm16), "s_branch $simm16",
445 [(br bb:$simm16)]> {
451 0x00000004, (ins sopp_brtarget:$simm16),
452 "s_cbranch_scc0 $simm16"
455 0x00000005, (ins sopp_brtarget:$simm16),
[all …]
DSIInstrFormats.td189 bits <16> simm16;
191 let Inst{15-0} = simm16;
199 bits <16> simm16;
202 let Inst{15-0} = simm16;
211 bits <16> simm16;
213 let Inst{15-0} = simm16;
DSIInstrInfo.td864 (ins SReg_32:$sdst, u16imm:$simm16), opName#" $sdst, $simm16"> {
869 (ins SReg_32:$sdst, u16imm:$simm16), opName#" $sdst, $simm16"> {
875 op, opName, (outs SReg_32:$sdst), (ins SReg_32:$src0, u16imm:$simm16),
876 " $sdst, $simm16"
/external/llvm/lib/Target/Mips/
DMicroMips64r6InstrInfo.td41 dag InOperandList = (ins GPROpnd:$rs, simm16:$imm);
50 dag InOperandList = (ins GPROpnd:$rt, simm16:$imm);
DMipsInstrInfo.td496 def simm16 : Operand<i32> {
652 let MIOperandInfo = (ops ptr_rc, simm16);
686 let MIOperandInfo = (ops ptr_rc, simm16);
693 let MIOperandInfo = (ops ptr_rc, simm16);
1332 def ADDiu : MMRel, StdMMR6Rel, ArithLogicI<"addiu", simm16, GPR32Opnd,
1336 def ADDi : MMRel, ArithLogicI<"addi", simm16, GPR32Opnd>, ADDI_FM<0x8>,
1338 def SLTi : MMRel, SetCC_I<"slti", setlt, simm16, immSExt16, GPR32Opnd>,
1340 def SLTiu : MMRel, SetCC_I<"sltiu", setult, simm16, immSExt16, GPR32Opnd>,
1771 (ins GPR32Opnd:$rs, GPR32Opnd:$rt, simm16:$imm),
1776 (ROLImm GPR32Opnd:$rd, GPR32Opnd:$rd, simm16:$imm), 0>;
[all …]
DMips16InstrInfo.td24 let MIOperandInfo = (ops CPU16Regs, simm16, CPU16RegsPlusSP);
30 let MIOperandInfo = (ops CPU16RegsPlusSP, simm16);
51 FI816<_func, (outs), (ins simm16:$imm), !strconcat(asmstr, asmstr2),
69 FRI16<op, (outs CPU16Regs:$rx), (ins simm16:$imm),
83 FRI16<op, (outs), (ins CPU16Regs:$rx, simm16:$imm),
92 FRI16<_op, (outs CPU16Regs:$rx), (ins CPU16Regs:$rx_, simm16:$imm),
108 MipsPseudo16<(outs CPU16Regs:$cc), (ins CPU16Regs:$rx, simm16:$imm),
147 FEXT_I816<_func, (outs), (ins simm16:$imm), !strconcat(asmstr, asmstr2),
180 FEXT_RI16<_op, (outs CPU16Regs:$rx), (ins simm16:$imm),
189 FEXT_RI16<_op, (outs ), (ins CPU16Regs:$rx, simm16:$imm),
[all …]
DMicroMips32r6InstrInfo.td255 class ADDIU_MMR6_DESC : ArithLogicI<"addiu", simm16, GPR32Opnd>;
438 dag InOperandList = (ins GPROpnd:$rs, simm16:$imm);
450 dag InOperandList = (ins simm16:$imm);
507 class ANDI_MMR6_DESC : ArithLogicI<"andi", simm16, GPR32Opnd>;
510 class ORI_MMR6_DESC : ArithLogicI<"ori", simm16, GPR32Opnd>;
512 class XORI_MMR6_DESC : ArithLogicI<"xori", simm16, GPR32Opnd>;
DMicroMipsInstrInfo.td122 let MIOperandInfo = (ops GPR32, simm16);
670 def ADDiu_MM : MMRel, ArithLogicI<"addiu", simm16, GPR32Opnd>,
672 def ADDi_MM : MMRel, ArithLogicI<"addi", simm16, GPR32Opnd>,
674 def SLTi_MM : MMRel, SetCC_I<"slti", setlt, simm16, immSExt16, GPR32Opnd>,
676 def SLTiu_MM : MMRel, SetCC_I<"sltiu", setult, simm16, immSExt16, GPR32Opnd>,
DMips64r6InstrInfo.td51 dag InOperandList = (ins GPROpnd:$rt, simm16:$imm);
DMips32r6InstrInfo.td272 dag InOperandList = (ins simm16:$imm);
283 dag InOperandList = (ins GPROpnd:$rt, simm16:$imm);
/external/valgrind/VEX/priv/
Dguest_ppc_toIR.c1678 static IRExpr* ea_rA_simm ( UInt rA, UInt simm16 ) in ea_rA_simm() argument
1683 mkSzExtendS16(ty, simm16)); in ea_rA_simm()
1707 static IRExpr* ea_rAor0_simm ( UInt rA, UInt simm16 ) in ea_rAor0_simm() argument
1712 return mkSzExtendS16(ty, simm16); in ea_rAor0_simm()
1714 return ea_rA_simm( rA, simm16 ); in ea_rAor0_simm()
3484 Long simm16 = extend_s_16to64(uimm16); in dis_int_arith() local
3498 DIP("addic r%u,r%u,%d\n", rD_addr, rA_addr, (Int)simm16); in dis_int_arith()
3507 DIP("addic. r%u,r%u,%d\n", rD_addr, rA_addr, (Int)simm16); in dis_int_arith()
3521 DIP("li r%u,%d\n", rD_addr, (Int)simm16); in dis_int_arith()
3524 DIP("addi r%u,r%u,%d\n", rD_addr, rA_addr, (Int)simm16); in dis_int_arith()
[all …]
/external/mesa3d/src/gallium/drivers/radeon/
DSIInstructions.td655 def S_WAITCNT : SOPP <0x0000000c, (ins i32imm:$simm16), "S_WAITCNT $simm16",