| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-bitfield-extract.ll | 111 ; lsr is an alias of ubfm
132 ; lsl is an alias of ubfm
154 ; lsr is an alias of ubfm
176 ; lsr is an alias of ubfm
197 ; lsl is an alias of ubfm
217 ; lsl is an alias of ubfm
246 ; lsr is an alias of ubfm
269 ; lsr is an alias of ubfm
292 ; lsr is an alias of ubfm
295 ; lsl is an alias of ubfm
[all …]
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| /external/llvm/test/MC/AArch64/ |
| D | arm64-bitfield-encoding.s | 12 ubfm w1, w2, #1, #15
13 ubfm x1, x2, #1, #15
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| D | arm64-aliases.s | 217 ubfm w0, w0, #31, #30
218 ubfm x0, x0, #63, #62
219 ubfm w0, w0, #4, #31
220 ubfm x0, x0, #4, #63
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| D | basic-a64-diagnostics.s | 798 ubfm w3, w5, #32, #1
799 ubfm w7, w11, #19, #32
800 ubfm x29, x30, #64, #0
801 ubfm x10, x20, #63, #64
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| D | basic-a64-instructions.s | 966 ubfm x4, x5, #12, #10
967 ubfm xzr, x4, #0, #0
968 ubfm x4, xzr, #63, #5
969 ubfm x5, x6, #12, #63
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| /external/v8/src/arm64/ |
| D | assembler-arm64.h | 1128 void ubfm(const Register& rd, const Register& rn, int immr, int imms);
1186 ubfm(rd, rn, (reg_size - shift) % reg_size, reg_size - shift - 1); in lsl()
1192 ubfm(rd, rn, shift, rd.SizeInBits() - 1); in lsr()
1199 ubfm(rd, rn, (rd.SizeInBits() - lsb) & (rd.SizeInBits() - 1), width - 1); in ubfiz()
1206 ubfm(rd, rn, lsb, lsb + width - 1); in ubfx()
1211 ubfm(rd, rn, 0, 7); in uxtb()
1216 ubfm(rd, rn, 0, 15); in uxth()
1221 ubfm(rd, rn, 0, 31); in uxtw()
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| D | assembler-arm64.cc | 1306 void Assembler::ubfm(const Register& rd, const Register& rn, int immr, in ubfm() function in v8::internal::Assembler
2423 case UXTW: ubfm(rd, rn_, non_shift_bits, high_bit); break; in EmitExtendShift()
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| /external/vixl/doc/ |
| D | changelog.md | 33 + MacroAssembler support for `bfm`, `ubfm` and `sbfm`.
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| D | supported-instructions.md | 1334 void ubfm(const Register& rd,
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| /external/vixl/src/vixl/a64/ |
| D | assembler-a64.h | 1434 void ubfm(const Register& rd,
1507 ubfm(rd, rn, (reg_size - shift) % reg_size, reg_size - shift - 1); in lsl()
1513 ubfm(rd, rn, shift, rd.size() - 1); in lsr()
1523 ubfm(rd, rn, (rd.size() - lsb) & (rd.size() - 1), width - 1); in ubfiz()
1533 ubfm(rd, rn, lsb, lsb + width - 1); in ubfx()
1538 ubfm(rd, rn, 0, 7); in uxtb()
1543 ubfm(rd, rn, 0, 15); in uxth()
1548 ubfm(rd, rn, 0, 31); in uxtw()
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| D | assembler-a64.cc | 1109 void Assembler::ubfm(const Register& rd, in ubfm() function in vixl::Assembler
4861 case UXTW: ubfm(rd, rn_, non_shift_bits, high_bit); break; in EmitExtendShift()
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| D | macro-assembler-a64.h | 2008 ubfm(rd, rn, immr, imms); in Ubfm()
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| /external/valgrind/ |
| D | README.aarch64 | 219 ubfm/sbfm etc: special case cases that are simple shifts, as iropt
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| /external/v8/test/cctest/ |
| D | test-assembler-arm64.cc | 4975 TEST(ubfm) { in TEST() argument
4986 __ ubfm(x10, x1, 16, 31); in TEST() local
4987 __ ubfm(x11, x1, 32, 15); in TEST() local
4988 __ ubfm(x12, x1, 32, 47); in TEST() local
4989 __ ubfm(x13, x1, 48, 35); in TEST() local
4991 __ ubfm(w25, w1, 16, 23); in TEST() local
4992 __ ubfm(w26, w1, 24, 15); in TEST() local
4993 __ ubfm(w27, w2, 16, 23); in TEST() local
4994 __ ubfm(w28, w2, 24, 15); in TEST() local
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 958 defm UBFM : BitfieldImm<0b10, "ubfm">;
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| /external/vixl/test/ |
| D | test-assembler-a64.cc | 9060 TEST(ubfm) { in TEST() argument
|