| /toolchain/binutils/binutils-2.25/include/opcode/ |
| D | m88k.h | 315 #define MUL TBND + 1 macro
316 #define DIV MUL +2
317 #define DIVU MUL +3
318 #define MASK MUL +4
319 #define FF0 MUL +5
320 #define FF1 MUL +6
321 #define CLR MUL +7
322 #define SET MUL +8
323 #define EXT MUL +9
324 #define EXTU MUL +10
[all …]
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| D | nios2r1.h | 397 #define MATCH_R1_MUL MATCH_R1_OPX0 (MUL)
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/metag/ |
| D | metadsp21-invalid.s | 5 DP MUL D0Re0, D0Ar6, D0Ar4
6 DN MUL D0Re0, D0Re0, [D0AR.0+D0ARI.1++]
7 DZ MUL [D0BW.1], D0Re0, [D0AR.0+D0ARI.1++]
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| D | metafpu21ext.s | 79 FD MUL FX.0,FX.2,FX.4
80 F MUL FX.3,FX.1,FX.0
81 FL MUL FX.6,FX.4,FX.2
82 FDI MUL FX.0,FX.2,FX.4
83 FI MUL FX.3,FX.1,FX.0
84 FLI MUL FX.6,FX.4,FX.2
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| D | metafpu21ext.d | 87 .*: f1008920 FD MUL FX\.0,FX\.2,FX\.4
88 .*: f1184100 F MUL FX\.3,FX\.1,FX\.0
89 .*: f1310540 FL MUL FX\.6,FX\.4,FX\.2
90 .*: f10089a0 FDI MUL FX\.0,FX\.2,FX\.4
91 .*: f1184180 FI MUL FX\.3,FX\.1,FX\.0
92 .*: f13105c0 FLI MUL FX\.6,FX\.4,FX\.2
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| D | metacore21ext.s | 2 MUL D0Re0,D0Ar6,D0Ar2
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| D | thumb2_mul-bad.l | 6 [^:]*:17: Error: Thumb-2 MUL must not set flags -- `muls.w r0,r0,r1'
8 [^:]*:20: Error: Thumb-2 MUL must not set flags -- `muls r0,r8,r0'
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| D | thumb2_bad_reg.s | 230 @ MUL
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mmix/ |
| D | list-insns.s | 35 MUL $122,$203,44
36 MUL $102,$30,$40
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| D | reg3-op.s | 3 Main MUL X,Y,Z
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| D | reg3-op.l | 6 3 0000 18170C43 Main MUL X,Y,Z
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| D | list-insns.l | 38 35 0070 197ACB2C MUL \$122,\$203,44
39 36 0074 18661E28 MUL \$102,\$30,\$40
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/d30v/ |
| D | mul.s | 2 # IU: MUL, MAC, MACS, MSUB, MSUBS (a)
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| /toolchain/binutils/binutils-2.25/gas/config/ |
| D | rx-parse.y | 157 %token MACHI MACLO MAX MIN MOV MOVU MUL MULHI MULLO MULU MVFACHI MVFACMI MVFACLO
354 | MUL '#' EXPR ',' REG
788 | MUL { sub_op = 3; } op_subadd
1049 OPC(MUL),
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| /toolchain/binutils/binutils-2.25/opcodes/ |
| D | m88k-dis.c | 124 …{0xf4006c00,"mulu ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,4,PINT,MUL, 0,1,1,1,0,0,…
140 …{0x6c000000,"mulu ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {4,1,PINT,MUL, i16bit,1,0,1,0…
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| D | rx-decode.opc | 599 /* MUL */
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| D | nds32-asm.c | 384 {"mul", "=rt,%ra,%rb", ALU2 (MUL), 4, ATTR_ALL, 0, NULL, 0, NULL},
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| D | ChangeLog-2009 | 538 * rx-decode.opc (decode_opcode): Fix flags for MUL, SUNTIL, and SWHILE.
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| /toolchain/binutils/binutils-2.25/gas/doc/ |
| D | c-pdp11.texi | 89 @code{MARK}, @code{MUL}, @code{RTT}, @code{SOB} @code{SXT}, and
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| /toolchain/binutils/binutils-2.25/cpu/ |
| D | mt.cpu | 275 (ADD ADDU SUB SUBU MUL - - -
659 (dni mul "MUL DstReg, SrcReg1, SrcReg2"
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| D | mep-core.cpu | 885 ADVCK MUL MULR DIV)
2132 (dnci mul "multiply" (OPTIONAL_MUL_INSN (STALL MUL))
2145 (dnci mulu "multiply unsigned" (OPTIONAL_MUL_INSN (STALL MUL))
2188 (dnci madd "multiply accumulate" (OPTIONAL_MUL_INSN (STALL MUL))
2202 (dnci maddu "multiply accumulate unsigned" (OPTIONAL_MUL_INSN (STALL MUL))
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| D | lm32.cpu | 246 ("MUL" 34)
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| D | or1korbis.cpu | 249 ("MUL" #x6)
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| D | epiphany.cpu | 331 (ADD SUB MUL MADD MSUB FLOAT FIX FABS))
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| /toolchain/binutils/binutils-2.25/gas/ |
| D | ChangeLog-2009 | 2668 of MUL when possible.
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