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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/h8300/
Dt04_sub.s7 sub.b #0x12:8,@er1 ;7d10a112
8 sub.b #0x12:8,@(0x3:2,er1) ;01776818a112
9 sub.b #0x12:8,@er1+ ;01746c18a112
10 sub.b #0x12:8,@-er1 ;01776c18a112
11 sub.b #0x12:8,@+er1 ;01756c18a112
12 sub.b #0x12:8,@er1- ;01766c18a112
13 sub.b #0x12:8,@(0x1234:16,er1) ;01746e181234a112
14 sub.b #0x12:8,@(0x12345678:32,er1) ;78146a2812345678a112
15 sub.b #0x12:8,@(0x1234:16,r2l.b) ;01756e281234a112
16 sub.b #0x12:8,@(0x1234:16,r2.w) ;01766e281234a112
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arc/
Dsub.s1 # sub test
3 sub r0,r1,r2
4 sub r26,fp,sp
5 sub ilink1,ilink2,blink
6 sub r56,r59,lp_count
8 sub r0,r1,0
9 sub r0,0,r2
10 sub 0,r1,r2
11 sub r0,r1,-1
12 sub r0,-1,r2
[all …]
Dsub.d9 0: 00 84 00 50 50008400 sub r0,r1,r2
10 4: 00 b8 4d 53 534db800 sub gp,fp,sp
11 8: 00 3e af 53 53af3e00 sub ilink1,ilink2,blink
12 c: 00 f8 1d 57 571df800 sub r56,r59,lp_count
13 10: 00 fe 00 50 5000fe00 sub r0,r1,0
14 14: 00 84 1f 50 501f8400 sub r0,0,r2
15 18: 00 84 e0 57 57e08400 sub 0,r1,r2
16 1c: ff ff 00 50 5000ffff sub r0,r1,-1
17 20: ff 85 1f 50 501f85ff sub r0,-1,r2
18 24: 00 84 e0 57 57e08400 sub 0,r1,r2
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/rx/
Dsub.d9 0: 60 00 sub #0, r0
10 2: 60 0f sub #0, r15
11 4: 60 f0 sub #15, r0
12 6: 60 ff sub #15, r15
13 8: 43 00 sub r0, r0
14 a: 43 0f sub r0, r15
15 c: 43 f0 sub r15, r0
16 e: 43 ff sub r15, r15
17 10: 40 00 sub \[r0\]\.ub, r0
18 12: 40 0f sub \[r0\]\.ub, r15
[all …]
/toolchain/binutils/binutils-2.25/opcodes/
Dnds32-asm.h268 #define LSMW(sub) (OP6 (LSMW) | N32_LSMW_ ## sub) argument
269 #define JREG(sub) (OP6 (JREG) | N32_JREG_ ## sub) argument
272 #define BR2(sub) (OP6 (BR2) | (N32_BR2_ ## sub << 16)) argument
273 #define SIMD(sub) (OP6 (SIMD) | N32_SIMD_ ## sub) argument
274 #define ALU1(sub) (OP6 (ALU1) | N32_ALU1_ ## sub) argument
275 #define ALU2(sub) (OP6 (ALU2) | N32_ALU2_ ## sub) argument
276 #define MISC(sub) (OP6 (MISC) | N32_MISC_ ## sub) argument
277 #define MEM(sub) (OP6 (MEM) | N32_MEM_ ## sub) argument
278 #define FPU_RA_IMMBI(sub) (OP6 (sub) | __BIT (12)) argument
279 #define FS1(sub) (OP6 (COP) | N32_FPU_FS1 | (N32_FPU_FS1_ ## sub << 6)) argument
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/xc16x/
Dsub_test.s3 sub r0,r1
4 sub r0,[r1]
5 sub r0,[r1+]
6 sub r0,#0x1
7 sub r0,#0x7643
8 sub r0,0x7643
9 sub 0x7643,r0
11 sub r1,r0
12 sub r1,[r0]
13 sub r1,[r0+]
[all …]
Dsub.s5 sub r0,r1
6 sub r0,[r1]
7 sub r0,[r1+]
8 sub r0,#0x1
9 sub r0,#0x7643
10 sub r0,0x7643
11 sub 0x7643,r0
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/epiphany/
Dregression.d18 16: ff3f ff8a sub.l r63,r63,r62
81 74: fe3f fc0a sub.l r63,r63,r4
89 86: febf fc0a sub.l r63,r63,r5
97 96: fe3f fc0a sub.l r63,r63,r4
105 a8: febf fc0a sub.l r63,r63,r5
113 b8: fe3f fc0a sub.l r63,r63,r4
121 ca: febf fc0a sub.l r63,r63,r5
129 da: fe3f fc0a sub.l r63,r63,r4
137 ea: febf fc0a sub.l r63,r63,r5
145 fa: ff3f fc0a sub.l r63,r63,r6
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/score/
Darith_32.d24 26: 490f sub! r0, r15
25 28: 490f sub! r0, r15
26 2a: 490f sub! r0, r15
27 2c: 490f sub! r0, r15
28 2e: 490f sub! r0, r15
29 30: 490f sub! r0, r15
30 32: 490f sub! r0, r15
31 34: 490f sub! r0, r15
32 36: 490f sub! r0, r15
33 38: 8000 3c15 sub.c r0, r0, r15
[all …]
DrD_rA_rB.d38 40: 2021 sub! r0, r2
39 42: 2021 sub! r0, r2
40 44: 2541 sub! r5, r4
41 46: 2541 sub! r5, r4
42 48: 2f41 sub! r15, r4
43 4a: 2f41 sub! r15, r4
44 4c: 2f31 sub! r15, r3
45 4e: 2f31 sub! r15, r3
46 50: 2831 sub! r8, r3
47 52: 2831 sub! r8, r3
[all …]
/toolchain/binutils/binutils-2.25/intl/
Dlocalename.c426 int primary, sub; local
448 sub = SUBLANGID (langid);
459 switch (sub)
482 switch (sub)
499 switch (sub)
516 switch (sub)
527 switch (sub)
535 switch (sub)
561 switch (sub)
574 switch (sub)
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
Dthumb2_add.s14 sub r0, pc, #0x800
15 sub r9, pc, #0
16 sub r9, pc, #0x400
17 sub r8, r9, #0x400
18 sub r8, r9, #0x101
19 sub r3, r1, #0x101
21 sub r3, #1
22 sub sp, sp, #0x100
23 sub sp, sp, #0x200
24 sub sp, sp, #0x101
Dgroup-reloc-alu.d88 0[0-9a-f]+ <[^>]+> e2400c01 sub r0, r0, #256 ; 0x100
90 0[0-9a-f]+ <[^>]+> e2400c01 sub r0, r0, #256 ; 0x100
92 0[0-9a-f]+ <[^>]+> e2400c01 sub r0, r0, #256 ; 0x100
94 0[0-9a-f]+ <[^>]+> e2400c01 sub r0, r0, #256 ; 0x100
96 0[0-9a-f]+ <[^>]+> e2400c01 sub r0, r0, #256 ; 0x100
98 0[0-9a-f]+ <[^>]+> e2400c01 sub r0, r0, #256 ; 0x100
100 0[0-9a-f]+ <[^>]+> e2400c01 sub r0, r0, #256 ; 0x100
102 0[0-9a-f]+ <[^>]+> e2400c01 sub r0, r0, #256 ; 0x100
104 0[0-9a-f]+ <[^>]+> e2400c01 sub r0, r0, #256 ; 0x100
106 0[0-9a-f]+ <[^>]+> e2400c01 sub r0, r0, #256 ; 0x100
[all …]
Dsp-pc-usage-t.s21 sub sp,sp,#0 label
25 sub sp,sp,r0 label
26 sub sp,sp,r0,lsl #1 label
43 @ R13 as the first operand <Rn> in any add{s}, cmn, cmp, or sub{s} instruction.
57 sub sp, #0 label
59 sub r0, sp, #0 label
92 sub r0, sp , #0 label
96 sub sp, sp , #0 label
102 sub sp, #0 label
104 sub r0, sp, r0, lsl #1 label
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mn10200/
Dsub.s2 sub d1,d2 define
3 sub d2,a3 define
4 sub a3,d3
5 sub a3,a2
6 sub 32767,d2
7 sub 131071,d2
8 sub 32767,a2
9 sub 131071,a2
/toolchain/binutils/binutils-2.25/ld/testsuite/ld-frv/
Dfdpic-static-1.d35 [0-9a-f ]+: 00 01 41 24 sub\.p gr20,gr36,gr0
36 [0-9a-f ]+: 00 01 41 28 sub\.p gr20,gr40,gr0
37 [0-9a-f ]+: 00 01 41 10 sub\.p gr20,gr16,gr0
38 [0-9a-f ]+: 00 01 41 14 sub\.p gr20,gr20,gr0
39 [0-9a-f ]+: 00 01 41 2c sub\.p gr20,gr44,gr0
40 [0-9a-f ]+: 00 01 41 04 sub\.p gr20,gr4,gr0
41 [0-9a-f ]+: 00 01 41 08 sub\.p gr20,gr8,gr0
42 [0-9a-f ]+: 00 01 41 0c sub\.p gr20,gr12,gr0
43 [0-9a-f ]+: 00 01 41 18 sub\.p gr20,gr24,gr0
47 [0-9a-f ]+: 00 01 41 08 sub\.p gr20,gr8,gr0
[all …]
Dfdpic-static-7.d35 [0-9a-f ]+: 00 01 41 24 sub\.p gr20,gr36,gr0
36 [0-9a-f ]+: 00 01 41 28 sub\.p gr20,gr40,gr0
37 [0-9a-f ]+: 00 01 41 10 sub\.p gr20,gr16,gr0
38 [0-9a-f ]+: 00 01 41 14 sub\.p gr20,gr20,gr0
39 [0-9a-f ]+: 00 01 41 2c sub\.p gr20,gr44,gr0
40 [0-9a-f ]+: 00 01 41 04 sub\.p gr20,gr4,gr0
41 [0-9a-f ]+: 00 01 41 08 sub\.p gr20,gr8,gr0
42 [0-9a-f ]+: 00 01 41 0c sub\.p gr20,gr12,gr0
43 [0-9a-f ]+: 00 01 41 18 sub\.p gr20,gr24,gr0
47 [0-9a-f ]+: 00 01 41 0c sub\.p gr20,gr12,gr0
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/
Dshifted.d419 66c: cb030041 sub x1, x2, x3
420 670: cb030441 sub x1, x2, x3, lsl #1
421 674: cb030c41 sub x1, x2, x3, lsl #3
422 678: cb031c41 sub x1, x2, x3, lsl #7
423 67c: cb033c41 sub x1, x2, x3, lsl #15
424 680: cb037c41 sub x1, x2, x3, lsl #31
425 684: cb03fc41 sub x1, x2, x3, lsl #63
426 688: cb430041 sub x1, x2, x3, lsr #0
427 68c: cb430441 sub x1, x2, x3, lsr #1
428 690: cb430c41 sub x1, x2, x3, lsr #3
[all …]
Daddsub.d440 6c0: 4b0100f0 sub w16, w7, w1
441 6c4: 4b2100f0 sub w16, w7, w1, uxtb
442 6c8: 4b2100f0 sub w16, w7, w1, uxtb
443 6cc: 4b2104f0 sub w16, w7, w1, uxtb #1
444 6d0: 4b2108f0 sub w16, w7, w1, uxtb #2
445 6d4: 4b210cf0 sub w16, w7, w1, uxtb #3
446 6d8: 4b2110f0 sub w16, w7, w1, uxtb #4
447 6dc: 4b2120f0 sub w16, w7, w1, uxth
448 6e0: 4b2120f0 sub w16, w7, w1, uxth
449 6e4: 4b2124f0 sub w16, w7, w1, uxth #1
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mn10300/
Dsub.s2 sub d1,d2 define
3 sub d2,a3 define
4 sub a3,d3
5 sub a3,a2
6 sub 131071,d2
7 sub 131071,a1
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/z80/
Darith.s28 sub a
29 sub b
30 sub c
31 sub d
32 sub e
33 sub h
34 sub l
35 sub (hl)
36 sub (ix+5)
37 sub (iy+5)
[all …]
/toolchain/binutils/binutils-2.25/config/
Ddepstand.m454 mkdir sub
71 : > sub/conftest.c
73 echo '#include "conftst'$i'.h"' >> sub/conftest.c
74 # Using `: > sub/conftst$i.h' creates only sub/conftst1.h with
76 touch sub/conftst$i.h
78 echo "include sub/conftest.Po" > confmf
84 source=sub/conftest.c object=sub/conftest.${OBJEXT-o} \
85 depfile=sub/conftest.Po tmpdepfile=sub/conftest.TPo \
86 $SHELL ./depcomp $depcc -c -o sub/conftest.${OBJEXT-o} sub/conftest.c"
89 grep sub/conftst6.h sub/conftest.Po >>conftest.err 2>&1 &&
[all …]
/toolchain/binutils/binutils-2.25/ld/testsuite/ld-tic6x/
Dshlib-2.s7 .global sub symbol
8 .type sub, @function
9 sub: label
10 sub .d2 B15, 16, B15
23 .size sub, .-sub
/toolchain/binutils/binutils-2.25/include/opcode/
Dnds32.h74 #define N32_ALU1(sub, rt, ra, rb) \ argument
75 N32_TYPE4 (ALU1, rt, ra, rb, 0, N32_ALU1_##sub)
76 #define N32_ALU1_SH(sub, rt, ra, rb, rd) \ argument
77 N32_TYPE4 (ALU1, rt, ra, rb, rd, N32_ALU1_##sub)
78 #define N32_ALU2(sub, rt, ra, rb) \ argument
79 N32_TYPE3 (ALU2, rt, ra, rb, N32_ALU2_##sub)
80 #define N32_BR1(sub, rt, ra, imm14s) \ argument
81 N32_TYPE2 (BR1, rt, ra, (N32_BR1_##sub << 14) | (imm14s & __MASK (14)))
82 #define N32_BR2(sub, rt, imm16s) \ argument
83 N32_TYPE1 (BR2, rt, (N32_BR2_##sub << 16) | (imm16s & __MASK (16)))
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/hppa/unsorted/
Dbrlenbug.s646 sub %r6,%r4,%r19 ;# 7987 subsi3/1
723 sub %r6,%r4,%r19 ;# 586 subsi3/1
725 sub %r12,%r4,%r19 ;# 590 subsi3/1
728 sub %r10,%r4,%r19 ;# 596 subsi3/1
732 sub %r8,%r4,%r19 ;# 603 subsi3/1
736 sub %r9,%r4,%r19 ;# 610 subsi3/1
741 sub %r6,%r4,%r19 ;# 515 subsi3/1
838 sub %r6,%r3,%r19 ;# 8003 subsi3/1
963 sub %r6,%r3,%r19 ;# 1247 subsi3/1
965 sub %r12,%r3,%r19 ;# 1251 subsi3/1
[all …]

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