1%include "mips/funopWider.S" {"instr":"b f2l_doconv", "st_result":"SET_VREG64(rRESULT0, rRESULT1, rOBJ)"} 2%break 3 4f2l_doconv: 5#ifdef MIPS32REVGE6 6 l.s fa1, .LLONG_TO_max 7 cmp.ule.s ft2, fa1, fa0 8 li rRESULT0, ~0 9 li rRESULT1, ~0x80000000 10 bc1nez ft2, .L${opcode}_set_vreg 11 12 l.s fa1, .LLONG_TO_min 13 cmp.ule.s ft2, fa0, fa1 14 li rRESULT0, 0 15 li rRESULT1, 0x80000000 16 bc1nez ft2, .L${opcode}_set_vreg 17 18 mov.s fa1, fa0 19 cmp.un.s ft2, fa0, fa1 20 li rRESULT0, 0 21 li rRESULT1, 0 22 bc1nez ft2, .L${opcode}_set_vreg 23#else 24 l.s fa1, .LLONG_TO_max 25 c.ole.s fcc0, fa1, fa0 26 li rRESULT0, ~0 27 li rRESULT1, ~0x80000000 28 bc1t .L${opcode}_set_vreg 29 30 l.s fa1, .LLONG_TO_min 31 c.ole.s fcc0, fa0, fa1 32 li rRESULT0, 0 33 li rRESULT1, 0x80000000 34 bc1t .L${opcode}_set_vreg 35 36 mov.s fa1, fa0 37 c.un.s fcc0, fa0, fa1 38 li rRESULT0, 0 39 li rRESULT1, 0 40 bc1t .L${opcode}_set_vreg 41#endif 42 43 JAL(__fixsfdi) 44 45 b .L${opcode}_set_vreg 46 47.LLONG_TO_max: 48 .word 0x5f000000 49 50.LLONG_TO_min: 51 .word 0xdf000000 52