1%default {"result":"","second":"","wide":"","suffix":"","rem":"0","ext":"cdq"}
2/*
3 * 32-bit binary div/rem operation.  Handles special case of op1=-1.
4 */
5    /* div/rem/2addr vA, vB */
6    movl    rINST, %ecx                     # rcx <- BA
7    sarl    $$4, %ecx                       # rcx <- B
8    andb    $$0xf, rINSTbl                  # rINST <- A
9    .if $wide
10    GET_WIDE_VREG %rax, rINSTq              # eax <- vA
11    GET_WIDE_VREG $second, %rcx             # ecx <- vB
12    .else
13    GET_VREG %eax, rINSTq                   # eax <- vA
14    GET_VREG $second, %rcx                  # ecx <- vB
15    .endif
16    test${suffix}   $second, $second
17    jz      common_errDivideByZero
18    cmp${suffix}  $$-1, $second
19    je      2f
20    $ext                                    # rdx:rax <- sign-extended of rax
21    idiv${suffix}   $second
221:
23    .if $wide
24    SET_WIDE_VREG $result, rINSTq           # vA <- result
25    .else
26    SET_VREG $result, rINSTq                # vA <- result
27    .endif
28    ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
292:
30    .if $rem
31    xor${suffix} $result, $result
32    .else
33    neg${suffix} $result
34    .endif
35    jmp     1b
36