1#BCM4358 WLBGA module for iPA, eLNA board with PCIE for production package
2#adding two range TSSI parameters
3NVRAMRev=$Rev: 500210 $
4sromrev=11
5boardrev=0x1100
6## boardtype is subject to change
7boardtype=0x07a1
8boardflags=0x12001001
9#enable eLNA both 2G/5G
10boardflags2=0x00002000
11boardflags3=0x48000109
12#boardnum=57410
13macaddr=00:90:4c:16:70:01
14ccode=ALL
15regrev=0
16antswitch=0
17pdgain5g=4
18pdgain2g=4
19tworangetssi2g=0
20tworangetssi5g=0
21lowpowerrange2g=0
22lowpowerrange5g=0
23olpc_thresh=1
24femctrl=10
25vendid=0x14e4
26devid=0x43e9
27manfid=0x2d0
28#prodid=0x052e
29nocrc=1
30otpimagesize=484
31xtalfreq=37400
32
33rxgains2gelnagaina0=3
34rxgains2gtrisoa0=8
35rxgains2gtrelnabypa0=1
36rxgains5gelnagaina0=3
37rxgains5gtrisoa0=7
38rxgains5gtrelnabypa0=1
39rxgains5gmelnagaina0=3
40rxgains5gmtrisoa0=7
41rxgains5gmtrelnabypa0=1
42rxgains5ghelnagaina0=3
43rxgains5ghtrisoa0=6
44rxgains5ghtrelnabypa0=1
45rxgains2gelnagaina1=3
46rxgains2gtrisoa1=8
47rxgains2gtrelnabypa1=1
48rxgains5gelnagaina1=3
49rxgains5gtrisoa1=7
50rxgains5gtrelnabypa1=1
51rxgains5gmelnagaina1=3
52rxgains5gmtrisoa1=7
53rxgains5gmtrelnabypa1=1
54rxgains5ghelnagaina1=3
55rxgains5ghtrisoa1=6
56rxgains5ghtrelnabypa1=1
57rxchain=3
58txchain=3
59aa2g=3
60aa5g=3
61agbg0=0
62agbg1=0
63aga0=0
64aga1=0
65tssipos2g=1
66extpagain2g=2
67tssipos5g=1
68extpagain5g=2
69tempthresh=120
70temps_hysteresis=15
71tempoffset=255
72rawtempsense=0x1ff
73
74#PA parameters copied from 4356 wlbga design bcm94356wlsagbl
75pa2ga0=-135,6154,-693
76pa2ga1=-133,6240,-702
77pa2gccka0=-128,6716,-762
78pa2gccka1=-124,6801,-767
79pa5ga0=-176,6230,-750,-167,6386,-758,-180,6285,-754,-182,6269,-759
80pa5ga1=-197,5998,-740,-190,6158,-754,-200,6029,-742,-175,6414,-763
81
82#pa2ga0=-165,5774,-687
83#pa2ga1=-151,6040,-693
84#pa5ga0=-171,5985,-715,-164,5988,-710,-149,5992,-688,-165,5935,-699
85#pa5ga1=-178,6049,-724,-166,6117,-721,-157,6073,-704,-164,6043,-712
86
87###low range
88#pa2ga2=-108,4009,-577
89#pa2ga3=-129,4081,-572
90#pa5ga2=-101,4150,-583,-103,4080,-582,-80,4147,-590,-120,3997,-567
91#pa5ga3=-139,4129,-579,-133,4111,-580,-115,4129,-581,-121,4120,-577
92
93maxp2ga0=82
94maxp5ga0=84,84,86,86
95maxp2ga1=82
96maxp5ga1=84,86,86,86
97
98
99subband5gver=0x4
100pdoffsetcckma0=0x2
101pdoffsetcckma1=0x2
102pdoffset40ma0=0x2222
103pdoffset80ma0=0x0000
104pdoffset40ma1=0x2222
105pdoffset80ma1=0x0000
106cckbw202gpo=0x1112
107cckbw20ul2gpo=0x1112
108
109mcsbw202gpo=0xDC655444
110mcsbw402gpo=0xDC666666
111dot11agofdmhrbw202gpo=0x4431
112ofdmlrbw202gpo=0x0000
113
114mcsbw205glpo=0xA9754442
115mcsbw405glpo=0xA9864444
116mcsbw805glpo=0xBB865555
117
118mcsbw205gmpo=0xA9754442
119mcsbw405gmpo=0xA9864444
120mcsbw805gmpo=0xcc865555
121
122mcsbw205ghpo=0x99754442
123mcsbw405ghpo=0x99864444
124mcsbw805ghpo=0xcc865555
125
126mcslr5glpo=0x0000
127mcslr5gmpo=0x0000
128mcslr5ghpo=0x0000
129
130sb20in40hrpo=0x0
131sb20in80and160hr5glpo=0x0
132sb40and80hr5glpo=0x0
133sb20in80and160hr5gmpo=0x0
134sb40and80hr5gmpo=0x0
135sb20in80and160hr5ghpo=0x0
136sb40and80hr5ghpo=0x0
137sb20in40lrpo=0x0
138sb20in80and160lr5glpo=0x0
139sb40and80lr5glpo=0x0
140sb20in80and160lr5gmpo=0x0
141sb40and80lr5gmpo=0x0
142sb20in80and160lr5ghpo=0x0
143sb40and80lr5ghpo=0x0
144dot11agduphrpo=0x0
145dot11agduplrpo=0x0
146phycal_tempdelta=25
147temps_period=15
148phy4350_ss_opt=1
149AvVmid_c0=2,140,2,145,2,145,2,145,2,145
150AvVmid_c1=2,140,2,145,2,145,2,145,2,145
151rssicorrnorm_c0=-1,-1
152rssicorrnorm_c1=-1,-1
153rssicorrnorm5g_c0=1,2,2,0,2,2,1,2,2,1,2,3
154rssicorrnorm5g_c1=0,1,2,0,1,2,0,1,2,0,1,2
155epsdelta2g0=0
156epsdelta2g1=0
157papdwar=4
158cckdigfilttype=2
159cck_onecore_tx=1
160tssisleep_en=0x1f
161
162swctrlmap_5g=0x02080208,0x05a00000,0x04200000,0x000000,0x0fd
163swctrlmap_2g=0x14011401,0x28500000,0x08100000,0x020202,0x0ff
164#fem_table_init_val=0x1,0x1
165swctrlmapext_2g=0x0,0x0,0x0,0x0,0x03
166
167## Enabling OOB signal - needed for final board
168#host_wake_opt=0
169
170# For Sensor Hub UART
171#muxenab=0x4
172
173## 2G TX power compensation
174#powoffs2gtna0=0,-1,-1,0,2,3,4,4,2,0,-1,-2,-1,0
175#powoffs2gtna1=0,0,0,0,2,3,4,4,4,2,1,1,1,0
176
177#rpcal2g=10
178#rpcal5gb0=20
179#rpcal5gb1=10
180#rpcal5gb2=20
181#rpcal5gb3=10
182
183#dynamicsarctrl_2g=0xffb0
184#dynamicsarctrl_5g=0xffa0
185
186btc_params82=0x0
187btc_params51=0x409f
188btc_params73=0
189prot_btrssi_thresh=0
190
191pacalshift5ga0=0,0,0,0,-2,-2,0,-2,0,-2,0,-3
192pacalshift5ga1=0,0,0,0,-2,-1,0,-2,-2,-2,0,-3
193
194# ###########  BTC Dynctl profile params  ############
195# flags:bit0 - dynctl enabled, bit1 dynamic desense, bit2 dynamic mode
196btcdyn_flags=0x7
197btcdyn_dflt_dsns_level=0
198btcdyn_low_dsns_level=0
199btcdyn_mid_dsns_level=12
200btcdyn_high_dsns_level=2
201btcdyn_default_btc_mode=1
202# --- number of rows in the array vars below ---
203btcdyn_msw_rows=1
204btcdyn_dsns_rows=1
205# --- mode switch data rows (max is 4) ---
206btcdyn_msw_row0=1,12,-70,-5,-100
207# --- desense switching data rows (max is 4) ---
208btcdyn_dsns_row0=5,4,0,-65,-65
209## btc parameters should be added