1 // REQUIRES: aarch64-registered-target
2 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -S -O3 -o - %s | FileCheck %s
3
4 // Test new aarch64 intrinsics and types
5
6 #include <arm_neon.h>
7
test_vmla_lane_s16(int16x4_t a,int16x4_t b,int16x4_t v)8 int16x4_t test_vmla_lane_s16(int16x4_t a, int16x4_t b, int16x4_t v) {
9 // CHECK-LABEL: test_vmla_lane_s16
10 return vmla_lane_s16(a, b, v, 3);
11 // CHECK: mla {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3]
12 }
13
test_vmlaq_lane_s16(int16x8_t a,int16x8_t b,int16x4_t v)14 int16x8_t test_vmlaq_lane_s16(int16x8_t a, int16x8_t b, int16x4_t v) {
15 // CHECK-LABEL: test_vmlaq_lane_s16
16 return vmlaq_lane_s16(a, b, v, 3);
17 // CHECK: mla {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[3]
18 }
19
test_vmla_lane_s32(int32x2_t a,int32x2_t b,int32x2_t v)20 int32x2_t test_vmla_lane_s32(int32x2_t a, int32x2_t b, int32x2_t v) {
21 // CHECK-LABEL: test_vmla_lane_s32
22 return vmla_lane_s32(a, b, v, 1);
23 // CHECK: mla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
24 }
25
test_vmlaq_lane_s32(int32x4_t a,int32x4_t b,int32x2_t v)26 int32x4_t test_vmlaq_lane_s32(int32x4_t a, int32x4_t b, int32x2_t v) {
27 // CHECK-LABEL: test_vmlaq_lane_s32
28 return vmlaq_lane_s32(a, b, v, 1);
29 // CHECK: mla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
30 }
31
test_vmla_laneq_s16(int16x4_t a,int16x4_t b,int16x8_t v)32 int16x4_t test_vmla_laneq_s16(int16x4_t a, int16x4_t b, int16x8_t v) {
33 // CHECK-LABEL: test_vmla_laneq_s16
34 return vmla_laneq_s16(a, b, v, 7);
35 // CHECK: mla {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[7]
36 }
37
test_vmlaq_laneq_s16(int16x8_t a,int16x8_t b,int16x8_t v)38 int16x8_t test_vmlaq_laneq_s16(int16x8_t a, int16x8_t b, int16x8_t v) {
39 // CHECK-LABEL: test_vmlaq_laneq_s16
40 return vmlaq_laneq_s16(a, b, v, 7);
41 // CHECK: mla {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[7]
42 }
43
test_vmla_laneq_s32(int32x2_t a,int32x2_t b,int32x4_t v)44 int32x2_t test_vmla_laneq_s32(int32x2_t a, int32x2_t b, int32x4_t v) {
45 // CHECK-LABEL: test_vmla_laneq_s32
46 return vmla_laneq_s32(a, b, v, 3);
47 // CHECK: mla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
48 }
49
test_vmlaq_laneq_s32(int32x4_t a,int32x4_t b,int32x4_t v)50 int32x4_t test_vmlaq_laneq_s32(int32x4_t a, int32x4_t b, int32x4_t v) {
51 // CHECK-LABEL: test_vmlaq_laneq_s32
52 return vmlaq_laneq_s32(a, b, v, 3);
53 // CHECK: mla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
54 }
55
test_vmls_lane_s16(int16x4_t a,int16x4_t b,int16x4_t v)56 int16x4_t test_vmls_lane_s16(int16x4_t a, int16x4_t b, int16x4_t v) {
57 // CHECK-LABEL: test_vmls_lane_s16
58 return vmls_lane_s16(a, b, v, 3);
59 // CHECK: mls {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3]
60 }
61
test_vmlsq_lane_s16(int16x8_t a,int16x8_t b,int16x4_t v)62 int16x8_t test_vmlsq_lane_s16(int16x8_t a, int16x8_t b, int16x4_t v) {
63 // CHECK-LABEL: test_vmlsq_lane_s16
64 return vmlsq_lane_s16(a, b, v, 3);
65 // CHECK: mls {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[3]
66 }
67
test_vmls_lane_s32(int32x2_t a,int32x2_t b,int32x2_t v)68 int32x2_t test_vmls_lane_s32(int32x2_t a, int32x2_t b, int32x2_t v) {
69 // CHECK-LABEL: test_vmls_lane_s32
70 return vmls_lane_s32(a, b, v, 1);
71 // CHECK: mls {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
72 }
73
test_vmlsq_lane_s32(int32x4_t a,int32x4_t b,int32x2_t v)74 int32x4_t test_vmlsq_lane_s32(int32x4_t a, int32x4_t b, int32x2_t v) {
75 // CHECK-LABEL: test_vmlsq_lane_s32
76 return vmlsq_lane_s32(a, b, v, 1);
77 // CHECK: mls {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
78 }
79
test_vmls_laneq_s16(int16x4_t a,int16x4_t b,int16x8_t v)80 int16x4_t test_vmls_laneq_s16(int16x4_t a, int16x4_t b, int16x8_t v) {
81 // CHECK-LABEL: test_vmls_laneq_s16
82 return vmls_laneq_s16(a, b, v, 7);
83 // CHECK: mls {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[7]
84 }
85
test_vmlsq_laneq_s16(int16x8_t a,int16x8_t b,int16x8_t v)86 int16x8_t test_vmlsq_laneq_s16(int16x8_t a, int16x8_t b, int16x8_t v) {
87 // CHECK-LABEL: test_vmlsq_laneq_s16
88 return vmlsq_laneq_s16(a, b, v, 7);
89 // CHECK: mls {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[7]
90 }
91
test_vmls_laneq_s32(int32x2_t a,int32x2_t b,int32x4_t v)92 int32x2_t test_vmls_laneq_s32(int32x2_t a, int32x2_t b, int32x4_t v) {
93 // CHECK-LABEL: test_vmls_laneq_s32
94 return vmls_laneq_s32(a, b, v, 3);
95 // CHECK: mls {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
96 }
97
test_vmlsq_laneq_s32(int32x4_t a,int32x4_t b,int32x4_t v)98 int32x4_t test_vmlsq_laneq_s32(int32x4_t a, int32x4_t b, int32x4_t v) {
99 // CHECK-LABEL: test_vmlsq_laneq_s32
100 return vmlsq_laneq_s32(a, b, v, 3);
101 // CHECK: mls {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
102 }
103
test_vmul_lane_s16(int16x4_t a,int16x4_t v)104 int16x4_t test_vmul_lane_s16(int16x4_t a, int16x4_t v) {
105 // CHECK-LABEL: test_vmul_lane_s16
106 return vmul_lane_s16(a, v, 3);
107 // CHECK: mul {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3]
108 }
109
test_vmulq_lane_s16(int16x8_t a,int16x4_t v)110 int16x8_t test_vmulq_lane_s16(int16x8_t a, int16x4_t v) {
111 // CHECK-LABEL: test_vmulq_lane_s16
112 return vmulq_lane_s16(a, v, 3);
113 // CHECK: mul {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[3]
114 }
115
test_vmul_lane_s32(int32x2_t a,int32x2_t v)116 int32x2_t test_vmul_lane_s32(int32x2_t a, int32x2_t v) {
117 // CHECK-LABEL: test_vmul_lane_s32
118 return vmul_lane_s32(a, v, 1);
119 // CHECK: mul {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
120 }
121
test_vmulq_lane_s32(int32x4_t a,int32x2_t v)122 int32x4_t test_vmulq_lane_s32(int32x4_t a, int32x2_t v) {
123 // CHECK-LABEL: test_vmulq_lane_s32
124 return vmulq_lane_s32(a, v, 1);
125 // CHECK: mul {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
126 }
127
test_vmul_lane_u16(uint16x4_t a,uint16x4_t v)128 uint16x4_t test_vmul_lane_u16(uint16x4_t a, uint16x4_t v) {
129 // CHECK-LABEL: test_vmul_lane_u16
130 return vmul_lane_u16(a, v, 3);
131 // CHECK: mul {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3]
132 }
133
test_vmulq_lane_u16(uint16x8_t a,uint16x4_t v)134 uint16x8_t test_vmulq_lane_u16(uint16x8_t a, uint16x4_t v) {
135 // CHECK-LABEL: test_vmulq_lane_u16
136 return vmulq_lane_u16(a, v, 3);
137 // CHECK: mul {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[3]
138 }
139
test_vmul_lane_u32(uint32x2_t a,uint32x2_t v)140 uint32x2_t test_vmul_lane_u32(uint32x2_t a, uint32x2_t v) {
141 // CHECK-LABEL: test_vmul_lane_u32
142 return vmul_lane_u32(a, v, 1);
143 // CHECK: mul {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
144 }
145
test_vmulq_lane_u32(uint32x4_t a,uint32x2_t v)146 uint32x4_t test_vmulq_lane_u32(uint32x4_t a, uint32x2_t v) {
147 // CHECK-LABEL: test_vmulq_lane_u32
148 return vmulq_lane_u32(a, v, 1);
149 // CHECK: mul {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
150 }
151
test_vmul_laneq_s16(int16x4_t a,int16x8_t v)152 int16x4_t test_vmul_laneq_s16(int16x4_t a, int16x8_t v) {
153 // CHECK-LABEL: test_vmul_laneq_s16
154 return vmul_laneq_s16(a, v, 7);
155 // CHECK: mul {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[7]
156 }
157
test_vmulq_laneq_s16(int16x8_t a,int16x8_t v)158 int16x8_t test_vmulq_laneq_s16(int16x8_t a, int16x8_t v) {
159 // CHECK-LABEL: test_vmulq_laneq_s16
160 return vmulq_laneq_s16(a, v, 7);
161 // CHECK: mul {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[7]
162 }
163
test_vmul_laneq_s32(int32x2_t a,int32x4_t v)164 int32x2_t test_vmul_laneq_s32(int32x2_t a, int32x4_t v) {
165 // CHECK-LABEL: test_vmul_laneq_s32
166 return vmul_laneq_s32(a, v, 3);
167 // CHECK: mul {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
168 }
169
test_vmulq_laneq_s32(int32x4_t a,int32x4_t v)170 int32x4_t test_vmulq_laneq_s32(int32x4_t a, int32x4_t v) {
171 // CHECK-LABEL: test_vmulq_laneq_s32
172 return vmulq_laneq_s32(a, v, 3);
173 // CHECK: mul {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
174 }
175
test_vmul_laneq_u16(uint16x4_t a,uint16x8_t v)176 uint16x4_t test_vmul_laneq_u16(uint16x4_t a, uint16x8_t v) {
177 // CHECK-LABEL: test_vmul_laneq_u16
178 return vmul_laneq_u16(a, v, 7);
179 // CHECK: mul {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[7]
180 }
181
test_vmulq_laneq_u16(uint16x8_t a,uint16x8_t v)182 uint16x8_t test_vmulq_laneq_u16(uint16x8_t a, uint16x8_t v) {
183 // CHECK-LABEL: test_vmulq_laneq_u16
184 return vmulq_laneq_u16(a, v, 7);
185 // CHECK: mul {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[7]
186 }
187
test_vmul_laneq_u32(uint32x2_t a,uint32x4_t v)188 uint32x2_t test_vmul_laneq_u32(uint32x2_t a, uint32x4_t v) {
189 // CHECK-LABEL: test_vmul_laneq_u32
190 return vmul_laneq_u32(a, v, 3);
191 // CHECK: mul {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
192 }
193
test_vmulq_laneq_u32(uint32x4_t a,uint32x4_t v)194 uint32x4_t test_vmulq_laneq_u32(uint32x4_t a, uint32x4_t v) {
195 // CHECK-LABEL: test_vmulq_laneq_u32
196 return vmulq_laneq_u32(a, v, 3);
197 // CHECK: mul {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
198 }
199
test_vfma_lane_f32(float32x2_t a,float32x2_t b,float32x2_t v)200 float32x2_t test_vfma_lane_f32(float32x2_t a, float32x2_t b, float32x2_t v) {
201 // CHECK-LABEL: test_vfma_lane_f32
202 return vfma_lane_f32(a, b, v, 1);
203 // CHECK: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
204 }
205
test_vfmaq_lane_f32(float32x4_t a,float32x4_t b,float32x2_t v)206 float32x4_t test_vfmaq_lane_f32(float32x4_t a, float32x4_t b, float32x2_t v) {
207 // CHECK-LABEL: test_vfmaq_lane_f32
208 return vfmaq_lane_f32(a, b, v, 1);
209 // CHECK: fmla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
210 }
211
test_vfma_laneq_f32(float32x2_t a,float32x2_t b,float32x4_t v)212 float32x2_t test_vfma_laneq_f32(float32x2_t a, float32x2_t b, float32x4_t v) {
213 // CHECK-LABEL: test_vfma_laneq_f32
214 return vfma_laneq_f32(a, b, v, 3);
215 // CHECK: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
216 }
217
test_vfmaq_laneq_f32(float32x4_t a,float32x4_t b,float32x4_t v)218 float32x4_t test_vfmaq_laneq_f32(float32x4_t a, float32x4_t b, float32x4_t v) {
219 // CHECK-LABEL: test_vfmaq_laneq_f32
220 return vfmaq_laneq_f32(a, b, v, 3);
221 // CHECK: fmla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
222 }
223
test_vfms_lane_f32(float32x2_t a,float32x2_t b,float32x2_t v)224 float32x2_t test_vfms_lane_f32(float32x2_t a, float32x2_t b, float32x2_t v) {
225 // CHECK-LABEL: test_vfms_lane_f32
226 return vfms_lane_f32(a, b, v, 1);
227 // CHECK: fmls {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
228 }
229
test_vfmsq_lane_f32(float32x4_t a,float32x4_t b,float32x2_t v)230 float32x4_t test_vfmsq_lane_f32(float32x4_t a, float32x4_t b, float32x2_t v) {
231 // CHECK-LABEL: test_vfmsq_lane_f32
232 return vfmsq_lane_f32(a, b, v, 1);
233 // CHECK: fmls {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
234 }
235
test_vfms_laneq_f32(float32x2_t a,float32x2_t b,float32x4_t v)236 float32x2_t test_vfms_laneq_f32(float32x2_t a, float32x2_t b, float32x4_t v) {
237 // CHECK-LABEL: test_vfms_laneq_f32
238 return vfms_laneq_f32(a, b, v, 3);
239 // CHECK: fmls {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
240 }
241
test_vfmsq_laneq_f32(float32x4_t a,float32x4_t b,float32x4_t v)242 float32x4_t test_vfmsq_laneq_f32(float32x4_t a, float32x4_t b, float32x4_t v) {
243 // CHECK-LABEL: test_vfmsq_laneq_f32
244 return vfmsq_laneq_f32(a, b, v, 3);
245 // CHECK: fmls {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
246 }
247
test_vfmaq_lane_f64(float64x2_t a,float64x2_t b,float64x1_t v)248 float64x2_t test_vfmaq_lane_f64(float64x2_t a, float64x2_t b, float64x1_t v) {
249 // CHECK-LABEL: test_vfmaq_lane_f64
250 return vfmaq_lane_f64(a, b, v, 0);
251 // CHECK: fmla {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.d[0]
252 }
253
test_vfmaq_laneq_f64(float64x2_t a,float64x2_t b,float64x2_t v)254 float64x2_t test_vfmaq_laneq_f64(float64x2_t a, float64x2_t b, float64x2_t v) {
255 // CHECK-LABEL: test_vfmaq_laneq_f64
256 return vfmaq_laneq_f64(a, b, v, 1);
257 // CHECK: fmla {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.d[1]
258 }
259
test_vfmsq_lane_f64(float64x2_t a,float64x2_t b,float64x1_t v)260 float64x2_t test_vfmsq_lane_f64(float64x2_t a, float64x2_t b, float64x1_t v) {
261 // CHECK-LABEL: test_vfmsq_lane_f64
262 return vfmsq_lane_f64(a, b, v, 0);
263 // CHECK: fmls {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.d[0]
264 }
265
test_vfmsq_laneq_f64(float64x2_t a,float64x2_t b,float64x2_t v)266 float64x2_t test_vfmsq_laneq_f64(float64x2_t a, float64x2_t b, float64x2_t v) {
267 // CHECK-LABEL: test_vfmsq_laneq_f64
268 return vfmsq_laneq_f64(a, b, v, 1);
269 // CHECK: fmls {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.d[1]
270 }
271
test_vfmas_laneq_f32(float32_t a,float32_t b,float32x4_t v)272 float32_t test_vfmas_laneq_f32(float32_t a, float32_t b, float32x4_t v) {
273 // CHECK-LABEL: test_vfmas_laneq_f32
274 return vfmas_laneq_f32(a, b, v, 3);
275 // CHECK: fmla {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[3]
276 }
277
test_vfmsd_lane_f64(float64_t a,float64_t b,float64x1_t v)278 float64_t test_vfmsd_lane_f64(float64_t a, float64_t b, float64x1_t v) {
279 // CHECK-LABEL: test_vfmsd_lane_f64
280 return vfmsd_lane_f64(a, b, v, 0);
281 // CHECK: {{fmls d[0-9]+, d[0-9]+, v[0-9]+\.d\[0\]|fmsub d[0-9]+, d[0-9]+, d[0-9]+}}
282 }
283
test_vfmss_laneq_f32(float32_t a,float32_t b,float32x4_t v)284 float32_t test_vfmss_laneq_f32(float32_t a, float32_t b, float32x4_t v) {
285 // CHECK-LABEL: test_vfmss_laneq_f32
286 return vfmss_laneq_f32(a, b, v, 3);
287 // CHECK: fmls {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[3]
288 }
289
test_vfmsd_laneq_f64(float64_t a,float64_t b,float64x2_t v)290 float64_t test_vfmsd_laneq_f64(float64_t a, float64_t b, float64x2_t v) {
291 // CHECK-LABEL: test_vfmsd_laneq_f64
292 return vfmsd_laneq_f64(a, b, v, 1);
293 // CHECK: fmls {{d[0-9]+}}, {{d[0-9]+}}, {{v[0-9]+}}.d[1]
294 }
295
test_vmlal_lane_s16(int32x4_t a,int16x4_t b,int16x4_t v)296 int32x4_t test_vmlal_lane_s16(int32x4_t a, int16x4_t b, int16x4_t v) {
297 // CHECK-LABEL: test_vmlal_lane_s16
298 return vmlal_lane_s16(a, b, v, 3);
299 // CHECK: smlal {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3]
300 }
301
test_vmlal_lane_s32(int64x2_t a,int32x2_t b,int32x2_t v)302 int64x2_t test_vmlal_lane_s32(int64x2_t a, int32x2_t b, int32x2_t v) {
303 // CHECK-LABEL: test_vmlal_lane_s32
304 return vmlal_lane_s32(a, b, v, 1);
305 // CHECK: smlal {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
306 }
307
test_vmlal_laneq_s16(int32x4_t a,int16x4_t b,int16x8_t v)308 int32x4_t test_vmlal_laneq_s16(int32x4_t a, int16x4_t b, int16x8_t v) {
309 // CHECK-LABEL: test_vmlal_laneq_s16
310 return vmlal_laneq_s16(a, b, v, 7);
311 // CHECK: smlal {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[7]
312 }
313
test_vmlal_laneq_s32(int64x2_t a,int32x2_t b,int32x4_t v)314 int64x2_t test_vmlal_laneq_s32(int64x2_t a, int32x2_t b, int32x4_t v) {
315 // CHECK-LABEL: test_vmlal_laneq_s32
316 return vmlal_laneq_s32(a, b, v, 3);
317 // CHECK: smlal {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
318 }
319
test_vmlal_high_lane_s16(int32x4_t a,int16x8_t b,int16x4_t v)320 int32x4_t test_vmlal_high_lane_s16(int32x4_t a, int16x8_t b, int16x4_t v) {
321 // CHECK-LABEL: test_vmlal_high_lane_s16
322 return vmlal_high_lane_s16(a, b, v, 3);
323 // CHECK: smlal2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[3]
324 }
325
test_vmlal_high_lane_s32(int64x2_t a,int32x4_t b,int32x2_t v)326 int64x2_t test_vmlal_high_lane_s32(int64x2_t a, int32x4_t b, int32x2_t v) {
327 // CHECK-LABEL: test_vmlal_high_lane_s32
328 return vmlal_high_lane_s32(a, b, v, 1);
329 // CHECK: smlal2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
330 }
331
test_vmlal_high_laneq_s16(int32x4_t a,int16x8_t b,int16x8_t v)332 int32x4_t test_vmlal_high_laneq_s16(int32x4_t a, int16x8_t b, int16x8_t v) {
333 // CHECK-LABEL: test_vmlal_high_laneq_s16
334 return vmlal_high_laneq_s16(a, b, v, 7);
335 // CHECK: smlal2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[7]
336 }
337
test_vmlal_high_laneq_s32(int64x2_t a,int32x4_t b,int32x4_t v)338 int64x2_t test_vmlal_high_laneq_s32(int64x2_t a, int32x4_t b, int32x4_t v) {
339 // CHECK-LABEL: test_vmlal_high_laneq_s32
340 return vmlal_high_laneq_s32(a, b, v, 3);
341 // CHECK: smlal2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
342 }
343
test_vmlsl_lane_s16(int32x4_t a,int16x4_t b,int16x4_t v)344 int32x4_t test_vmlsl_lane_s16(int32x4_t a, int16x4_t b, int16x4_t v) {
345 // CHECK-LABEL: test_vmlsl_lane_s16
346 return vmlsl_lane_s16(a, b, v, 3);
347 // CHECK: smlsl {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3]
348 }
349
test_vmlsl_lane_s32(int64x2_t a,int32x2_t b,int32x2_t v)350 int64x2_t test_vmlsl_lane_s32(int64x2_t a, int32x2_t b, int32x2_t v) {
351 // CHECK-LABEL: test_vmlsl_lane_s32
352 return vmlsl_lane_s32(a, b, v, 1);
353 // CHECK: smlsl {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
354 }
355
test_vmlsl_laneq_s16(int32x4_t a,int16x4_t b,int16x8_t v)356 int32x4_t test_vmlsl_laneq_s16(int32x4_t a, int16x4_t b, int16x8_t v) {
357 // CHECK-LABEL: test_vmlsl_laneq_s16
358 return vmlsl_laneq_s16(a, b, v, 7);
359 // CHECK: smlsl {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[7]
360 }
361
test_vmlsl_laneq_s32(int64x2_t a,int32x2_t b,int32x4_t v)362 int64x2_t test_vmlsl_laneq_s32(int64x2_t a, int32x2_t b, int32x4_t v) {
363 // CHECK-LABEL: test_vmlsl_laneq_s32
364 return vmlsl_laneq_s32(a, b, v, 3);
365 // CHECK: smlsl {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
366 }
367
test_vmlsl_high_lane_s16(int32x4_t a,int16x8_t b,int16x4_t v)368 int32x4_t test_vmlsl_high_lane_s16(int32x4_t a, int16x8_t b, int16x4_t v) {
369 // CHECK-LABEL: test_vmlsl_high_lane_s16
370 return vmlsl_high_lane_s16(a, b, v, 3);
371 // CHECK: smlsl2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[3]
372 }
373
test_vmlsl_high_lane_s32(int64x2_t a,int32x4_t b,int32x2_t v)374 int64x2_t test_vmlsl_high_lane_s32(int64x2_t a, int32x4_t b, int32x2_t v) {
375 // CHECK-LABEL: test_vmlsl_high_lane_s32
376 return vmlsl_high_lane_s32(a, b, v, 1);
377 // CHECK: smlsl2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
378 }
379
test_vmlsl_high_laneq_s16(int32x4_t a,int16x8_t b,int16x8_t v)380 int32x4_t test_vmlsl_high_laneq_s16(int32x4_t a, int16x8_t b, int16x8_t v) {
381 // CHECK-LABEL: test_vmlsl_high_laneq_s16
382 return vmlsl_high_laneq_s16(a, b, v, 7);
383 // CHECK: smlsl2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[7]
384 }
385
test_vmlsl_high_laneq_s32(int64x2_t a,int32x4_t b,int32x4_t v)386 int64x2_t test_vmlsl_high_laneq_s32(int64x2_t a, int32x4_t b, int32x4_t v) {
387 // CHECK-LABEL: test_vmlsl_high_laneq_s32
388 return vmlsl_high_laneq_s32(a, b, v, 3);
389 // CHECK: smlsl2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
390 }
391
test_vmlal_lane_u16(int32x4_t a,int16x4_t b,int16x4_t v)392 int32x4_t test_vmlal_lane_u16(int32x4_t a, int16x4_t b, int16x4_t v) {
393 // CHECK-LABEL: test_vmlal_lane_u16
394 return vmlal_lane_u16(a, b, v, 3);
395 // CHECK: umlal {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3]
396 }
397
test_vmlal_lane_u32(int64x2_t a,int32x2_t b,int32x2_t v)398 int64x2_t test_vmlal_lane_u32(int64x2_t a, int32x2_t b, int32x2_t v) {
399 // CHECK-LABEL: test_vmlal_lane_u32
400 return vmlal_lane_u32(a, b, v, 1);
401 // CHECK: umlal {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
402 }
403
test_vmlal_laneq_u16(int32x4_t a,int16x4_t b,int16x8_t v)404 int32x4_t test_vmlal_laneq_u16(int32x4_t a, int16x4_t b, int16x8_t v) {
405 // CHECK-LABEL: test_vmlal_laneq_u16
406 return vmlal_laneq_u16(a, b, v, 7);
407 // CHECK: umlal {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[7]
408 }
409
test_vmlal_laneq_u32(int64x2_t a,int32x2_t b,int32x4_t v)410 int64x2_t test_vmlal_laneq_u32(int64x2_t a, int32x2_t b, int32x4_t v) {
411 // CHECK-LABEL: test_vmlal_laneq_u32
412 return vmlal_laneq_u32(a, b, v, 3);
413 // CHECK: umlal {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
414 }
415
test_vmlal_high_lane_u16(int32x4_t a,int16x8_t b,int16x4_t v)416 int32x4_t test_vmlal_high_lane_u16(int32x4_t a, int16x8_t b, int16x4_t v) {
417 // CHECK-LABEL: test_vmlal_high_lane_u16
418 return vmlal_high_lane_u16(a, b, v, 3);
419 // CHECK: umlal2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[3]
420 }
421
test_vmlal_high_lane_u32(int64x2_t a,int32x4_t b,int32x2_t v)422 int64x2_t test_vmlal_high_lane_u32(int64x2_t a, int32x4_t b, int32x2_t v) {
423 // CHECK-LABEL: test_vmlal_high_lane_u32
424 return vmlal_high_lane_u32(a, b, v, 1);
425 // CHECK: umlal2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
426 }
427
test_vmlal_high_laneq_u16(int32x4_t a,int16x8_t b,int16x8_t v)428 int32x4_t test_vmlal_high_laneq_u16(int32x4_t a, int16x8_t b, int16x8_t v) {
429 // CHECK-LABEL: test_vmlal_high_laneq_u16
430 return vmlal_high_laneq_u16(a, b, v, 7);
431 // CHECK: umlal2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[7]
432 }
433
test_vmlal_high_laneq_u32(int64x2_t a,int32x4_t b,int32x4_t v)434 int64x2_t test_vmlal_high_laneq_u32(int64x2_t a, int32x4_t b, int32x4_t v) {
435 // CHECK-LABEL: test_vmlal_high_laneq_u32
436 return vmlal_high_laneq_u32(a, b, v, 3);
437 // CHECK: umlal2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
438 }
439
test_vmlsl_lane_u16(int32x4_t a,int16x4_t b,int16x4_t v)440 int32x4_t test_vmlsl_lane_u16(int32x4_t a, int16x4_t b, int16x4_t v) {
441 // CHECK-LABEL: test_vmlsl_lane_u16
442 return vmlsl_lane_u16(a, b, v, 3);
443 // CHECK: umlsl {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3]
444 }
445
test_vmlsl_lane_u32(int64x2_t a,int32x2_t b,int32x2_t v)446 int64x2_t test_vmlsl_lane_u32(int64x2_t a, int32x2_t b, int32x2_t v) {
447 // CHECK-LABEL: test_vmlsl_lane_u32
448 return vmlsl_lane_u32(a, b, v, 1);
449 // CHECK: umlsl {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
450 }
451
test_vmlsl_laneq_u16(int32x4_t a,int16x4_t b,int16x8_t v)452 int32x4_t test_vmlsl_laneq_u16(int32x4_t a, int16x4_t b, int16x8_t v) {
453 // CHECK-LABEL: test_vmlsl_laneq_u16
454 return vmlsl_laneq_u16(a, b, v, 7);
455 // CHECK: umlsl {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[7]
456 }
457
test_vmlsl_laneq_u32(int64x2_t a,int32x2_t b,int32x4_t v)458 int64x2_t test_vmlsl_laneq_u32(int64x2_t a, int32x2_t b, int32x4_t v) {
459 // CHECK-LABEL: test_vmlsl_laneq_u32
460 return vmlsl_laneq_u32(a, b, v, 3);
461 // CHECK: umlsl {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
462 }
463
test_vmlsl_high_lane_u16(int32x4_t a,int16x8_t b,int16x4_t v)464 int32x4_t test_vmlsl_high_lane_u16(int32x4_t a, int16x8_t b, int16x4_t v) {
465 // CHECK-LABEL: test_vmlsl_high_lane_u16
466 return vmlsl_high_lane_u16(a, b, v, 3);
467 // CHECK: umlsl2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[3]
468 }
469
test_vmlsl_high_lane_u32(int64x2_t a,int32x4_t b,int32x2_t v)470 int64x2_t test_vmlsl_high_lane_u32(int64x2_t a, int32x4_t b, int32x2_t v) {
471 // CHECK-LABEL: test_vmlsl_high_lane_u32
472 return vmlsl_high_lane_u32(a, b, v, 1);
473 // CHECK: umlsl2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
474 }
475
test_vmlsl_high_laneq_u16(int32x4_t a,int16x8_t b,int16x8_t v)476 int32x4_t test_vmlsl_high_laneq_u16(int32x4_t a, int16x8_t b, int16x8_t v) {
477 // CHECK-LABEL: test_vmlsl_high_laneq_u16
478 return vmlsl_high_laneq_u16(a, b, v, 7);
479 // CHECK: umlsl2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[7]
480 }
481
test_vmlsl_high_laneq_u32(int64x2_t a,int32x4_t b,int32x4_t v)482 int64x2_t test_vmlsl_high_laneq_u32(int64x2_t a, int32x4_t b, int32x4_t v) {
483 // CHECK-LABEL: test_vmlsl_high_laneq_u32
484 return vmlsl_high_laneq_u32(a, b, v, 3);
485 // CHECK: umlsl2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
486 }
487
test_vmull_lane_s16(int16x4_t a,int16x4_t v)488 int32x4_t test_vmull_lane_s16(int16x4_t a, int16x4_t v) {
489 // CHECK-LABEL: test_vmull_lane_s16
490 return vmull_lane_s16(a, v, 3);
491 // CHECK: smull {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3]
492 }
493
test_vmull_lane_s32(int32x2_t a,int32x2_t v)494 int64x2_t test_vmull_lane_s32(int32x2_t a, int32x2_t v) {
495 // CHECK-LABEL: test_vmull_lane_s32
496 return vmull_lane_s32(a, v, 1);
497 // CHECK: smull {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
498 }
499
test_vmull_lane_u16(uint16x4_t a,uint16x4_t v)500 uint32x4_t test_vmull_lane_u16(uint16x4_t a, uint16x4_t v) {
501 // CHECK-LABEL: test_vmull_lane_u16
502 return vmull_lane_u16(a, v, 3);
503 // CHECK: umull {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3]
504 }
505
test_vmull_lane_u32(uint32x2_t a,uint32x2_t v)506 uint64x2_t test_vmull_lane_u32(uint32x2_t a, uint32x2_t v) {
507 // CHECK-LABEL: test_vmull_lane_u32
508 return vmull_lane_u32(a, v, 1);
509 // CHECK: umull {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
510 }
511
test_vmull_high_lane_s16(int16x8_t a,int16x4_t v)512 int32x4_t test_vmull_high_lane_s16(int16x8_t a, int16x4_t v) {
513 // CHECK-LABEL: test_vmull_high_lane_s16
514 return vmull_high_lane_s16(a, v, 3);
515 // CHECK: smull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[3]
516 }
517
test_vmull_high_lane_s32(int32x4_t a,int32x2_t v)518 int64x2_t test_vmull_high_lane_s32(int32x4_t a, int32x2_t v) {
519 // CHECK-LABEL: test_vmull_high_lane_s32
520 return vmull_high_lane_s32(a, v, 1);
521 // CHECK: smull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
522 }
523
test_vmull_high_lane_u16(uint16x8_t a,uint16x4_t v)524 uint32x4_t test_vmull_high_lane_u16(uint16x8_t a, uint16x4_t v) {
525 // CHECK-LABEL: test_vmull_high_lane_u16
526 return vmull_high_lane_u16(a, v, 3);
527 // CHECK: umull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[3]
528 }
529
test_vmull_high_lane_u32(uint32x4_t a,uint32x2_t v)530 uint64x2_t test_vmull_high_lane_u32(uint32x4_t a, uint32x2_t v) {
531 // CHECK-LABEL: test_vmull_high_lane_u32
532 return vmull_high_lane_u32(a, v, 1);
533 // CHECK: umull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
534 }
535
test_vmull_laneq_s16(int16x4_t a,int16x8_t v)536 int32x4_t test_vmull_laneq_s16(int16x4_t a, int16x8_t v) {
537 // CHECK-LABEL: test_vmull_laneq_s16
538 return vmull_laneq_s16(a, v, 7);
539 // CHECK: smull {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[7]
540 }
541
test_vmull_laneq_s32(int32x2_t a,int32x4_t v)542 int64x2_t test_vmull_laneq_s32(int32x2_t a, int32x4_t v) {
543 // CHECK-LABEL: test_vmull_laneq_s32
544 return vmull_laneq_s32(a, v, 3);
545 // CHECK: smull {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
546 }
547
test_vmull_laneq_u16(uint16x4_t a,uint16x8_t v)548 uint32x4_t test_vmull_laneq_u16(uint16x4_t a, uint16x8_t v) {
549 // CHECK-LABEL: test_vmull_laneq_u16
550 return vmull_laneq_u16(a, v, 7);
551 // CHECK: umull {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[7]
552 }
553
test_vmull_laneq_u32(uint32x2_t a,uint32x4_t v)554 uint64x2_t test_vmull_laneq_u32(uint32x2_t a, uint32x4_t v) {
555 // CHECK-LABEL: test_vmull_laneq_u32
556 return vmull_laneq_u32(a, v, 3);
557 // CHECK: umull {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
558 }
559
test_vmull_high_laneq_s16(int16x8_t a,int16x8_t v)560 int32x4_t test_vmull_high_laneq_s16(int16x8_t a, int16x8_t v) {
561 // CHECK-LABEL: test_vmull_high_laneq_s16
562 return vmull_high_laneq_s16(a, v, 7);
563 // CHECK: smull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[7]
564 }
565
test_vmull_high_laneq_s32(int32x4_t a,int32x4_t v)566 int64x2_t test_vmull_high_laneq_s32(int32x4_t a, int32x4_t v) {
567 // CHECK-LABEL: test_vmull_high_laneq_s32
568 return vmull_high_laneq_s32(a, v, 3);
569 // CHECK: smull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
570 }
571
test_vmull_high_laneq_u16(uint16x8_t a,uint16x8_t v)572 uint32x4_t test_vmull_high_laneq_u16(uint16x8_t a, uint16x8_t v) {
573 // CHECK-LABEL: test_vmull_high_laneq_u16
574 return vmull_high_laneq_u16(a, v, 7);
575 // CHECK: umull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[7]
576 }
577
test_vmull_high_laneq_u32(uint32x4_t a,uint32x4_t v)578 uint64x2_t test_vmull_high_laneq_u32(uint32x4_t a, uint32x4_t v) {
579 // CHECK-LABEL: test_vmull_high_laneq_u32
580 return vmull_high_laneq_u32(a, v, 3);
581 // CHECK: umull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
582 }
583
test_vqdmlal_lane_s16(int32x4_t a,int16x4_t b,int16x4_t v)584 int32x4_t test_vqdmlal_lane_s16(int32x4_t a, int16x4_t b, int16x4_t v) {
585 // CHECK-LABEL: test_vqdmlal_lane_s16
586 return vqdmlal_lane_s16(a, b, v, 3);
587 // CHECK: sqdmlal {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3]
588 }
589
test_vqdmlal_lane_s32(int64x2_t a,int32x2_t b,int32x2_t v)590 int64x2_t test_vqdmlal_lane_s32(int64x2_t a, int32x2_t b, int32x2_t v) {
591 // CHECK-LABEL: test_vqdmlal_lane_s32
592 return vqdmlal_lane_s32(a, b, v, 1);
593 // CHECK: sqdmlal {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
594 }
595
test_vqdmlal_high_lane_s16(int32x4_t a,int16x8_t b,int16x4_t v)596 int32x4_t test_vqdmlal_high_lane_s16(int32x4_t a, int16x8_t b, int16x4_t v) {
597 // CHECK-LABEL: test_vqdmlal_high_lane_s16
598 return vqdmlal_high_lane_s16(a, b, v, 3);
599 // CHECK: sqdmlal2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[3]
600 }
601
test_vqdmlal_high_lane_s32(int64x2_t a,int32x4_t b,int32x2_t v)602 int64x2_t test_vqdmlal_high_lane_s32(int64x2_t a, int32x4_t b, int32x2_t v) {
603 // CHECK-LABEL: test_vqdmlal_high_lane_s32
604 return vqdmlal_high_lane_s32(a, b, v, 1);
605 // CHECK: sqdmlal2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
606 }
607
test_vqdmlsl_lane_s16(int32x4_t a,int16x4_t b,int16x4_t v)608 int32x4_t test_vqdmlsl_lane_s16(int32x4_t a, int16x4_t b, int16x4_t v) {
609 // CHECK-LABEL: test_vqdmlsl_lane_s16
610 return vqdmlsl_lane_s16(a, b, v, 3);
611 // CHECK: sqdmlsl {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3]
612 }
613
test_vqdmlsl_lane_s32(int64x2_t a,int32x2_t b,int32x2_t v)614 int64x2_t test_vqdmlsl_lane_s32(int64x2_t a, int32x2_t b, int32x2_t v) {
615 // CHECK-LABEL: test_vqdmlsl_lane_s32
616 return vqdmlsl_lane_s32(a, b, v, 1);
617 // CHECK: sqdmlsl {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
618 }
619
test_vqdmlsl_high_lane_s16(int32x4_t a,int16x8_t b,int16x4_t v)620 int32x4_t test_vqdmlsl_high_lane_s16(int32x4_t a, int16x8_t b, int16x4_t v) {
621 // CHECK-LABEL: test_vqdmlsl_high_lane_s16
622 return vqdmlsl_high_lane_s16(a, b, v, 3);
623 // CHECK: sqdmlsl2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[3]
624 }
625
test_vqdmlsl_high_lane_s32(int64x2_t a,int32x4_t b,int32x2_t v)626 int64x2_t test_vqdmlsl_high_lane_s32(int64x2_t a, int32x4_t b, int32x2_t v) {
627 // CHECK-LABEL: test_vqdmlsl_high_lane_s32
628 return vqdmlsl_high_lane_s32(a, b, v, 1);
629 // CHECK: sqdmlsl2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
630 }
631
test_vqdmull_lane_s16(int16x4_t a,int16x4_t v)632 int32x4_t test_vqdmull_lane_s16(int16x4_t a, int16x4_t v) {
633 // CHECK-LABEL: test_vqdmull_lane_s16
634 return vqdmull_lane_s16(a, v, 3);
635 // CHECK: sqdmull {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3]
636 }
637
test_vqdmull_lane_s32(int32x2_t a,int32x2_t v)638 int64x2_t test_vqdmull_lane_s32(int32x2_t a, int32x2_t v) {
639 // CHECK-LABEL: test_vqdmull_lane_s32
640 return vqdmull_lane_s32(a, v, 1);
641 // CHECK: sqdmull {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
642 }
643
test_vqdmull_laneq_s16(int16x4_t a,int16x8_t v)644 int32x4_t test_vqdmull_laneq_s16(int16x4_t a, int16x8_t v) {
645 // CHECK-LABEL: test_vqdmull_laneq_s16
646 return vqdmull_laneq_s16(a, v, 3);
647 // CHECK: sqdmull {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3]
648 }
649
test_vqdmull_laneq_s32(int32x2_t a,int32x4_t v)650 int64x2_t test_vqdmull_laneq_s32(int32x2_t a, int32x4_t v) {
651 // CHECK-LABEL: test_vqdmull_laneq_s32
652 return vqdmull_laneq_s32(a, v, 3);
653 // CHECK: sqdmull {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
654 }
655
test_vqdmull_high_lane_s16(int16x8_t a,int16x4_t v)656 int32x4_t test_vqdmull_high_lane_s16(int16x8_t a, int16x4_t v) {
657 // CHECK-LABEL: test_vqdmull_high_lane_s16
658 return vqdmull_high_lane_s16(a, v, 3);
659 // CHECK: sqdmull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[3]
660 }
661
test_vqdmull_high_lane_s32(int32x4_t a,int32x2_t v)662 int64x2_t test_vqdmull_high_lane_s32(int32x4_t a, int32x2_t v) {
663 // CHECK-LABEL: test_vqdmull_high_lane_s32
664 return vqdmull_high_lane_s32(a, v, 1);
665 // CHECK: sqdmull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
666 }
667
test_vqdmull_high_laneq_s16(int16x8_t a,int16x8_t v)668 int32x4_t test_vqdmull_high_laneq_s16(int16x8_t a, int16x8_t v) {
669 // CHECK-LABEL: test_vqdmull_high_laneq_s16
670 return vqdmull_high_laneq_s16(a, v, 7);
671 // CHECK: sqdmull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[7]
672 }
673
test_vqdmull_high_laneq_s32(int32x4_t a,int32x4_t v)674 int64x2_t test_vqdmull_high_laneq_s32(int32x4_t a, int32x4_t v) {
675 // CHECK-LABEL: test_vqdmull_high_laneq_s32
676 return vqdmull_high_laneq_s32(a, v, 3);
677 // CHECK: sqdmull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
678 }
679
test_vqdmulh_lane_s16(int16x4_t a,int16x4_t v)680 int16x4_t test_vqdmulh_lane_s16(int16x4_t a, int16x4_t v) {
681 // CHECK-LABEL: test_vqdmulh_lane_s16
682 return vqdmulh_lane_s16(a, v, 3);
683 // CHECK: sqdmulh {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3]
684 }
685
test_vqdmulhq_lane_s16(int16x8_t a,int16x4_t v)686 int16x8_t test_vqdmulhq_lane_s16(int16x8_t a, int16x4_t v) {
687 // CHECK-LABEL: test_vqdmulhq_lane_s16
688 return vqdmulhq_lane_s16(a, v, 3);
689 // CHECK: sqdmulh {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[3]
690 }
691
test_vqdmulh_lane_s32(int32x2_t a,int32x2_t v)692 int32x2_t test_vqdmulh_lane_s32(int32x2_t a, int32x2_t v) {
693 // CHECK-LABEL: test_vqdmulh_lane_s32
694 return vqdmulh_lane_s32(a, v, 1);
695 // CHECK: sqdmulh {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
696 }
697
test_vqdmulhq_lane_s32(int32x4_t a,int32x2_t v)698 int32x4_t test_vqdmulhq_lane_s32(int32x4_t a, int32x2_t v) {
699 // CHECK-LABEL: test_vqdmulhq_lane_s32
700 return vqdmulhq_lane_s32(a, v, 1);
701 // CHECK: sqdmulh {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
702 }
703
test_vqrdmulh_lane_s16(int16x4_t a,int16x4_t v)704 int16x4_t test_vqrdmulh_lane_s16(int16x4_t a, int16x4_t v) {
705 // CHECK-LABEL: test_vqrdmulh_lane_s16
706 return vqrdmulh_lane_s16(a, v, 3);
707 // CHECK: sqrdmulh {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3]
708 }
709
test_vqrdmulhq_lane_s16(int16x8_t a,int16x4_t v)710 int16x8_t test_vqrdmulhq_lane_s16(int16x8_t a, int16x4_t v) {
711 // CHECK-LABEL: test_vqrdmulhq_lane_s16
712 return vqrdmulhq_lane_s16(a, v, 3);
713 // CHECK: sqrdmulh {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[3]
714 }
715
test_vqrdmulh_lane_s32(int32x2_t a,int32x2_t v)716 int32x2_t test_vqrdmulh_lane_s32(int32x2_t a, int32x2_t v) {
717 // CHECK-LABEL: test_vqrdmulh_lane_s32
718 return vqrdmulh_lane_s32(a, v, 1);
719 // CHECK: sqrdmulh {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
720 }
721
test_vqrdmulhq_lane_s32(int32x4_t a,int32x2_t v)722 int32x4_t test_vqrdmulhq_lane_s32(int32x4_t a, int32x2_t v) {
723 // CHECK-LABEL: test_vqrdmulhq_lane_s32
724 return vqrdmulhq_lane_s32(a, v, 1);
725 // CHECK: sqrdmulh {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
726 }
727
test_vmul_lane_f32(float32x2_t a,float32x2_t v)728 float32x2_t test_vmul_lane_f32(float32x2_t a, float32x2_t v) {
729 // CHECK-LABEL: test_vmul_lane_f32
730 return vmul_lane_f32(a, v, 1);
731 // CHECK: fmul {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
732 }
733
734
test_vmul_lane_f64(float64x1_t a,float64x1_t v)735 float64x1_t test_vmul_lane_f64(float64x1_t a, float64x1_t v) {
736 // CHECK-LABEL: test_vmul_lane_f64
737 return vmul_lane_f64(a, v, 0);
738 // CHECK: fmul {{d[0-9]+}}, {{d[0-9]+}}, {{v[0-9]+\.d\[0\]|d[0-9]+}}
739 }
740
741
test_vmulq_lane_f32(float32x4_t a,float32x2_t v)742 float32x4_t test_vmulq_lane_f32(float32x4_t a, float32x2_t v) {
743 // CHECK-LABEL: test_vmulq_lane_f32
744 return vmulq_lane_f32(a, v, 1);
745 // CHECK: fmul {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
746 }
747
test_vmulq_lane_f64(float64x2_t a,float64x1_t v)748 float64x2_t test_vmulq_lane_f64(float64x2_t a, float64x1_t v) {
749 // CHECK-LABEL: test_vmulq_lane_f64
750 return vmulq_lane_f64(a, v, 0);
751 // CHECK: fmul {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.d[0]
752 }
753
test_vmul_laneq_f32(float32x2_t a,float32x4_t v)754 float32x2_t test_vmul_laneq_f32(float32x2_t a, float32x4_t v) {
755 // CHECK-LABEL: test_vmul_laneq_f32
756 return vmul_laneq_f32(a, v, 3);
757 // CHECK: fmul {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
758 }
759
test_vmul_laneq_f64(float64x1_t a,float64x2_t v)760 float64x1_t test_vmul_laneq_f64(float64x1_t a, float64x2_t v) {
761 // CHECK-LABEL: test_vmul_laneq_f64
762 return vmul_laneq_f64(a, v, 1);
763 // CHECK: fmul {{d[0-9]+}}, {{d[0-9]+}}, {{v[0-9]+}}.d[1]
764 }
765
766
test_vmulq_laneq_f32(float32x4_t a,float32x4_t v)767 float32x4_t test_vmulq_laneq_f32(float32x4_t a, float32x4_t v) {
768 // CHECK-LABEL: test_vmulq_laneq_f32
769 return vmulq_laneq_f32(a, v, 3);
770 // CHECK: fmul {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
771 }
772
test_vmulq_laneq_f64(float64x2_t a,float64x2_t v)773 float64x2_t test_vmulq_laneq_f64(float64x2_t a, float64x2_t v) {
774 // CHECK-LABEL: test_vmulq_laneq_f64
775 return vmulq_laneq_f64(a, v, 1);
776 // CHECK: fmul {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.d[1]
777 }
778
test_vmulx_lane_f32(float32x2_t a,float32x2_t v)779 float32x2_t test_vmulx_lane_f32(float32x2_t a, float32x2_t v) {
780 // CHECK-LABEL: test_vmulx_lane_f32
781 return vmulx_lane_f32(a, v, 1);
782 // CHECK: fmulx {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
783 }
784
test_vmulxq_lane_f32(float32x4_t a,float32x2_t v)785 float32x4_t test_vmulxq_lane_f32(float32x4_t a, float32x2_t v) {
786 // CHECK-LABEL: test_vmulxq_lane_f32
787 return vmulxq_lane_f32(a, v, 1);
788 // CHECK: fmulx {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
789 }
790
test_vmulxq_lane_f64(float64x2_t a,float64x1_t v)791 float64x2_t test_vmulxq_lane_f64(float64x2_t a, float64x1_t v) {
792 // CHECK-LABEL: test_vmulxq_lane_f64
793 return vmulxq_lane_f64(a, v, 0);
794 // CHECK: fmulx {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.d[0]
795 }
796
test_vmulx_laneq_f32(float32x2_t a,float32x4_t v)797 float32x2_t test_vmulx_laneq_f32(float32x2_t a, float32x4_t v) {
798 // CHECK-LABEL: test_vmulx_laneq_f32
799 return vmulx_laneq_f32(a, v, 3);
800 // CHECK: fmulx {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
801 }
802
test_vmulxq_laneq_f32(float32x4_t a,float32x4_t v)803 float32x4_t test_vmulxq_laneq_f32(float32x4_t a, float32x4_t v) {
804 // CHECK-LABEL: test_vmulxq_laneq_f32
805 return vmulxq_laneq_f32(a, v, 3);
806 // CHECK: fmulx {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
807 }
808
test_vmulxq_laneq_f64(float64x2_t a,float64x2_t v)809 float64x2_t test_vmulxq_laneq_f64(float64x2_t a, float64x2_t v) {
810 // CHECK-LABEL: test_vmulxq_laneq_f64
811 return vmulxq_laneq_f64(a, v, 1);
812 // CHECK: fmulx {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.d[1]
813 }
814
test_vmla_lane_s16_0(int16x4_t a,int16x4_t b,int16x4_t v)815 int16x4_t test_vmla_lane_s16_0(int16x4_t a, int16x4_t b, int16x4_t v) {
816 // CHECK-LABEL: test_vmla_lane_s16_0
817 return vmla_lane_s16(a, b, v, 0);
818 // CHECK: mla {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
819 }
820
test_vmlaq_lane_s16_0(int16x8_t a,int16x8_t b,int16x4_t v)821 int16x8_t test_vmlaq_lane_s16_0(int16x8_t a, int16x8_t b, int16x4_t v) {
822 // CHECK-LABEL: test_vmlaq_lane_s16_0
823 return vmlaq_lane_s16(a, b, v, 0);
824 // CHECK: mla {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
825 }
826
test_vmla_lane_s32_0(int32x2_t a,int32x2_t b,int32x2_t v)827 int32x2_t test_vmla_lane_s32_0(int32x2_t a, int32x2_t b, int32x2_t v) {
828 // CHECK-LABEL: test_vmla_lane_s32_0
829 return vmla_lane_s32(a, b, v, 0);
830 // CHECK: mla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
831 }
832
test_vmlaq_lane_s32_0(int32x4_t a,int32x4_t b,int32x2_t v)833 int32x4_t test_vmlaq_lane_s32_0(int32x4_t a, int32x4_t b, int32x2_t v) {
834 // CHECK-LABEL: test_vmlaq_lane_s32_0
835 return vmlaq_lane_s32(a, b, v, 0);
836 // CHECK: mla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
837 }
838
test_vmla_laneq_s16_0(int16x4_t a,int16x4_t b,int16x8_t v)839 int16x4_t test_vmla_laneq_s16_0(int16x4_t a, int16x4_t b, int16x8_t v) {
840 // CHECK-LABEL: test_vmla_laneq_s16_0
841 return vmla_laneq_s16(a, b, v, 0);
842 // CHECK: mla {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
843 }
844
test_vmlaq_laneq_s16_0(int16x8_t a,int16x8_t b,int16x8_t v)845 int16x8_t test_vmlaq_laneq_s16_0(int16x8_t a, int16x8_t b, int16x8_t v) {
846 // CHECK-LABEL: test_vmlaq_laneq_s16_0
847 return vmlaq_laneq_s16(a, b, v, 0);
848 // CHECK: mla {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
849 }
850
test_vmla_laneq_s32_0(int32x2_t a,int32x2_t b,int32x4_t v)851 int32x2_t test_vmla_laneq_s32_0(int32x2_t a, int32x2_t b, int32x4_t v) {
852 // CHECK-LABEL: test_vmla_laneq_s32_0
853 return vmla_laneq_s32(a, b, v, 0);
854 // CHECK: mla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
855 }
856
test_vmlaq_laneq_s32_0(int32x4_t a,int32x4_t b,int32x4_t v)857 int32x4_t test_vmlaq_laneq_s32_0(int32x4_t a, int32x4_t b, int32x4_t v) {
858 // CHECK-LABEL: test_vmlaq_laneq_s32_0
859 return vmlaq_laneq_s32(a, b, v, 0);
860 // CHECK: mla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
861 }
862
test_vmls_lane_s16_0(int16x4_t a,int16x4_t b,int16x4_t v)863 int16x4_t test_vmls_lane_s16_0(int16x4_t a, int16x4_t b, int16x4_t v) {
864 // CHECK-LABEL: test_vmls_lane_s16_0
865 return vmls_lane_s16(a, b, v, 0);
866 // CHECK: mls {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
867 }
868
test_vmlsq_lane_s16_0(int16x8_t a,int16x8_t b,int16x4_t v)869 int16x8_t test_vmlsq_lane_s16_0(int16x8_t a, int16x8_t b, int16x4_t v) {
870 // CHECK-LABEL: test_vmlsq_lane_s16_0
871 return vmlsq_lane_s16(a, b, v, 0);
872 // CHECK: mls {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
873 }
874
test_vmls_lane_s32_0(int32x2_t a,int32x2_t b,int32x2_t v)875 int32x2_t test_vmls_lane_s32_0(int32x2_t a, int32x2_t b, int32x2_t v) {
876 // CHECK-LABEL: test_vmls_lane_s32_0
877 return vmls_lane_s32(a, b, v, 0);
878 // CHECK: mls {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
879 }
880
test_vmlsq_lane_s32_0(int32x4_t a,int32x4_t b,int32x2_t v)881 int32x4_t test_vmlsq_lane_s32_0(int32x4_t a, int32x4_t b, int32x2_t v) {
882 // CHECK-LABEL: test_vmlsq_lane_s32_0
883 return vmlsq_lane_s32(a, b, v, 0);
884 // CHECK: mls {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
885 }
886
test_vmls_laneq_s16_0(int16x4_t a,int16x4_t b,int16x8_t v)887 int16x4_t test_vmls_laneq_s16_0(int16x4_t a, int16x4_t b, int16x8_t v) {
888 // CHECK-LABEL: test_vmls_laneq_s16_0
889 return vmls_laneq_s16(a, b, v, 0);
890 // CHECK: mls {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
891 }
892
test_vmlsq_laneq_s16_0(int16x8_t a,int16x8_t b,int16x8_t v)893 int16x8_t test_vmlsq_laneq_s16_0(int16x8_t a, int16x8_t b, int16x8_t v) {
894 // CHECK-LABEL: test_vmlsq_laneq_s16_0
895 return vmlsq_laneq_s16(a, b, v, 0);
896 // CHECK: mls {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
897 }
898
test_vmls_laneq_s32_0(int32x2_t a,int32x2_t b,int32x4_t v)899 int32x2_t test_vmls_laneq_s32_0(int32x2_t a, int32x2_t b, int32x4_t v) {
900 // CHECK-LABEL: test_vmls_laneq_s32_0
901 return vmls_laneq_s32(a, b, v, 0);
902 // CHECK: mls {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
903 }
904
test_vmlsq_laneq_s32_0(int32x4_t a,int32x4_t b,int32x4_t v)905 int32x4_t test_vmlsq_laneq_s32_0(int32x4_t a, int32x4_t b, int32x4_t v) {
906 // CHECK-LABEL: test_vmlsq_laneq_s32_0
907 return vmlsq_laneq_s32(a, b, v, 0);
908 // CHECK: mls {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
909 }
910
test_vmul_lane_s16_0(int16x4_t a,int16x4_t v)911 int16x4_t test_vmul_lane_s16_0(int16x4_t a, int16x4_t v) {
912 // CHECK-LABEL: test_vmul_lane_s16_0
913 return vmul_lane_s16(a, v, 0);
914 // CHECK: mul {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
915 }
916
test_vmulq_lane_s16_0(int16x8_t a,int16x4_t v)917 int16x8_t test_vmulq_lane_s16_0(int16x8_t a, int16x4_t v) {
918 // CHECK-LABEL: test_vmulq_lane_s16_0
919 return vmulq_lane_s16(a, v, 0);
920 // CHECK: mul {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
921 }
922
test_vmul_lane_s32_0(int32x2_t a,int32x2_t v)923 int32x2_t test_vmul_lane_s32_0(int32x2_t a, int32x2_t v) {
924 // CHECK-LABEL: test_vmul_lane_s32_0
925 return vmul_lane_s32(a, v, 0);
926 // CHECK: mul {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
927 }
928
test_vmulq_lane_s32_0(int32x4_t a,int32x2_t v)929 int32x4_t test_vmulq_lane_s32_0(int32x4_t a, int32x2_t v) {
930 // CHECK-LABEL: test_vmulq_lane_s32_0
931 return vmulq_lane_s32(a, v, 0);
932 // CHECK: mul {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
933 }
934
test_vmul_lane_u16_0(uint16x4_t a,uint16x4_t v)935 uint16x4_t test_vmul_lane_u16_0(uint16x4_t a, uint16x4_t v) {
936 // CHECK-LABEL: test_vmul_lane_u16_0
937 return vmul_lane_u16(a, v, 0);
938 // CHECK: mul {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
939 }
940
test_vmulq_lane_u16_0(uint16x8_t a,uint16x4_t v)941 uint16x8_t test_vmulq_lane_u16_0(uint16x8_t a, uint16x4_t v) {
942 // CHECK-LABEL: test_vmulq_lane_u16_0
943 return vmulq_lane_u16(a, v, 0);
944 // CHECK: mul {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
945 }
946
test_vmul_lane_u32_0(uint32x2_t a,uint32x2_t v)947 uint32x2_t test_vmul_lane_u32_0(uint32x2_t a, uint32x2_t v) {
948 // CHECK-LABEL: test_vmul_lane_u32_0
949 return vmul_lane_u32(a, v, 0);
950 // CHECK: mul {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
951 }
952
test_vmulq_lane_u32_0(uint32x4_t a,uint32x2_t v)953 uint32x4_t test_vmulq_lane_u32_0(uint32x4_t a, uint32x2_t v) {
954 // CHECK-LABEL: test_vmulq_lane_u32_0
955 return vmulq_lane_u32(a, v, 0);
956 // CHECK: mul {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
957 }
958
test_vmul_laneq_s16_0(int16x4_t a,int16x8_t v)959 int16x4_t test_vmul_laneq_s16_0(int16x4_t a, int16x8_t v) {
960 // CHECK-LABEL: test_vmul_laneq_s16_0
961 return vmul_laneq_s16(a, v, 0);
962 // CHECK: mul {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
963 }
964
test_vmulq_laneq_s16_0(int16x8_t a,int16x8_t v)965 int16x8_t test_vmulq_laneq_s16_0(int16x8_t a, int16x8_t v) {
966 // CHECK-LABEL: test_vmulq_laneq_s16_0
967 return vmulq_laneq_s16(a, v, 0);
968 // CHECK: mul {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
969 }
970
test_vmul_laneq_s32_0(int32x2_t a,int32x4_t v)971 int32x2_t test_vmul_laneq_s32_0(int32x2_t a, int32x4_t v) {
972 // CHECK-LABEL: test_vmul_laneq_s32_0
973 return vmul_laneq_s32(a, v, 0);
974 // CHECK: mul {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
975 }
976
test_vmulq_laneq_s32_0(int32x4_t a,int32x4_t v)977 int32x4_t test_vmulq_laneq_s32_0(int32x4_t a, int32x4_t v) {
978 // CHECK-LABEL: test_vmulq_laneq_s32_0
979 return vmulq_laneq_s32(a, v, 0);
980 // CHECK: mul {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
981 }
982
test_vmul_laneq_u16_0(uint16x4_t a,uint16x8_t v)983 uint16x4_t test_vmul_laneq_u16_0(uint16x4_t a, uint16x8_t v) {
984 // CHECK-LABEL: test_vmul_laneq_u16_0
985 return vmul_laneq_u16(a, v, 0);
986 // CHECK: mul {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
987 }
988
test_vmulq_laneq_u16_0(uint16x8_t a,uint16x8_t v)989 uint16x8_t test_vmulq_laneq_u16_0(uint16x8_t a, uint16x8_t v) {
990 // CHECK-LABEL: test_vmulq_laneq_u16_0
991 return vmulq_laneq_u16(a, v, 0);
992 // CHECK: mul {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
993 }
994
test_vmul_laneq_u32_0(uint32x2_t a,uint32x4_t v)995 uint32x2_t test_vmul_laneq_u32_0(uint32x2_t a, uint32x4_t v) {
996 // CHECK-LABEL: test_vmul_laneq_u32_0
997 return vmul_laneq_u32(a, v, 0);
998 // CHECK: mul {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
999 }
1000
test_vmulq_laneq_u32_0(uint32x4_t a,uint32x4_t v)1001 uint32x4_t test_vmulq_laneq_u32_0(uint32x4_t a, uint32x4_t v) {
1002 // CHECK-LABEL: test_vmulq_laneq_u32_0
1003 return vmulq_laneq_u32(a, v, 0);
1004 // CHECK: mul {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1005 }
1006
test_vfma_lane_f32_0(float32x2_t a,float32x2_t b,float32x2_t v)1007 float32x2_t test_vfma_lane_f32_0(float32x2_t a, float32x2_t b, float32x2_t v) {
1008 // CHECK-LABEL: test_vfma_lane_f32_0
1009 return vfma_lane_f32(a, b, v, 0);
1010 // CHECK: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1011 }
1012
test_vfmaq_lane_f32_0(float32x4_t a,float32x4_t b,float32x2_t v)1013 float32x4_t test_vfmaq_lane_f32_0(float32x4_t a, float32x4_t b, float32x2_t v) {
1014 // CHECK-LABEL: test_vfmaq_lane_f32_0
1015 return vfmaq_lane_f32(a, b, v, 0);
1016 // CHECK: fmla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1017 }
1018
test_vfma_laneq_f32_0(float32x2_t a,float32x2_t b,float32x4_t v)1019 float32x2_t test_vfma_laneq_f32_0(float32x2_t a, float32x2_t b, float32x4_t v) {
1020 // CHECK-LABEL: test_vfma_laneq_f32_0
1021 return vfma_laneq_f32(a, b, v, 0);
1022 // CHECK: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1023 }
1024
test_vfmaq_laneq_f32_0(float32x4_t a,float32x4_t b,float32x4_t v)1025 float32x4_t test_vfmaq_laneq_f32_0(float32x4_t a, float32x4_t b, float32x4_t v) {
1026 // CHECK-LABEL: test_vfmaq_laneq_f32_0
1027 return vfmaq_laneq_f32(a, b, v, 0);
1028 // CHECK: fmla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1029 }
1030
test_vfms_lane_f32_0(float32x2_t a,float32x2_t b,float32x2_t v)1031 float32x2_t test_vfms_lane_f32_0(float32x2_t a, float32x2_t b, float32x2_t v) {
1032 // CHECK-LABEL: test_vfms_lane_f32_0
1033 return vfms_lane_f32(a, b, v, 0);
1034 // CHECK: fmls {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1035 }
1036
test_vfmsq_lane_f32_0(float32x4_t a,float32x4_t b,float32x2_t v)1037 float32x4_t test_vfmsq_lane_f32_0(float32x4_t a, float32x4_t b, float32x2_t v) {
1038 // CHECK-LABEL: test_vfmsq_lane_f32_0
1039 return vfmsq_lane_f32(a, b, v, 0);
1040 // CHECK: fmls {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1041 }
1042
test_vfms_laneq_f32_0(float32x2_t a,float32x2_t b,float32x4_t v)1043 float32x2_t test_vfms_laneq_f32_0(float32x2_t a, float32x2_t b, float32x4_t v) {
1044 // CHECK-LABEL: test_vfms_laneq_f32_0
1045 return vfms_laneq_f32(a, b, v, 0);
1046 // CHECK: fmls {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1047 }
1048
test_vfmsq_laneq_f32_0(float32x4_t a,float32x4_t b,float32x4_t v)1049 float32x4_t test_vfmsq_laneq_f32_0(float32x4_t a, float32x4_t b, float32x4_t v) {
1050 // CHECK-LABEL: test_vfmsq_laneq_f32_0
1051 return vfmsq_laneq_f32(a, b, v, 0);
1052 // CHECK: fmls {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1053 }
1054
test_vfmaq_laneq_f64_0(float64x2_t a,float64x2_t b,float64x2_t v)1055 float64x2_t test_vfmaq_laneq_f64_0(float64x2_t a, float64x2_t b, float64x2_t v) {
1056 // CHECK-LABEL: test_vfmaq_laneq_f64_0
1057 return vfmaq_laneq_f64(a, b, v, 0);
1058 // CHECK: fmla {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.d[0]
1059 }
1060
test_vfmsq_laneq_f64_0(float64x2_t a,float64x2_t b,float64x2_t v)1061 float64x2_t test_vfmsq_laneq_f64_0(float64x2_t a, float64x2_t b, float64x2_t v) {
1062 // CHECK-LABEL: test_vfmsq_laneq_f64_0
1063 return vfmsq_laneq_f64(a, b, v, 0);
1064 // CHECK: fmls {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.d[0]
1065 }
1066
test_vmlal_lane_s16_0(int32x4_t a,int16x4_t b,int16x4_t v)1067 int32x4_t test_vmlal_lane_s16_0(int32x4_t a, int16x4_t b, int16x4_t v) {
1068 // CHECK-LABEL: test_vmlal_lane_s16_0
1069 return vmlal_lane_s16(a, b, v, 0);
1070 // CHECK: smlal {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
1071 }
1072
test_vmlal_lane_s32_0(int64x2_t a,int32x2_t b,int32x2_t v)1073 int64x2_t test_vmlal_lane_s32_0(int64x2_t a, int32x2_t b, int32x2_t v) {
1074 // CHECK-LABEL: test_vmlal_lane_s32_0
1075 return vmlal_lane_s32(a, b, v, 0);
1076 // CHECK: smlal {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1077 }
1078
test_vmlal_laneq_s16_0(int32x4_t a,int16x4_t b,int16x8_t v)1079 int32x4_t test_vmlal_laneq_s16_0(int32x4_t a, int16x4_t b, int16x8_t v) {
1080 // CHECK-LABEL: test_vmlal_laneq_s16_0
1081 return vmlal_laneq_s16(a, b, v, 0);
1082 // CHECK: smlal {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
1083 }
1084
test_vmlal_laneq_s32_0(int64x2_t a,int32x2_t b,int32x4_t v)1085 int64x2_t test_vmlal_laneq_s32_0(int64x2_t a, int32x2_t b, int32x4_t v) {
1086 // CHECK-LABEL: test_vmlal_laneq_s32_0
1087 return vmlal_laneq_s32(a, b, v, 0);
1088 // CHECK: smlal {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1089 }
1090
test_vmlal_high_lane_s16_0(int32x4_t a,int16x8_t b,int16x4_t v)1091 int32x4_t test_vmlal_high_lane_s16_0(int32x4_t a, int16x8_t b, int16x4_t v) {
1092 // CHECK-LABEL: test_vmlal_high_lane_s16_0
1093 return vmlal_high_lane_s16(a, b, v, 0);
1094 // CHECK: smlal2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
1095 }
1096
test_vmlal_high_lane_s32_0(int64x2_t a,int32x4_t b,int32x2_t v)1097 int64x2_t test_vmlal_high_lane_s32_0(int64x2_t a, int32x4_t b, int32x2_t v) {
1098 // CHECK-LABEL: test_vmlal_high_lane_s32_0
1099 return vmlal_high_lane_s32(a, b, v, 0);
1100 // CHECK: smlal2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1101 }
1102
test_vmlal_high_laneq_s16_0(int32x4_t a,int16x8_t b,int16x8_t v)1103 int32x4_t test_vmlal_high_laneq_s16_0(int32x4_t a, int16x8_t b, int16x8_t v) {
1104 // CHECK-LABEL: test_vmlal_high_laneq_s16_0
1105 return vmlal_high_laneq_s16(a, b, v, 0);
1106 // CHECK: smlal2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
1107 }
1108
test_vmlal_high_laneq_s32_0(int64x2_t a,int32x4_t b,int32x4_t v)1109 int64x2_t test_vmlal_high_laneq_s32_0(int64x2_t a, int32x4_t b, int32x4_t v) {
1110 // CHECK-LABEL: test_vmlal_high_laneq_s32_0
1111 return vmlal_high_laneq_s32(a, b, v, 0);
1112 // CHECK: smlal2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1113 }
1114
test_vmlsl_lane_s16_0(int32x4_t a,int16x4_t b,int16x4_t v)1115 int32x4_t test_vmlsl_lane_s16_0(int32x4_t a, int16x4_t b, int16x4_t v) {
1116 // CHECK-LABEL: test_vmlsl_lane_s16_0
1117 return vmlsl_lane_s16(a, b, v, 0);
1118 // CHECK: smlsl {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
1119 }
1120
test_vmlsl_lane_s32_0(int64x2_t a,int32x2_t b,int32x2_t v)1121 int64x2_t test_vmlsl_lane_s32_0(int64x2_t a, int32x2_t b, int32x2_t v) {
1122 // CHECK-LABEL: test_vmlsl_lane_s32_0
1123 return vmlsl_lane_s32(a, b, v, 0);
1124 // CHECK: smlsl {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1125 }
1126
test_vmlsl_laneq_s16_0(int32x4_t a,int16x4_t b,int16x8_t v)1127 int32x4_t test_vmlsl_laneq_s16_0(int32x4_t a, int16x4_t b, int16x8_t v) {
1128 // CHECK-LABEL: test_vmlsl_laneq_s16_0
1129 return vmlsl_laneq_s16(a, b, v, 0);
1130 // CHECK: smlsl {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
1131 }
1132
test_vmlsl_laneq_s32_0(int64x2_t a,int32x2_t b,int32x4_t v)1133 int64x2_t test_vmlsl_laneq_s32_0(int64x2_t a, int32x2_t b, int32x4_t v) {
1134 // CHECK-LABEL: test_vmlsl_laneq_s32_0
1135 return vmlsl_laneq_s32(a, b, v, 0);
1136 // CHECK: smlsl {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1137 }
1138
test_vmlsl_high_lane_s16_0(int32x4_t a,int16x8_t b,int16x4_t v)1139 int32x4_t test_vmlsl_high_lane_s16_0(int32x4_t a, int16x8_t b, int16x4_t v) {
1140 // CHECK-LABEL: test_vmlsl_high_lane_s16_0
1141 return vmlsl_high_lane_s16(a, b, v, 0);
1142 // CHECK: smlsl2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
1143 }
1144
test_vmlsl_high_lane_s32_0(int64x2_t a,int32x4_t b,int32x2_t v)1145 int64x2_t test_vmlsl_high_lane_s32_0(int64x2_t a, int32x4_t b, int32x2_t v) {
1146 // CHECK-LABEL: test_vmlsl_high_lane_s32_0
1147 return vmlsl_high_lane_s32(a, b, v, 0);
1148 // CHECK: smlsl2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1149 }
1150
test_vmlsl_high_laneq_s16_0(int32x4_t a,int16x8_t b,int16x8_t v)1151 int32x4_t test_vmlsl_high_laneq_s16_0(int32x4_t a, int16x8_t b, int16x8_t v) {
1152 // CHECK-LABEL: test_vmlsl_high_laneq_s16_0
1153 return vmlsl_high_laneq_s16(a, b, v, 0);
1154 // CHECK: smlsl2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
1155 }
1156
test_vmlsl_high_laneq_s32_0(int64x2_t a,int32x4_t b,int32x4_t v)1157 int64x2_t test_vmlsl_high_laneq_s32_0(int64x2_t a, int32x4_t b, int32x4_t v) {
1158 // CHECK-LABEL: test_vmlsl_high_laneq_s32_0
1159 return vmlsl_high_laneq_s32(a, b, v, 0);
1160 // CHECK: smlsl2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1161 }
1162
test_vmlal_lane_u16_0(int32x4_t a,int16x4_t b,int16x4_t v)1163 int32x4_t test_vmlal_lane_u16_0(int32x4_t a, int16x4_t b, int16x4_t v) {
1164 // CHECK-LABEL: test_vmlal_lane_u16_0
1165 return vmlal_lane_u16(a, b, v, 0);
1166 // CHECK: umlal {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
1167 }
1168
test_vmlal_lane_u32_0(int64x2_t a,int32x2_t b,int32x2_t v)1169 int64x2_t test_vmlal_lane_u32_0(int64x2_t a, int32x2_t b, int32x2_t v) {
1170 // CHECK-LABEL: test_vmlal_lane_u32_0
1171 return vmlal_lane_u32(a, b, v, 0);
1172 // CHECK: umlal {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1173 }
1174
test_vmlal_laneq_u16_0(int32x4_t a,int16x4_t b,int16x8_t v)1175 int32x4_t test_vmlal_laneq_u16_0(int32x4_t a, int16x4_t b, int16x8_t v) {
1176 // CHECK-LABEL: test_vmlal_laneq_u16_0
1177 return vmlal_laneq_u16(a, b, v, 0);
1178 // CHECK: umlal {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
1179 }
1180
test_vmlal_laneq_u32_0(int64x2_t a,int32x2_t b,int32x4_t v)1181 int64x2_t test_vmlal_laneq_u32_0(int64x2_t a, int32x2_t b, int32x4_t v) {
1182 // CHECK-LABEL: test_vmlal_laneq_u32_0
1183 return vmlal_laneq_u32(a, b, v, 0);
1184 // CHECK: umlal {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1185 }
1186
test_vmlal_high_lane_u16_0(int32x4_t a,int16x8_t b,int16x4_t v)1187 int32x4_t test_vmlal_high_lane_u16_0(int32x4_t a, int16x8_t b, int16x4_t v) {
1188 // CHECK-LABEL: test_vmlal_high_lane_u16_0
1189 return vmlal_high_lane_u16(a, b, v, 0);
1190 // CHECK: umlal2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
1191 }
1192
test_vmlal_high_lane_u32_0(int64x2_t a,int32x4_t b,int32x2_t v)1193 int64x2_t test_vmlal_high_lane_u32_0(int64x2_t a, int32x4_t b, int32x2_t v) {
1194 // CHECK-LABEL: test_vmlal_high_lane_u32_0
1195 return vmlal_high_lane_u32(a, b, v, 0);
1196 // CHECK: umlal2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1197 }
1198
test_vmlal_high_laneq_u16_0(int32x4_t a,int16x8_t b,int16x8_t v)1199 int32x4_t test_vmlal_high_laneq_u16_0(int32x4_t a, int16x8_t b, int16x8_t v) {
1200 // CHECK-LABEL: test_vmlal_high_laneq_u16_0
1201 return vmlal_high_laneq_u16(a, b, v, 0);
1202 // CHECK: umlal2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
1203 }
1204
test_vmlal_high_laneq_u32_0(int64x2_t a,int32x4_t b,int32x4_t v)1205 int64x2_t test_vmlal_high_laneq_u32_0(int64x2_t a, int32x4_t b, int32x4_t v) {
1206 // CHECK-LABEL: test_vmlal_high_laneq_u32_0
1207 return vmlal_high_laneq_u32(a, b, v, 0);
1208 // CHECK: umlal2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1209 }
1210
test_vmlsl_lane_u16_0(int32x4_t a,int16x4_t b,int16x4_t v)1211 int32x4_t test_vmlsl_lane_u16_0(int32x4_t a, int16x4_t b, int16x4_t v) {
1212 // CHECK-LABEL: test_vmlsl_lane_u16_0
1213 return vmlsl_lane_u16(a, b, v, 0);
1214 // CHECK: umlsl {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
1215 }
1216
test_vmlsl_lane_u32_0(int64x2_t a,int32x2_t b,int32x2_t v)1217 int64x2_t test_vmlsl_lane_u32_0(int64x2_t a, int32x2_t b, int32x2_t v) {
1218 // CHECK-LABEL: test_vmlsl_lane_u32_0
1219 return vmlsl_lane_u32(a, b, v, 0);
1220 // CHECK: umlsl {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1221 }
1222
test_vmlsl_laneq_u16_0(int32x4_t a,int16x4_t b,int16x8_t v)1223 int32x4_t test_vmlsl_laneq_u16_0(int32x4_t a, int16x4_t b, int16x8_t v) {
1224 // CHECK-LABEL: test_vmlsl_laneq_u16_0
1225 return vmlsl_laneq_u16(a, b, v, 0);
1226 // CHECK: umlsl {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
1227 }
1228
test_vmlsl_laneq_u32_0(int64x2_t a,int32x2_t b,int32x4_t v)1229 int64x2_t test_vmlsl_laneq_u32_0(int64x2_t a, int32x2_t b, int32x4_t v) {
1230 // CHECK-LABEL: test_vmlsl_laneq_u32_0
1231 return vmlsl_laneq_u32(a, b, v, 0);
1232 // CHECK: umlsl {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1233 }
1234
test_vmlsl_high_lane_u16_0(int32x4_t a,int16x8_t b,int16x4_t v)1235 int32x4_t test_vmlsl_high_lane_u16_0(int32x4_t a, int16x8_t b, int16x4_t v) {
1236 // CHECK-LABEL: test_vmlsl_high_lane_u16_0
1237 return vmlsl_high_lane_u16(a, b, v, 0);
1238 // CHECK: umlsl2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
1239 }
1240
test_vmlsl_high_lane_u32_0(int64x2_t a,int32x4_t b,int32x2_t v)1241 int64x2_t test_vmlsl_high_lane_u32_0(int64x2_t a, int32x4_t b, int32x2_t v) {
1242 // CHECK-LABEL: test_vmlsl_high_lane_u32_0
1243 return vmlsl_high_lane_u32(a, b, v, 0);
1244 // CHECK: umlsl2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1245 }
1246
test_vmlsl_high_laneq_u16_0(int32x4_t a,int16x8_t b,int16x8_t v)1247 int32x4_t test_vmlsl_high_laneq_u16_0(int32x4_t a, int16x8_t b, int16x8_t v) {
1248 // CHECK-LABEL: test_vmlsl_high_laneq_u16_0
1249 return vmlsl_high_laneq_u16(a, b, v, 0);
1250 // CHECK: umlsl2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
1251 }
1252
test_vmlsl_high_laneq_u32_0(int64x2_t a,int32x4_t b,int32x4_t v)1253 int64x2_t test_vmlsl_high_laneq_u32_0(int64x2_t a, int32x4_t b, int32x4_t v) {
1254 // CHECK-LABEL: test_vmlsl_high_laneq_u32_0
1255 return vmlsl_high_laneq_u32(a, b, v, 0);
1256 // CHECK: umlsl2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1257 }
1258
test_vmull_lane_s16_0(int16x4_t a,int16x4_t v)1259 int32x4_t test_vmull_lane_s16_0(int16x4_t a, int16x4_t v) {
1260 // CHECK-LABEL: test_vmull_lane_s16_0
1261 return vmull_lane_s16(a, v, 0);
1262 // CHECK: smull {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
1263 }
1264
test_vmull_lane_s32_0(int32x2_t a,int32x2_t v)1265 int64x2_t test_vmull_lane_s32_0(int32x2_t a, int32x2_t v) {
1266 // CHECK-LABEL: test_vmull_lane_s32_0
1267 return vmull_lane_s32(a, v, 0);
1268 // CHECK: smull {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1269 }
1270
test_vmull_lane_u16_0(uint16x4_t a,uint16x4_t v)1271 uint32x4_t test_vmull_lane_u16_0(uint16x4_t a, uint16x4_t v) {
1272 // CHECK-LABEL: test_vmull_lane_u16_0
1273 return vmull_lane_u16(a, v, 0);
1274 // CHECK: umull {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
1275 }
1276
test_vmull_lane_u32_0(uint32x2_t a,uint32x2_t v)1277 uint64x2_t test_vmull_lane_u32_0(uint32x2_t a, uint32x2_t v) {
1278 // CHECK-LABEL: test_vmull_lane_u32_0
1279 return vmull_lane_u32(a, v, 0);
1280 // CHECK: umull {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1281 }
1282
test_vmull_high_lane_s16_0(int16x8_t a,int16x4_t v)1283 int32x4_t test_vmull_high_lane_s16_0(int16x8_t a, int16x4_t v) {
1284 // CHECK-LABEL: test_vmull_high_lane_s16_0
1285 return vmull_high_lane_s16(a, v, 0);
1286 // CHECK: smull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
1287 }
1288
test_vmull_high_lane_s32_0(int32x4_t a,int32x2_t v)1289 int64x2_t test_vmull_high_lane_s32_0(int32x4_t a, int32x2_t v) {
1290 // CHECK-LABEL: test_vmull_high_lane_s32_0
1291 return vmull_high_lane_s32(a, v, 0);
1292 // CHECK: smull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1293 }
1294
test_vmull_high_lane_u16_0(uint16x8_t a,uint16x4_t v)1295 uint32x4_t test_vmull_high_lane_u16_0(uint16x8_t a, uint16x4_t v) {
1296 // CHECK-LABEL: test_vmull_high_lane_u16_0
1297 return vmull_high_lane_u16(a, v, 0);
1298 // CHECK: umull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
1299 }
1300
test_vmull_high_lane_u32_0(uint32x4_t a,uint32x2_t v)1301 uint64x2_t test_vmull_high_lane_u32_0(uint32x4_t a, uint32x2_t v) {
1302 // CHECK-LABEL: test_vmull_high_lane_u32_0
1303 return vmull_high_lane_u32(a, v, 0);
1304 // CHECK: umull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1305 }
1306
test_vmull_laneq_s16_0(int16x4_t a,int16x8_t v)1307 int32x4_t test_vmull_laneq_s16_0(int16x4_t a, int16x8_t v) {
1308 // CHECK-LABEL: test_vmull_laneq_s16_0
1309 return vmull_laneq_s16(a, v, 0);
1310 // CHECK: smull {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
1311 }
1312
test_vmull_laneq_s32_0(int32x2_t a,int32x4_t v)1313 int64x2_t test_vmull_laneq_s32_0(int32x2_t a, int32x4_t v) {
1314 // CHECK-LABEL: test_vmull_laneq_s32_0
1315 return vmull_laneq_s32(a, v, 0);
1316 // CHECK: smull {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1317 }
1318
test_vmull_laneq_u16_0(uint16x4_t a,uint16x8_t v)1319 uint32x4_t test_vmull_laneq_u16_0(uint16x4_t a, uint16x8_t v) {
1320 // CHECK-LABEL: test_vmull_laneq_u16_0
1321 return vmull_laneq_u16(a, v, 0);
1322 // CHECK: umull {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
1323 }
1324
test_vmull_laneq_u32_0(uint32x2_t a,uint32x4_t v)1325 uint64x2_t test_vmull_laneq_u32_0(uint32x2_t a, uint32x4_t v) {
1326 // CHECK-LABEL: test_vmull_laneq_u32_0
1327 return vmull_laneq_u32(a, v, 0);
1328 // CHECK: umull {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1329 }
1330
test_vmull_high_laneq_s16_0(int16x8_t a,int16x8_t v)1331 int32x4_t test_vmull_high_laneq_s16_0(int16x8_t a, int16x8_t v) {
1332 // CHECK-LABEL: test_vmull_high_laneq_s16_0
1333 return vmull_high_laneq_s16(a, v, 0);
1334 // CHECK: smull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
1335 }
1336
test_vmull_high_laneq_s32_0(int32x4_t a,int32x4_t v)1337 int64x2_t test_vmull_high_laneq_s32_0(int32x4_t a, int32x4_t v) {
1338 // CHECK-LABEL: test_vmull_high_laneq_s32_0
1339 return vmull_high_laneq_s32(a, v, 0);
1340 // CHECK: smull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1341 }
1342
test_vmull_high_laneq_u16_0(uint16x8_t a,uint16x8_t v)1343 uint32x4_t test_vmull_high_laneq_u16_0(uint16x8_t a, uint16x8_t v) {
1344 // CHECK-LABEL: test_vmull_high_laneq_u16_0
1345 return vmull_high_laneq_u16(a, v, 0);
1346 // CHECK: umull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
1347 }
1348
test_vmull_high_laneq_u32_0(uint32x4_t a,uint32x4_t v)1349 uint64x2_t test_vmull_high_laneq_u32_0(uint32x4_t a, uint32x4_t v) {
1350 // CHECK-LABEL: test_vmull_high_laneq_u32_0
1351 return vmull_high_laneq_u32(a, v, 0);
1352 // CHECK: umull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1353 }
1354
test_vqdmlal_lane_s16_0(int32x4_t a,int16x4_t b,int16x4_t v)1355 int32x4_t test_vqdmlal_lane_s16_0(int32x4_t a, int16x4_t b, int16x4_t v) {
1356 // CHECK-LABEL: test_vqdmlal_lane_s16_0
1357 return vqdmlal_lane_s16(a, b, v, 0);
1358 // CHECK: sqdmlal {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
1359 }
1360
test_vqdmlal_lane_s32_0(int64x2_t a,int32x2_t b,int32x2_t v)1361 int64x2_t test_vqdmlal_lane_s32_0(int64x2_t a, int32x2_t b, int32x2_t v) {
1362 // CHECK-LABEL: test_vqdmlal_lane_s32_0
1363 return vqdmlal_lane_s32(a, b, v, 0);
1364 // CHECK: sqdmlal {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1365 }
1366
test_vqdmlal_high_lane_s16_0(int32x4_t a,int16x8_t b,int16x4_t v)1367 int32x4_t test_vqdmlal_high_lane_s16_0(int32x4_t a, int16x8_t b, int16x4_t v) {
1368 // CHECK-LABEL: test_vqdmlal_high_lane_s16_0
1369 return vqdmlal_high_lane_s16(a, b, v, 0);
1370 // CHECK: sqdmlal2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
1371 }
1372
test_vqdmlal_high_lane_s32_0(int64x2_t a,int32x4_t b,int32x2_t v)1373 int64x2_t test_vqdmlal_high_lane_s32_0(int64x2_t a, int32x4_t b, int32x2_t v) {
1374 // CHECK-LABEL: test_vqdmlal_high_lane_s32_0
1375 return vqdmlal_high_lane_s32(a, b, v, 0);
1376 // CHECK: sqdmlal2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1377 }
1378
test_vqdmlsl_lane_s16_0(int32x4_t a,int16x4_t b,int16x4_t v)1379 int32x4_t test_vqdmlsl_lane_s16_0(int32x4_t a, int16x4_t b, int16x4_t v) {
1380 // CHECK-LABEL: test_vqdmlsl_lane_s16_0
1381 return vqdmlsl_lane_s16(a, b, v, 0);
1382 // CHECK: sqdmlsl {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
1383 }
1384
test_vqdmlsl_lane_s32_0(int64x2_t a,int32x2_t b,int32x2_t v)1385 int64x2_t test_vqdmlsl_lane_s32_0(int64x2_t a, int32x2_t b, int32x2_t v) {
1386 // CHECK-LABEL: test_vqdmlsl_lane_s32_0
1387 return vqdmlsl_lane_s32(a, b, v, 0);
1388 // CHECK: sqdmlsl {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1389 }
1390
test_vqdmlsl_high_lane_s16_0(int32x4_t a,int16x8_t b,int16x4_t v)1391 int32x4_t test_vqdmlsl_high_lane_s16_0(int32x4_t a, int16x8_t b, int16x4_t v) {
1392 // CHECK-LABEL: test_vqdmlsl_high_lane_s16_0
1393 return vqdmlsl_high_lane_s16(a, b, v, 0);
1394 // CHECK: sqdmlsl2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
1395 }
1396
test_vqdmlsl_high_lane_s32_0(int64x2_t a,int32x4_t b,int32x2_t v)1397 int64x2_t test_vqdmlsl_high_lane_s32_0(int64x2_t a, int32x4_t b, int32x2_t v) {
1398 // CHECK-LABEL: test_vqdmlsl_high_lane_s32_0
1399 return vqdmlsl_high_lane_s32(a, b, v, 0);
1400 // CHECK: sqdmlsl2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1401 }
1402
test_vqdmull_lane_s16_0(int16x4_t a,int16x4_t v)1403 int32x4_t test_vqdmull_lane_s16_0(int16x4_t a, int16x4_t v) {
1404 // CHECK-LABEL: test_vqdmull_lane_s16_0
1405 return vqdmull_lane_s16(a, v, 0);
1406 // CHECK: sqdmull {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
1407 }
1408
test_vqdmull_lane_s32_0(int32x2_t a,int32x2_t v)1409 int64x2_t test_vqdmull_lane_s32_0(int32x2_t a, int32x2_t v) {
1410 // CHECK-LABEL: test_vqdmull_lane_s32_0
1411 return vqdmull_lane_s32(a, v, 0);
1412 // CHECK: sqdmull {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1413 }
1414
test_vqdmull_laneq_s16_0(int16x4_t a,int16x8_t v)1415 int32x4_t test_vqdmull_laneq_s16_0(int16x4_t a, int16x8_t v) {
1416 // CHECK-LABEL: test_vqdmull_laneq_s16_0
1417 return vqdmull_laneq_s16(a, v, 0);
1418 // CHECK: sqdmull {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
1419 }
1420
test_vqdmull_laneq_s32_0(int32x2_t a,int32x4_t v)1421 int64x2_t test_vqdmull_laneq_s32_0(int32x2_t a, int32x4_t v) {
1422 // CHECK-LABEL: test_vqdmull_laneq_s32_0
1423 return vqdmull_laneq_s32(a, v, 0);
1424 // CHECK: sqdmull {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1425 }
1426
test_vqdmull_high_lane_s16_0(int16x8_t a,int16x4_t v)1427 int32x4_t test_vqdmull_high_lane_s16_0(int16x8_t a, int16x4_t v) {
1428 // CHECK-LABEL: test_vqdmull_high_lane_s16_0
1429 return vqdmull_high_lane_s16(a, v, 0);
1430 // CHECK: sqdmull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
1431 }
1432
test_vqdmull_high_lane_s32_0(int32x4_t a,int32x2_t v)1433 int64x2_t test_vqdmull_high_lane_s32_0(int32x4_t a, int32x2_t v) {
1434 // CHECK-LABEL: test_vqdmull_high_lane_s32_0
1435 return vqdmull_high_lane_s32(a, v, 0);
1436 // CHECK: sqdmull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1437 }
1438
test_vqdmull_high_laneq_s16_0(int16x8_t a,int16x8_t v)1439 int32x4_t test_vqdmull_high_laneq_s16_0(int16x8_t a, int16x8_t v) {
1440 // CHECK-LABEL: test_vqdmull_high_laneq_s16_0
1441 return vqdmull_high_laneq_s16(a, v, 0);
1442 // CHECK: sqdmull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
1443 }
1444
test_vqdmull_high_laneq_s32_0(int32x4_t a,int32x4_t v)1445 int64x2_t test_vqdmull_high_laneq_s32_0(int32x4_t a, int32x4_t v) {
1446 // CHECK-LABEL: test_vqdmull_high_laneq_s32_0
1447 return vqdmull_high_laneq_s32(a, v, 0);
1448 // CHECK: sqdmull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1449 }
1450
test_vqdmulh_lane_s16_0(int16x4_t a,int16x4_t v)1451 int16x4_t test_vqdmulh_lane_s16_0(int16x4_t a, int16x4_t v) {
1452 // CHECK-LABEL: test_vqdmulh_lane_s16_0
1453 return vqdmulh_lane_s16(a, v, 0);
1454 // CHECK: sqdmulh {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
1455 }
1456
test_vqdmulhq_lane_s16_0(int16x8_t a,int16x4_t v)1457 int16x8_t test_vqdmulhq_lane_s16_0(int16x8_t a, int16x4_t v) {
1458 // CHECK-LABEL: test_vqdmulhq_lane_s16_0
1459 return vqdmulhq_lane_s16(a, v, 0);
1460 // CHECK: sqdmulh {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
1461 }
1462
test_vqdmulh_lane_s32_0(int32x2_t a,int32x2_t v)1463 int32x2_t test_vqdmulh_lane_s32_0(int32x2_t a, int32x2_t v) {
1464 // CHECK-LABEL: test_vqdmulh_lane_s32_0
1465 return vqdmulh_lane_s32(a, v, 0);
1466 // CHECK: sqdmulh {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1467 }
1468
test_vqdmulhq_lane_s32_0(int32x4_t a,int32x2_t v)1469 int32x4_t test_vqdmulhq_lane_s32_0(int32x4_t a, int32x2_t v) {
1470 // CHECK-LABEL: test_vqdmulhq_lane_s32_0
1471 return vqdmulhq_lane_s32(a, v, 0);
1472 // CHECK: sqdmulh {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1473 }
1474
test_vqrdmulh_lane_s16_0(int16x4_t a,int16x4_t v)1475 int16x4_t test_vqrdmulh_lane_s16_0(int16x4_t a, int16x4_t v) {
1476 // CHECK-LABEL: test_vqrdmulh_lane_s16_0
1477 return vqrdmulh_lane_s16(a, v, 0);
1478 // CHECK: sqrdmulh {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
1479 }
1480
test_vqrdmulhq_lane_s16_0(int16x8_t a,int16x4_t v)1481 int16x8_t test_vqrdmulhq_lane_s16_0(int16x8_t a, int16x4_t v) {
1482 // CHECK-LABEL: test_vqrdmulhq_lane_s16_0
1483 return vqrdmulhq_lane_s16(a, v, 0);
1484 // CHECK: sqrdmulh {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
1485 }
1486
test_vqrdmulh_lane_s32_0(int32x2_t a,int32x2_t v)1487 int32x2_t test_vqrdmulh_lane_s32_0(int32x2_t a, int32x2_t v) {
1488 // CHECK-LABEL: test_vqrdmulh_lane_s32_0
1489 return vqrdmulh_lane_s32(a, v, 0);
1490 // CHECK: sqrdmulh {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1491 }
1492
test_vqrdmulhq_lane_s32_0(int32x4_t a,int32x2_t v)1493 int32x4_t test_vqrdmulhq_lane_s32_0(int32x4_t a, int32x2_t v) {
1494 // CHECK-LABEL: test_vqrdmulhq_lane_s32_0
1495 return vqrdmulhq_lane_s32(a, v, 0);
1496 // CHECK: sqrdmulh {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1497 }
1498
test_vmul_lane_f32_0(float32x2_t a,float32x2_t v)1499 float32x2_t test_vmul_lane_f32_0(float32x2_t a, float32x2_t v) {
1500 // CHECK-LABEL: test_vmul_lane_f32_0
1501 return vmul_lane_f32(a, v, 0);
1502 // CHECK: fmul {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1503 }
1504
test_vmulq_lane_f32_0(float32x4_t a,float32x2_t v)1505 float32x4_t test_vmulq_lane_f32_0(float32x4_t a, float32x2_t v) {
1506 // CHECK-LABEL: test_vmulq_lane_f32_0
1507 return vmulq_lane_f32(a, v, 0);
1508 // CHECK: fmul {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1509 }
1510
test_vmul_laneq_f32_0(float32x2_t a,float32x4_t v)1511 float32x2_t test_vmul_laneq_f32_0(float32x2_t a, float32x4_t v) {
1512 // CHECK-LABEL: test_vmul_laneq_f32_0
1513 return vmul_laneq_f32(a, v, 0);
1514 // CHECK: fmul {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1515 }
1516
test_vmul_laneq_f64_0(float64x1_t a,float64x2_t v)1517 float64x1_t test_vmul_laneq_f64_0(float64x1_t a, float64x2_t v) {
1518 // CHECK-LABEL: test_vmul_laneq_f64_0
1519 return vmul_laneq_f64(a, v, 0);
1520 // CHECK: fmul {{d[0-9]+}}, {{d[0-9]+}}, {{v[0-9]+}}.d[0]
1521 }
1522
test_vmulq_laneq_f32_0(float32x4_t a,float32x4_t v)1523 float32x4_t test_vmulq_laneq_f32_0(float32x4_t a, float32x4_t v) {
1524 // CHECK-LABEL: test_vmulq_laneq_f32_0
1525 return vmulq_laneq_f32(a, v, 0);
1526 // CHECK: fmul {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1527 }
1528
test_vmulq_laneq_f64_0(float64x2_t a,float64x2_t v)1529 float64x2_t test_vmulq_laneq_f64_0(float64x2_t a, float64x2_t v) {
1530 // CHECK-LABEL: test_vmulq_laneq_f64_0
1531 return vmulq_laneq_f64(a, v, 0);
1532 // CHECK: fmul {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.d[0]
1533 }
1534
test_vmulx_lane_f32_0(float32x2_t a,float32x2_t v)1535 float32x2_t test_vmulx_lane_f32_0(float32x2_t a, float32x2_t v) {
1536 // CHECK-LABEL: test_vmulx_lane_f32_0
1537 return vmulx_lane_f32(a, v, 0);
1538 // CHECK: fmulx {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1539 }
1540
test_vmulxq_lane_f32_0(float32x4_t a,float32x2_t v)1541 float32x4_t test_vmulxq_lane_f32_0(float32x4_t a, float32x2_t v) {
1542 // CHECK-LABEL: test_vmulxq_lane_f32_0
1543 return vmulxq_lane_f32(a, v, 0);
1544 // CHECK: fmulx {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1545 }
1546
test_vmulxq_lane_f64_0(float64x2_t a,float64x1_t v)1547 float64x2_t test_vmulxq_lane_f64_0(float64x2_t a, float64x1_t v) {
1548 // CHECK-LABEL: test_vmulxq_lane_f64_0
1549 return vmulxq_lane_f64(a, v, 0);
1550 // CHECK: fmulx {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.d[0]
1551 }
1552
test_vmulx_laneq_f32_0(float32x2_t a,float32x4_t v)1553 float32x2_t test_vmulx_laneq_f32_0(float32x2_t a, float32x4_t v) {
1554 // CHECK-LABEL: test_vmulx_laneq_f32_0
1555 return vmulx_laneq_f32(a, v, 0);
1556 // CHECK: fmulx {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1557 }
1558
test_vmulxq_laneq_f32_0(float32x4_t a,float32x4_t v)1559 float32x4_t test_vmulxq_laneq_f32_0(float32x4_t a, float32x4_t v) {
1560 // CHECK-LABEL: test_vmulxq_laneq_f32_0
1561 return vmulxq_laneq_f32(a, v, 0);
1562 // CHECK: fmulx {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1563 }
1564
test_vmulxq_laneq_f64_0(float64x2_t a,float64x2_t v)1565 float64x2_t test_vmulxq_laneq_f64_0(float64x2_t a, float64x2_t v) {
1566 // CHECK-LABEL: test_vmulxq_laneq_f64_0
1567 return vmulxq_laneq_f64(a, v, 0);
1568 // CHECK: fmulx {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.d[0]
1569 }
1570
test_vmull_high_n_s16(int16x8_t a,int16_t b)1571 int32x4_t test_vmull_high_n_s16(int16x8_t a, int16_t b) {
1572 // CHECK-LABEL: test_vmull_high_n_s16
1573 return vmull_high_n_s16(a, b);
1574 // CHECK: smull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+\.h\[0\]|v[0-9]+\.8h}}
1575 }
1576
test_vmull_high_n_s32(int32x4_t a,int32_t b)1577 int64x2_t test_vmull_high_n_s32(int32x4_t a, int32_t b) {
1578 // CHECK-LABEL: test_vmull_high_n_s32
1579 return vmull_high_n_s32(a, b);
1580 // CHECK: smull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+\.s\[0\]|v[0-9]+\.4s}}
1581 }
1582
test_vmull_high_n_u16(uint16x8_t a,uint16_t b)1583 uint32x4_t test_vmull_high_n_u16(uint16x8_t a, uint16_t b) {
1584 // CHECK-LABEL: test_vmull_high_n_u16
1585 return vmull_high_n_u16(a, b);
1586 // CHECK: umull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+\.h\[0\]|v[0-9]+\.8h}}
1587 }
1588
test_vmull_high_n_u32(uint32x4_t a,uint32_t b)1589 uint64x2_t test_vmull_high_n_u32(uint32x4_t a, uint32_t b) {
1590 // CHECK-LABEL: test_vmull_high_n_u32
1591 return vmull_high_n_u32(a, b);
1592 // CHECK: umull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+\.s\[0\]|v[0-9]+\.4s}}
1593 }
1594
test_vqdmull_high_n_s16(int16x8_t a,int16_t b)1595 int32x4_t test_vqdmull_high_n_s16(int16x8_t a, int16_t b) {
1596 // CHECK-LABEL: test_vqdmull_high_n_s16
1597 return vqdmull_high_n_s16(a, b);
1598 // CHECK: sqdmull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+\.h\[0\]|v[0-9]+\.8h}}
1599 }
1600
test_vqdmull_high_n_s32(int32x4_t a,int32_t b)1601 int64x2_t test_vqdmull_high_n_s32(int32x4_t a, int32_t b) {
1602 // CHECK-LABEL: test_vqdmull_high_n_s32
1603 return vqdmull_high_n_s32(a, b);
1604 // CHECK: sqdmull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+\.s\[0\]|v[0-9]+\.4s}}
1605 }
1606
test_vmlal_high_n_s16(int32x4_t a,int16x8_t b,int16_t c)1607 int32x4_t test_vmlal_high_n_s16(int32x4_t a, int16x8_t b, int16_t c) {
1608 // CHECK-LABEL: test_vmlal_high_n_s16
1609 return vmlal_high_n_s16(a, b, c);
1610 // CHECK: smlal2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+\.h\[0\]|v[0-9]+\.8h}}
1611 }
1612
test_vmlal_high_n_s32(int64x2_t a,int32x4_t b,int32_t c)1613 int64x2_t test_vmlal_high_n_s32(int64x2_t a, int32x4_t b, int32_t c) {
1614 // CHECK-LABEL: test_vmlal_high_n_s32
1615 return vmlal_high_n_s32(a, b, c);
1616 // CHECK: smlal2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+\.s\[0\]|v[0-9]+\.4s}}
1617 }
1618
test_vmlal_high_n_u16(uint32x4_t a,uint16x8_t b,uint16_t c)1619 uint32x4_t test_vmlal_high_n_u16(uint32x4_t a, uint16x8_t b, uint16_t c) {
1620 // CHECK-LABEL: test_vmlal_high_n_u16
1621 return vmlal_high_n_u16(a, b, c);
1622 // CHECK: umlal2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+\.h\[0\]|v[0-9]+\.8h}}
1623 }
1624
test_vmlal_high_n_u32(uint64x2_t a,uint32x4_t b,uint32_t c)1625 uint64x2_t test_vmlal_high_n_u32(uint64x2_t a, uint32x4_t b, uint32_t c) {
1626 // CHECK-LABEL: test_vmlal_high_n_u32
1627 return vmlal_high_n_u32(a, b, c);
1628 // CHECK: umlal2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+\.s\[0\]|v[0-9]+\.4s}}
1629 }
1630
test_vqdmlal_high_n_s16(int32x4_t a,int16x8_t b,int16_t c)1631 int32x4_t test_vqdmlal_high_n_s16(int32x4_t a, int16x8_t b, int16_t c) {
1632 // CHECK-LABEL: test_vqdmlal_high_n_s16
1633 return vqdmlal_high_n_s16(a, b, c);
1634 // CHECK: sqdmlal2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+\.h\[0\]|v[0-9]+\.8h}}
1635 }
1636
test_vqdmlal_high_n_s32(int64x2_t a,int32x4_t b,int32_t c)1637 int64x2_t test_vqdmlal_high_n_s32(int64x2_t a, int32x4_t b, int32_t c) {
1638 // CHECK-LABEL: test_vqdmlal_high_n_s32
1639 return vqdmlal_high_n_s32(a, b, c);
1640 // CHECK: sqdmlal2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+\.s\[0\]|v[0-9]+\.4s}}
1641 }
1642
test_vmlsl_high_n_s16(int32x4_t a,int16x8_t b,int16_t c)1643 int32x4_t test_vmlsl_high_n_s16(int32x4_t a, int16x8_t b, int16_t c) {
1644 // CHECK-LABEL: test_vmlsl_high_n_s16
1645 return vmlsl_high_n_s16(a, b, c);
1646 // CHECK: smlsl2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+\.h\[0\]|v[0-9]+\.8h}}
1647 }
1648
test_vmlsl_high_n_s32(int64x2_t a,int32x4_t b,int32_t c)1649 int64x2_t test_vmlsl_high_n_s32(int64x2_t a, int32x4_t b, int32_t c) {
1650 // CHECK-LABEL: test_vmlsl_high_n_s32
1651 return vmlsl_high_n_s32(a, b, c);
1652 // CHECK: smlsl2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+\.s\[0\]|v[0-9]+\.4s}}
1653 }
1654
test_vmlsl_high_n_u16(uint32x4_t a,uint16x8_t b,uint16_t c)1655 uint32x4_t test_vmlsl_high_n_u16(uint32x4_t a, uint16x8_t b, uint16_t c) {
1656 // CHECK-LABEL: test_vmlsl_high_n_u16
1657 return vmlsl_high_n_u16(a, b, c);
1658 // CHECK: umlsl2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+\.h\[0\]|v[0-9]+\.8h}}
1659 }
1660
test_vmlsl_high_n_u32(uint64x2_t a,uint32x4_t b,uint32_t c)1661 uint64x2_t test_vmlsl_high_n_u32(uint64x2_t a, uint32x4_t b, uint32_t c) {
1662 // CHECK-LABEL: test_vmlsl_high_n_u32
1663 return vmlsl_high_n_u32(a, b, c);
1664 // CHECK: umlsl2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+\.s\[0\]|v[0-9]+\.4s}}
1665 }
1666
test_vqdmlsl_high_n_s16(int32x4_t a,int16x8_t b,int16_t c)1667 int32x4_t test_vqdmlsl_high_n_s16(int32x4_t a, int16x8_t b, int16_t c) {
1668 // CHECK-LABEL: test_vqdmlsl_high_n_s16
1669 return vqdmlsl_high_n_s16(a, b, c);
1670 // CHECK: sqdmlsl2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+\.h\[0\]|v[0-9]+\.8h}}
1671 }
1672
test_vqdmlsl_high_n_s32(int64x2_t a,int32x4_t b,int32_t c)1673 int64x2_t test_vqdmlsl_high_n_s32(int64x2_t a, int32x4_t b, int32_t c) {
1674 // CHECK-LABEL: test_vqdmlsl_high_n_s32
1675 return vqdmlsl_high_n_s32(a, b, c);
1676 // CHECK: sqdmlsl2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+\.s\[0\]|v[0-9]+\.4s}}
1677 }
1678
test_vmul_n_f32(float32x2_t a,float32_t b)1679 float32x2_t test_vmul_n_f32(float32x2_t a, float32_t b) {
1680 // CHECK-LABEL: test_vmul_n_f32
1681 return vmul_n_f32(a, b);
1682 // CHECK: fmul {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1683 }
1684
test_vmulq_n_f32(float32x4_t a,float32_t b)1685 float32x4_t test_vmulq_n_f32(float32x4_t a, float32_t b) {
1686 // CHECK-LABEL: test_vmulq_n_f32
1687 return vmulq_n_f32(a, b);
1688 // CHECK: fmul {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1689 }
1690
test_vmulq_n_f64(float64x2_t a,float64_t b)1691 float64x2_t test_vmulq_n_f64(float64x2_t a, float64_t b) {
1692 // CHECK-LABEL: test_vmulq_n_f64
1693 return vmulq_n_f64(a, b);
1694 // CHECK: fmul {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.d[0]
1695 }
1696
test_vfma_n_f32(float32x2_t a,float32x2_t b,float32_t n)1697 float32x2_t test_vfma_n_f32(float32x2_t a, float32x2_t b, float32_t n) {
1698 // CHECK-LABEL: test_vfma_n_f32
1699 return vfma_n_f32(a, b, n);
1700 // CHECK: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1701 }
1702
test_vfmaq_n_f32(float32x4_t a,float32x4_t b,float32_t n)1703 float32x4_t test_vfmaq_n_f32(float32x4_t a, float32x4_t b, float32_t n) {
1704 // CHECK-LABEL: test_vfmaq_n_f32
1705 return vfmaq_n_f32(a, b, n);
1706 // CHECK: fmla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1707 }
1708
test_vfms_n_f32(float32x2_t a,float32x2_t b,float32_t n)1709 float32x2_t test_vfms_n_f32(float32x2_t a, float32x2_t b, float32_t n) {
1710 // CHECK-LABEL: test_vfms_n_f32
1711 return vfms_n_f32(a, b, n);
1712 // CHECK: fmls {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
1713 }
1714
test_vfmsq_n_f32(float32x4_t a,float32x4_t b,float32_t n)1715 float32x4_t test_vfmsq_n_f32(float32x4_t a, float32x4_t b, float32_t n) {
1716 // CHECK-LABEL: test_vfmsq_n_f32
1717 return vfmsq_n_f32(a, b, n);
1718 // CHECK: fmls {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
1719 }
1720
test_vmul_n_s16(int16x4_t a,int16_t b)1721 int16x4_t test_vmul_n_s16(int16x4_t a, int16_t b) {
1722 // CHECK-LABEL: test_vmul_n_s16
1723 return vmul_n_s16(a, b);
1724 // CHECK: dup {{v[0-9]+}}.4h, w0
1725 // CHECK: mul {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1726 }
1727
test_vmulq_n_s16(int16x8_t a,int16_t b)1728 int16x8_t test_vmulq_n_s16(int16x8_t a, int16_t b) {
1729 // CHECK-LABEL: test_vmulq_n_s16
1730 return vmulq_n_s16(a, b);
1731 // CHECK: dup {{v[0-9]+}}.8h, w0
1732 // CHECK: mul {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1733 }
1734
test_vmul_n_s32(int32x2_t a,int32_t b)1735 int32x2_t test_vmul_n_s32(int32x2_t a, int32_t b) {
1736 // CHECK-LABEL: test_vmul_n_s32
1737 return vmul_n_s32(a, b);
1738 // CHECK: dup {{v[0-9]+}}.2s, w0
1739 // CHECK: mul {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
1740 }
1741
test_vmulq_n_s32(int32x4_t a,int32_t b)1742 int32x4_t test_vmulq_n_s32(int32x4_t a, int32_t b) {
1743 // CHECK-LABEL: test_vmulq_n_s32
1744 return vmulq_n_s32(a, b);
1745 // CHECK: dup {{v[0-9]+}}.4s, w0
1746 // CHECK: mul {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1747 }
1748
test_vmul_n_u16(uint16x4_t a,uint16_t b)1749 uint16x4_t test_vmul_n_u16(uint16x4_t a, uint16_t b) {
1750 // CHECK-LABEL: test_vmul_n_u16
1751 return vmul_n_u16(a, b);
1752 // CHECK: dup {{v[0-9]+}}.4h, w0
1753 // CHECK: mul {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1754 }
1755
test_vmulq_n_u16(uint16x8_t a,uint16_t b)1756 uint16x8_t test_vmulq_n_u16(uint16x8_t a, uint16_t b) {
1757 // CHECK-LABEL: test_vmulq_n_u16
1758 return vmulq_n_u16(a, b);
1759 // CHECK: dup {{v[0-9]+}}.8h, w0
1760 // CHECK: mul {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1761 }
1762
test_vmul_n_u32(uint32x2_t a,uint32_t b)1763 uint32x2_t test_vmul_n_u32(uint32x2_t a, uint32_t b) {
1764 // CHECK-LABEL: test_vmul_n_u32
1765 return vmul_n_u32(a, b);
1766 // CHECK: dup {{v[0-9]+}}.2s, w0
1767 // CHECK: mul {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
1768 }
1769
test_vmulq_n_u32(uint32x4_t a,uint32_t b)1770 uint32x4_t test_vmulq_n_u32(uint32x4_t a, uint32_t b) {
1771 // CHECK-LABEL: test_vmulq_n_u32
1772 return vmulq_n_u32(a, b);
1773 // CHECK: dup {{v[0-9]+}}.4s, w0
1774 // CHECK: mul {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1775 }
1776
test_vmull_n_s16(int16x4_t a,int16_t b)1777 int32x4_t test_vmull_n_s16(int16x4_t a, int16_t b) {
1778 // CHECK-LABEL: test_vmull_n_s16
1779 return vmull_n_s16(a, b);
1780 // CHECK: dup {{v[0-9]+}}.4h, w0
1781 // CHECK: smull {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1782 }
1783
test_vmull_n_s32(int32x2_t a,int32_t b)1784 int64x2_t test_vmull_n_s32(int32x2_t a, int32_t b) {
1785 // CHECK-LABEL: test_vmull_n_s32
1786 return vmull_n_s32(a, b);
1787 // CHECK: dup {{v[0-9]+}}.2s, w0
1788 // CHECK: smull {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
1789 }
1790
test_vmull_n_u16(uint16x4_t a,uint16_t b)1791 uint32x4_t test_vmull_n_u16(uint16x4_t a, uint16_t b) {
1792 // CHECK-LABEL: test_vmull_n_u16
1793 return vmull_n_u16(a, b);
1794 // CHECK: dup {{v[0-9]+}}.4h, w0
1795 // CHECK: umull {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1796 }
1797
test_vmull_n_u32(uint32x2_t a,uint32_t b)1798 uint64x2_t test_vmull_n_u32(uint32x2_t a, uint32_t b) {
1799 // CHECK-LABEL: test_vmull_n_u32
1800 return vmull_n_u32(a, b);
1801 // CHECK: dup {{v[0-9]+}}.2s, w0
1802 // CHECK: umull {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
1803 }
1804
test_vqdmull_n_s16(int16x4_t a,int16_t b)1805 int32x4_t test_vqdmull_n_s16(int16x4_t a, int16_t b) {
1806 // CHECK-LABEL: test_vqdmull_n_s16
1807 return vqdmull_n_s16(a, b);
1808 // CHECK: dup {{v[0-9]+}}.4h, w0
1809 // CHECK: sqdmull {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1810 }
1811
test_vqdmull_n_s32(int32x2_t a,int32_t b)1812 int64x2_t test_vqdmull_n_s32(int32x2_t a, int32_t b) {
1813 // CHECK-LABEL: test_vqdmull_n_s32
1814 return vqdmull_n_s32(a, b);
1815 // CHECK: dup {{v[0-9]+}}.2s, w0
1816 // CHECK: sqdmull {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
1817 }
1818
test_vqdmulh_n_s16(int16x4_t a,int16_t b)1819 int16x4_t test_vqdmulh_n_s16(int16x4_t a, int16_t b) {
1820 // CHECK-LABEL: test_vqdmulh_n_s16
1821 return vqdmulh_n_s16(a, b);
1822 // CHECK: dup {{v[0-9]+}}.4h, w0
1823 // CHECK: sqdmulh {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1824 }
1825
test_vqdmulhq_n_s16(int16x8_t a,int16_t b)1826 int16x8_t test_vqdmulhq_n_s16(int16x8_t a, int16_t b) {
1827 // CHECK-LABEL: test_vqdmulhq_n_s16
1828 return vqdmulhq_n_s16(a, b);
1829 // CHECK: dup {{v[0-9]+}}.8h, w0
1830 // CHECK: sqdmulh {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1831 }
1832
test_vqdmulh_n_s32(int32x2_t a,int32_t b)1833 int32x2_t test_vqdmulh_n_s32(int32x2_t a, int32_t b) {
1834 // CHECK-LABEL: test_vqdmulh_n_s32
1835 return vqdmulh_n_s32(a, b);
1836 // CHECK: dup {{v[0-9]+}}.2s, w0
1837 // CHECK: sqdmulh {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
1838 }
1839
test_vqdmulhq_n_s32(int32x4_t a,int32_t b)1840 int32x4_t test_vqdmulhq_n_s32(int32x4_t a, int32_t b) {
1841 // CHECK-LABEL: test_vqdmulhq_n_s32
1842 return vqdmulhq_n_s32(a, b);
1843 // CHECK: dup {{v[0-9]+}}.4s, w0
1844 // CHECK: sqdmulh {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1845 }
1846
test_vqrdmulh_n_s16(int16x4_t a,int16_t b)1847 int16x4_t test_vqrdmulh_n_s16(int16x4_t a, int16_t b) {
1848 // CHECK-LABEL: test_vqrdmulh_n_s16
1849 return vqrdmulh_n_s16(a, b);
1850 // CHECK: dup {{v[0-9]+}}.4h, w0
1851 // CHECK: sqrdmulh {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1852 }
1853
test_vqrdmulhq_n_s16(int16x8_t a,int16_t b)1854 int16x8_t test_vqrdmulhq_n_s16(int16x8_t a, int16_t b) {
1855 // CHECK-LABEL: test_vqrdmulhq_n_s16
1856 return vqrdmulhq_n_s16(a, b);
1857 // CHECK: dup {{v[0-9]+}}.8h, w0
1858 // CHECK: sqrdmulh {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1859 }
1860
test_vqrdmulh_n_s32(int32x2_t a,int32_t b)1861 int32x2_t test_vqrdmulh_n_s32(int32x2_t a, int32_t b) {
1862 // CHECK-LABEL: test_vqrdmulh_n_s32
1863 return vqrdmulh_n_s32(a, b);
1864 // CHECK: dup {{v[0-9]+}}.2s, w0
1865 // CHECK: sqrdmulh {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
1866 }
1867
test_vqrdmulhq_n_s32(int32x4_t a,int32_t b)1868 int32x4_t test_vqrdmulhq_n_s32(int32x4_t a, int32_t b) {
1869 // CHECK-LABEL: test_vqrdmulhq_n_s32
1870 return vqrdmulhq_n_s32(a, b);
1871 // CHECK: dup {{v[0-9]+}}.4s, w0
1872 // CHECK: sqrdmulh {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1873 }
1874
test_vmla_n_s16(int16x4_t a,int16x4_t b,int16_t c)1875 int16x4_t test_vmla_n_s16(int16x4_t a, int16x4_t b, int16_t c) {
1876 // CHECK-LABEL: test_vmla_n_s16
1877 return vmla_n_s16(a, b, c);
1878 // CHECK: dup {{v[0-9]+}}.4h, w0
1879 // CHECK: mla {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1880 }
1881
test_vmlaq_n_s16(int16x8_t a,int16x8_t b,int16_t c)1882 int16x8_t test_vmlaq_n_s16(int16x8_t a, int16x8_t b, int16_t c) {
1883 // CHECK-LABEL: test_vmlaq_n_s16
1884 return vmlaq_n_s16(a, b, c);
1885 // CHECK: dup {{v[0-9]+}}.8h, w0
1886 // CHECK: mla {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1887 }
1888
test_vmla_n_s32(int32x2_t a,int32x2_t b,int32_t c)1889 int32x2_t test_vmla_n_s32(int32x2_t a, int32x2_t b, int32_t c) {
1890 // CHECK-LABEL: test_vmla_n_s32
1891 return vmla_n_s32(a, b, c);
1892 // CHECK: dup {{v[0-9]+}}.2s, w0
1893 // CHECK: mla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
1894 }
1895
test_vmlaq_n_s32(int32x4_t a,int32x4_t b,int32_t c)1896 int32x4_t test_vmlaq_n_s32(int32x4_t a, int32x4_t b, int32_t c) {
1897 // CHECK-LABEL: test_vmlaq_n_s32
1898 return vmlaq_n_s32(a, b, c);
1899 // CHECK: dup {{v[0-9]+}}.4s, w0
1900 // CHECK: mla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1901 }
1902
test_vmla_n_u16(uint16x4_t a,uint16x4_t b,uint16_t c)1903 uint16x4_t test_vmla_n_u16(uint16x4_t a, uint16x4_t b, uint16_t c) {
1904 // CHECK-LABEL: test_vmla_n_u16
1905 return vmla_n_u16(a, b, c);
1906 // CHECK: dup {{v[0-9]+}}.4h, w0
1907 // CHECK: mla {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1908 }
1909
test_vmlaq_n_u16(uint16x8_t a,uint16x8_t b,uint16_t c)1910 uint16x8_t test_vmlaq_n_u16(uint16x8_t a, uint16x8_t b, uint16_t c) {
1911 // CHECK-LABEL: test_vmlaq_n_u16
1912 return vmlaq_n_u16(a, b, c);
1913 // CHECK: dup {{v[0-9]+}}.8h, w0
1914 // CHECK: mla {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1915 }
1916
test_vmla_n_u32(uint32x2_t a,uint32x2_t b,uint32_t c)1917 uint32x2_t test_vmla_n_u32(uint32x2_t a, uint32x2_t b, uint32_t c) {
1918 // CHECK-LABEL: test_vmla_n_u32
1919 return vmla_n_u32(a, b, c);
1920 // CHECK: dup {{v[0-9]+}}.2s, w0
1921 // CHECK: mla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
1922 }
1923
test_vmlaq_n_u32(uint32x4_t a,uint32x4_t b,uint32_t c)1924 uint32x4_t test_vmlaq_n_u32(uint32x4_t a, uint32x4_t b, uint32_t c) {
1925 // CHECK-LABEL: test_vmlaq_n_u32
1926 return vmlaq_n_u32(a, b, c);
1927 // CHECK: dup {{v[0-9]+}}.4s, w0
1928 // CHECK: mla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1929 }
1930
test_vmlal_n_s16(int32x4_t a,int16x4_t b,int16_t c)1931 int32x4_t test_vmlal_n_s16(int32x4_t a, int16x4_t b, int16_t c) {
1932 // CHECK-LABEL: test_vmlal_n_s16
1933 return vmlal_n_s16(a, b, c);
1934 // CHECK: dup {{v[0-9]+}}.4h, w0
1935 // CHECK: smlal {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1936 }
1937
test_vmlal_n_s32(int64x2_t a,int32x2_t b,int32_t c)1938 int64x2_t test_vmlal_n_s32(int64x2_t a, int32x2_t b, int32_t c) {
1939 // CHECK-LABEL: test_vmlal_n_s32
1940 return vmlal_n_s32(a, b, c);
1941 // CHECK: dup {{v[0-9]+}}.2s, w0
1942 // CHECK: smlal {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
1943 }
1944
test_vmlal_n_u16(uint32x4_t a,uint16x4_t b,uint16_t c)1945 uint32x4_t test_vmlal_n_u16(uint32x4_t a, uint16x4_t b, uint16_t c) {
1946 // CHECK-LABEL: test_vmlal_n_u16
1947 return vmlal_n_u16(a, b, c);
1948 // CHECK: dup {{v[0-9]+}}.4h, w0
1949 // CHECK: umlal {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1950 }
1951
test_vmlal_n_u32(uint64x2_t a,uint32x2_t b,uint32_t c)1952 uint64x2_t test_vmlal_n_u32(uint64x2_t a, uint32x2_t b, uint32_t c) {
1953 // CHECK-LABEL: test_vmlal_n_u32
1954 return vmlal_n_u32(a, b, c);
1955 // CHECK: dup {{v[0-9]+}}.2s, w0
1956 // CHECK: umlal {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
1957 }
1958
test_vqdmlal_n_s16(int32x4_t a,int16x4_t b,int16_t c)1959 int32x4_t test_vqdmlal_n_s16(int32x4_t a, int16x4_t b, int16_t c) {
1960 // CHECK-LABEL: test_vqdmlal_n_s16
1961 return vqdmlal_n_s16(a, b, c);
1962 // CHECK: dup {{v[0-9]+}}.4h, w0
1963 // CHECK: sqdmlal {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1964 }
1965
test_vqdmlal_n_s32(int64x2_t a,int32x2_t b,int32_t c)1966 int64x2_t test_vqdmlal_n_s32(int64x2_t a, int32x2_t b, int32_t c) {
1967 // CHECK-LABEL: test_vqdmlal_n_s32
1968 return vqdmlal_n_s32(a, b, c);
1969 // CHECK: dup {{v[0-9]+}}.2s, w0
1970 // CHECK: sqdmlal {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
1971 }
1972
test_vmls_n_s16(int16x4_t a,int16x4_t b,int16_t c)1973 int16x4_t test_vmls_n_s16(int16x4_t a, int16x4_t b, int16_t c) {
1974 // CHECK-LABEL: test_vmls_n_s16
1975 return vmls_n_s16(a, b, c);
1976 // CHECK: dup {{v[0-9]+}}.4h, w0
1977 // CHECK: mls {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1978 }
1979
test_vmlsq_n_s16(int16x8_t a,int16x8_t b,int16_t c)1980 int16x8_t test_vmlsq_n_s16(int16x8_t a, int16x8_t b, int16_t c) {
1981 // CHECK-LABEL: test_vmlsq_n_s16
1982 return vmlsq_n_s16(a, b, c);
1983 // CHECK: dup {{v[0-9]+}}.8h, w0
1984 // CHECK: mls {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1985 }
1986
test_vmls_n_s32(int32x2_t a,int32x2_t b,int32_t c)1987 int32x2_t test_vmls_n_s32(int32x2_t a, int32x2_t b, int32_t c) {
1988 // CHECK-LABEL: test_vmls_n_s32
1989 return vmls_n_s32(a, b, c);
1990 // CHECK: dup {{v[0-9]+}}.2s, w0
1991 // CHECK: mls {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
1992 }
1993
test_vmlsq_n_s32(int32x4_t a,int32x4_t b,int32_t c)1994 int32x4_t test_vmlsq_n_s32(int32x4_t a, int32x4_t b, int32_t c) {
1995 // CHECK-LABEL: test_vmlsq_n_s32
1996 return vmlsq_n_s32(a, b, c);
1997 // CHECK: mls {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1998 }
1999
test_vmls_n_u16(uint16x4_t a,uint16x4_t b,uint16_t c)2000 uint16x4_t test_vmls_n_u16(uint16x4_t a, uint16x4_t b, uint16_t c) {
2001 // CHECK-LABEL: test_vmls_n_u16
2002 return vmls_n_u16(a, b, c);
2003 // CHECK: dup {{v[0-9]+}}.4h, w0
2004 // CHECK: mls {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2005 }
2006
test_vmlsq_n_u16(uint16x8_t a,uint16x8_t b,uint16_t c)2007 uint16x8_t test_vmlsq_n_u16(uint16x8_t a, uint16x8_t b, uint16_t c) {
2008 // CHECK-LABEL: test_vmlsq_n_u16
2009 return vmlsq_n_u16(a, b, c);
2010 // CHECK: dup {{v[0-9]+}}.8h, w0
2011 // CHECK: mls {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2012 }
2013
test_vmls_n_u32(uint32x2_t a,uint32x2_t b,uint32_t c)2014 uint32x2_t test_vmls_n_u32(uint32x2_t a, uint32x2_t b, uint32_t c) {
2015 // CHECK-LABEL: test_vmls_n_u32
2016 return vmls_n_u32(a, b, c);
2017 // CHECK: dup {{v[0-9]+}}.2s, w0
2018 // CHECK: mls {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
2019 }
2020
test_vmlsq_n_u32(uint32x4_t a,uint32x4_t b,uint32_t c)2021 uint32x4_t test_vmlsq_n_u32(uint32x4_t a, uint32x4_t b, uint32_t c) {
2022 // CHECK-LABEL: test_vmlsq_n_u32
2023 return vmlsq_n_u32(a, b, c);
2024 // CHECK: mls {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2025 }
2026
test_vmlsl_n_s16(int32x4_t a,int16x4_t b,int16_t c)2027 int32x4_t test_vmlsl_n_s16(int32x4_t a, int16x4_t b, int16_t c) {
2028 // CHECK-LABEL: test_vmlsl_n_s16
2029 return vmlsl_n_s16(a, b, c);
2030 // CHECK: dup {{v[0-9]+}}.4h, w0
2031 // CHECK: smlsl {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2032 }
2033
test_vmlsl_n_s32(int64x2_t a,int32x2_t b,int32_t c)2034 int64x2_t test_vmlsl_n_s32(int64x2_t a, int32x2_t b, int32_t c) {
2035 // CHECK-LABEL: test_vmlsl_n_s32
2036 return vmlsl_n_s32(a, b, c);
2037 // CHECK: dup {{v[0-9]+}}.2s, w0
2038 // CHECK: smlsl {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
2039 }
2040
test_vmlsl_n_u16(uint32x4_t a,uint16x4_t b,uint16_t c)2041 uint32x4_t test_vmlsl_n_u16(uint32x4_t a, uint16x4_t b, uint16_t c) {
2042 // CHECK-LABEL: test_vmlsl_n_u16
2043 return vmlsl_n_u16(a, b, c);
2044 // CHECK: dup {{v[0-9]+}}.4h, w0
2045 // CHECK: umlsl {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2046 }
2047
test_vmlsl_n_u32(uint64x2_t a,uint32x2_t b,uint32_t c)2048 uint64x2_t test_vmlsl_n_u32(uint64x2_t a, uint32x2_t b, uint32_t c) {
2049 // CHECK-LABEL: test_vmlsl_n_u32
2050 return vmlsl_n_u32(a, b, c);
2051 // CHECK: dup {{v[0-9]+}}.2s, w0
2052 // CHECK: umlsl {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
2053 }
2054
test_vqdmlsl_n_s16(int32x4_t a,int16x4_t b,int16_t c)2055 int32x4_t test_vqdmlsl_n_s16(int32x4_t a, int16x4_t b, int16_t c) {
2056 // CHECK-LABEL: test_vqdmlsl_n_s16
2057 return vqdmlsl_n_s16(a, b, c);
2058 // CHECK: dup {{v[0-9]+}}.4h, w0
2059 // CHECK: sqdmlsl {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2060 }
2061
test_vqdmlsl_n_s32(int64x2_t a,int32x2_t b,int32_t c)2062 int64x2_t test_vqdmlsl_n_s32(int64x2_t a, int32x2_t b, int32_t c) {
2063 // CHECK-LABEL: test_vqdmlsl_n_s32
2064 return vqdmlsl_n_s32(a, b, c);
2065 // CHECK: dup {{v[0-9]+}}.2s, w0
2066 // CHECK: sqdmlsl {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
2067 }
2068
test_vmla_lane_u16_0(uint16x4_t a,uint16x4_t b,uint16x4_t v)2069 uint16x4_t test_vmla_lane_u16_0(uint16x4_t a, uint16x4_t b, uint16x4_t v) {
2070 // CHECK-LABEL: test_vmla_lane_u16_0
2071 return vmla_lane_u16(a, b, v, 0);
2072 // CHECK: mla {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
2073 }
2074
test_vmlaq_lane_u16_0(uint16x8_t a,uint16x8_t b,uint16x4_t v)2075 uint16x8_t test_vmlaq_lane_u16_0(uint16x8_t a, uint16x8_t b, uint16x4_t v) {
2076 // CHECK-LABEL: test_vmlaq_lane_u16_0
2077 return vmlaq_lane_u16(a, b, v, 0);
2078 // CHECK: mla {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
2079 }
2080
test_vmla_lane_u32_0(uint32x2_t a,uint32x2_t b,uint32x2_t v)2081 uint32x2_t test_vmla_lane_u32_0(uint32x2_t a, uint32x2_t b, uint32x2_t v) {
2082 // CHECK-LABEL: test_vmla_lane_u32_0
2083 return vmla_lane_u32(a, b, v, 0);
2084 // CHECK: mla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
2085 }
2086
test_vmlaq_lane_u32_0(uint32x4_t a,uint32x4_t b,uint32x2_t v)2087 uint32x4_t test_vmlaq_lane_u32_0(uint32x4_t a, uint32x4_t b, uint32x2_t v) {
2088 // CHECK-LABEL: test_vmlaq_lane_u32_0
2089 return vmlaq_lane_u32(a, b, v, 0);
2090 // CHECK: mla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
2091 }
2092
test_vmla_laneq_u16_0(uint16x4_t a,uint16x4_t b,uint16x8_t v)2093 uint16x4_t test_vmla_laneq_u16_0(uint16x4_t a, uint16x4_t b, uint16x8_t v) {
2094 // CHECK-LABEL: test_vmla_laneq_u16_0
2095 return vmla_laneq_u16(a, b, v, 0);
2096 // CHECK: mla {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
2097 }
2098
test_vmlaq_laneq_u16_0(uint16x8_t a,uint16x8_t b,uint16x8_t v)2099 uint16x8_t test_vmlaq_laneq_u16_0(uint16x8_t a, uint16x8_t b, uint16x8_t v) {
2100 // CHECK-LABEL: test_vmlaq_laneq_u16_0
2101 return vmlaq_laneq_u16(a, b, v, 0);
2102 // CHECK: mla {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
2103 }
2104
test_vmla_laneq_u32_0(uint32x2_t a,uint32x2_t b,uint32x4_t v)2105 uint32x2_t test_vmla_laneq_u32_0(uint32x2_t a, uint32x2_t b, uint32x4_t v) {
2106 // CHECK-LABEL: test_vmla_laneq_u32_0
2107 return vmla_laneq_u32(a, b, v, 0);
2108 // CHECK: mla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
2109 }
2110
test_vmlaq_laneq_u32_0(uint32x4_t a,uint32x4_t b,uint32x4_t v)2111 uint32x4_t test_vmlaq_laneq_u32_0(uint32x4_t a, uint32x4_t b, uint32x4_t v) {
2112 // CHECK-LABEL: test_vmlaq_laneq_u32_0
2113 return vmlaq_laneq_u32(a, b, v, 0);
2114 // CHECK: mla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
2115 }
2116
test_vqdmlal_laneq_s16_0(int32x4_t a,int16x4_t b,int16x8_t v)2117 int32x4_t test_vqdmlal_laneq_s16_0(int32x4_t a, int16x4_t b, int16x8_t v) {
2118 // CHECK-LABEL: test_vqdmlal_laneq_s16_0
2119 return vqdmlal_laneq_s16(a, b, v, 0);
2120 // CHECK: sqdmlal {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
2121 }
2122
test_vqdmlal_laneq_s32_0(int64x2_t a,int32x2_t b,int32x4_t v)2123 int64x2_t test_vqdmlal_laneq_s32_0(int64x2_t a, int32x2_t b, int32x4_t v) {
2124 // CHECK-LABEL: test_vqdmlal_laneq_s32_0
2125 return vqdmlal_laneq_s32(a, b, v, 0);
2126 // CHECK: sqdmlal {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
2127 }
2128
test_vqdmlal_high_laneq_s16_0(int32x4_t a,int16x8_t b,int16x8_t v)2129 int32x4_t test_vqdmlal_high_laneq_s16_0(int32x4_t a, int16x8_t b, int16x8_t v) {
2130 // CHECK-LABEL: test_vqdmlal_high_laneq_s16_0
2131 return vqdmlal_high_laneq_s16(a, b, v, 0);
2132 // CHECK: sqdmlal2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
2133 }
2134
test_vqdmlal_high_laneq_s32_0(int64x2_t a,int32x4_t b,int32x4_t v)2135 int64x2_t test_vqdmlal_high_laneq_s32_0(int64x2_t a, int32x4_t b, int32x4_t v) {
2136 // CHECK-LABEL: test_vqdmlal_high_laneq_s32_0
2137 return vqdmlal_high_laneq_s32(a, b, v, 0);
2138 // CHECK: sqdmlal2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
2139 }
2140
test_vmls_lane_u16_0(uint16x4_t a,uint16x4_t b,uint16x4_t v)2141 uint16x4_t test_vmls_lane_u16_0(uint16x4_t a, uint16x4_t b, uint16x4_t v) {
2142 // CHECK-LABEL: test_vmls_lane_u16_0
2143 return vmls_lane_u16(a, b, v, 0);
2144 // CHECK: mls {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
2145 }
2146
test_vmlsq_lane_u16_0(uint16x8_t a,uint16x8_t b,uint16x4_t v)2147 uint16x8_t test_vmlsq_lane_u16_0(uint16x8_t a, uint16x8_t b, uint16x4_t v) {
2148 // CHECK-LABEL: test_vmlsq_lane_u16_0
2149 return vmlsq_lane_u16(a, b, v, 0);
2150 // CHECK: mls {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
2151 }
2152
test_vmls_lane_u32_0(uint32x2_t a,uint32x2_t b,uint32x2_t v)2153 uint32x2_t test_vmls_lane_u32_0(uint32x2_t a, uint32x2_t b, uint32x2_t v) {
2154 // CHECK-LABEL: test_vmls_lane_u32_0
2155 return vmls_lane_u32(a, b, v, 0);
2156 // CHECK: mls {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
2157 }
2158
test_vmlsq_lane_u32_0(uint32x4_t a,uint32x4_t b,uint32x2_t v)2159 uint32x4_t test_vmlsq_lane_u32_0(uint32x4_t a, uint32x4_t b, uint32x2_t v) {
2160 // CHECK-LABEL: test_vmlsq_lane_u32_0
2161 return vmlsq_lane_u32(a, b, v, 0);
2162 // CHECK: mls {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
2163 }
2164
test_vmls_laneq_u16_0(uint16x4_t a,uint16x4_t b,uint16x8_t v)2165 uint16x4_t test_vmls_laneq_u16_0(uint16x4_t a, uint16x4_t b, uint16x8_t v) {
2166 // CHECK-LABEL: test_vmls_laneq_u16_0
2167 return vmls_laneq_u16(a, b, v, 0);
2168 // CHECK: mls {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
2169 }
2170
test_vmlsq_laneq_u16_0(uint16x8_t a,uint16x8_t b,uint16x8_t v)2171 uint16x8_t test_vmlsq_laneq_u16_0(uint16x8_t a, uint16x8_t b, uint16x8_t v) {
2172 // CHECK-LABEL: test_vmlsq_laneq_u16_0
2173 return vmlsq_laneq_u16(a, b, v, 0);
2174 // CHECK: mls {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
2175 }
2176
test_vmls_laneq_u32_0(uint32x2_t a,uint32x2_t b,uint32x4_t v)2177 uint32x2_t test_vmls_laneq_u32_0(uint32x2_t a, uint32x2_t b, uint32x4_t v) {
2178 // CHECK-LABEL: test_vmls_laneq_u32_0
2179 return vmls_laneq_u32(a, b, v, 0);
2180 // CHECK: mls {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
2181 }
2182
test_vmlsq_laneq_u32_0(uint32x4_t a,uint32x4_t b,uint32x4_t v)2183 uint32x4_t test_vmlsq_laneq_u32_0(uint32x4_t a, uint32x4_t b, uint32x4_t v) {
2184 // CHECK-LABEL: test_vmlsq_laneq_u32_0
2185 return vmlsq_laneq_u32(a, b, v, 0);
2186 // CHECK: mls {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
2187 }
2188
test_vqdmlsl_laneq_s16_0(int32x4_t a,int16x4_t b,int16x8_t v)2189 int32x4_t test_vqdmlsl_laneq_s16_0(int32x4_t a, int16x4_t b, int16x8_t v) {
2190 // CHECK-LABEL: test_vqdmlsl_laneq_s16_0
2191 return vqdmlsl_laneq_s16(a, b, v, 0);
2192 // CHECK: sqdmlsl {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
2193 }
2194
test_vqdmlsl_laneq_s32_0(int64x2_t a,int32x2_t b,int32x4_t v)2195 int64x2_t test_vqdmlsl_laneq_s32_0(int64x2_t a, int32x2_t b, int32x4_t v) {
2196 // CHECK-LABEL: test_vqdmlsl_laneq_s32_0
2197 return vqdmlsl_laneq_s32(a, b, v, 0);
2198 // CHECK: sqdmlsl {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
2199 }
2200
test_vqdmlsl_high_laneq_s16_0(int32x4_t a,int16x8_t b,int16x8_t v)2201 int32x4_t test_vqdmlsl_high_laneq_s16_0(int32x4_t a, int16x8_t b, int16x8_t v) {
2202 // CHECK-LABEL: test_vqdmlsl_high_laneq_s16_0
2203 return vqdmlsl_high_laneq_s16(a, b, v, 0);
2204 // CHECK: sqdmlsl2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
2205 }
2206
test_vqdmlsl_high_laneq_s32_0(int64x2_t a,int32x4_t b,int32x4_t v)2207 int64x2_t test_vqdmlsl_high_laneq_s32_0(int64x2_t a, int32x4_t b, int32x4_t v) {
2208 // CHECK-LABEL: test_vqdmlsl_high_laneq_s32_0
2209 return vqdmlsl_high_laneq_s32(a, b, v, 0);
2210 // CHECK: sqdmlsl2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
2211 }
2212
test_vqdmulh_laneq_s16_0(int16x4_t a,int16x8_t v)2213 int16x4_t test_vqdmulh_laneq_s16_0(int16x4_t a, int16x8_t v) {
2214 // CHECK-LABEL: test_vqdmulh_laneq_s16_0
2215 return vqdmulh_laneq_s16(a, v, 0);
2216 // CHECK: sqdmulh {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
2217 }
2218
test_vqdmulhq_laneq_s16_0(int16x8_t a,int16x8_t v)2219 int16x8_t test_vqdmulhq_laneq_s16_0(int16x8_t a, int16x8_t v) {
2220 // CHECK-LABEL: test_vqdmulhq_laneq_s16_0
2221 return vqdmulhq_laneq_s16(a, v, 0);
2222 // CHECK: sqdmulh {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
2223 }
2224
test_vqdmulh_laneq_s32_0(int32x2_t a,int32x4_t v)2225 int32x2_t test_vqdmulh_laneq_s32_0(int32x2_t a, int32x4_t v) {
2226 // CHECK-LABEL: test_vqdmulh_laneq_s32_0
2227 return vqdmulh_laneq_s32(a, v, 0);
2228 // CHECK: sqdmulh {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
2229 }
2230
test_vqdmulhq_laneq_s32_0(int32x4_t a,int32x4_t v)2231 int32x4_t test_vqdmulhq_laneq_s32_0(int32x4_t a, int32x4_t v) {
2232 // CHECK-LABEL: test_vqdmulhq_laneq_s32_0
2233 return vqdmulhq_laneq_s32(a, v, 0);
2234 // CHECK: sqdmulh {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
2235 }
2236
test_vqrdmulh_laneq_s16_0(int16x4_t a,int16x8_t v)2237 int16x4_t test_vqrdmulh_laneq_s16_0(int16x4_t a, int16x8_t v) {
2238 // CHECK-LABEL: test_vqrdmulh_laneq_s16_0
2239 return vqrdmulh_laneq_s16(a, v, 0);
2240 // CHECK: sqrdmulh {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[0]
2241 }
2242
test_vqrdmulhq_laneq_s16_0(int16x8_t a,int16x8_t v)2243 int16x8_t test_vqrdmulhq_laneq_s16_0(int16x8_t a, int16x8_t v) {
2244 // CHECK-LABEL: test_vqrdmulhq_laneq_s16_0
2245 return vqrdmulhq_laneq_s16(a, v, 0);
2246 // CHECK: sqrdmulh {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0]
2247 }
2248
test_vqrdmulh_laneq_s32_0(int32x2_t a,int32x4_t v)2249 int32x2_t test_vqrdmulh_laneq_s32_0(int32x2_t a, int32x4_t v) {
2250 // CHECK-LABEL: test_vqrdmulh_laneq_s32_0
2251 return vqrdmulh_laneq_s32(a, v, 0);
2252 // CHECK: sqrdmulh {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
2253 }
2254
test_vqrdmulhq_laneq_s32_0(int32x4_t a,int32x4_t v)2255 int32x4_t test_vqrdmulhq_laneq_s32_0(int32x4_t a, int32x4_t v) {
2256 // CHECK-LABEL: test_vqrdmulhq_laneq_s32_0
2257 return vqrdmulhq_laneq_s32(a, v, 0);
2258 // CHECK: sqrdmulh {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
2259 }
2260
test_vmla_lane_u16(uint16x4_t a,uint16x4_t b,uint16x4_t v)2261 uint16x4_t test_vmla_lane_u16(uint16x4_t a, uint16x4_t b, uint16x4_t v) {
2262 // CHECK-LABEL: test_vmla_lane_u16
2263 return vmla_lane_u16(a, b, v, 3);
2264 // CHECK: mla {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3]
2265 }
2266
test_vmlaq_lane_u16(uint16x8_t a,uint16x8_t b,uint16x4_t v)2267 uint16x8_t test_vmlaq_lane_u16(uint16x8_t a, uint16x8_t b, uint16x4_t v) {
2268 // CHECK-LABEL: test_vmlaq_lane_u16
2269 return vmlaq_lane_u16(a, b, v, 3);
2270 // CHECK: mla {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[3]
2271 }
2272
test_vmla_lane_u32(uint32x2_t a,uint32x2_t b,uint32x2_t v)2273 uint32x2_t test_vmla_lane_u32(uint32x2_t a, uint32x2_t b, uint32x2_t v) {
2274 // CHECK-LABEL: test_vmla_lane_u32
2275 return vmla_lane_u32(a, b, v, 1);
2276 // CHECK: mla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
2277 }
2278
test_vmlaq_lane_u32(uint32x4_t a,uint32x4_t b,uint32x2_t v)2279 uint32x4_t test_vmlaq_lane_u32(uint32x4_t a, uint32x4_t b, uint32x2_t v) {
2280 // CHECK-LABEL: test_vmlaq_lane_u32
2281 return vmlaq_lane_u32(a, b, v, 1);
2282 // CHECK: mla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
2283 }
2284
test_vmla_laneq_u16(uint16x4_t a,uint16x4_t b,uint16x8_t v)2285 uint16x4_t test_vmla_laneq_u16(uint16x4_t a, uint16x4_t b, uint16x8_t v) {
2286 // CHECK-LABEL: test_vmla_laneq_u16
2287 return vmla_laneq_u16(a, b, v, 7);
2288 // CHECK: mla {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[7]
2289 }
2290
test_vmlaq_laneq_u16(uint16x8_t a,uint16x8_t b,uint16x8_t v)2291 uint16x8_t test_vmlaq_laneq_u16(uint16x8_t a, uint16x8_t b, uint16x8_t v) {
2292 // CHECK-LABEL: test_vmlaq_laneq_u16
2293 return vmlaq_laneq_u16(a, b, v, 7);
2294 // CHECK: mla {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[7]
2295 }
2296
test_vmla_laneq_u32(uint32x2_t a,uint32x2_t b,uint32x4_t v)2297 uint32x2_t test_vmla_laneq_u32(uint32x2_t a, uint32x2_t b, uint32x4_t v) {
2298 // CHECK-LABEL: test_vmla_laneq_u32
2299 return vmla_laneq_u32(a, b, v, 3);
2300 // CHECK: mla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
2301 }
2302
test_vmlaq_laneq_u32(uint32x4_t a,uint32x4_t b,uint32x4_t v)2303 uint32x4_t test_vmlaq_laneq_u32(uint32x4_t a, uint32x4_t b, uint32x4_t v) {
2304 // CHECK-LABEL: test_vmlaq_laneq_u32
2305 return vmlaq_laneq_u32(a, b, v, 3);
2306 // CHECK: mla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
2307 }
2308
test_vqdmlal_laneq_s16(int32x4_t a,int16x4_t b,int16x8_t v)2309 int32x4_t test_vqdmlal_laneq_s16(int32x4_t a, int16x4_t b, int16x8_t v) {
2310 // CHECK-LABEL: test_vqdmlal_laneq_s16
2311 return vqdmlal_laneq_s16(a, b, v, 7);
2312 // CHECK: sqdmlal {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[7]
2313 }
2314
test_vqdmlal_laneq_s32(int64x2_t a,int32x2_t b,int32x4_t v)2315 int64x2_t test_vqdmlal_laneq_s32(int64x2_t a, int32x2_t b, int32x4_t v) {
2316 // CHECK-LABEL: test_vqdmlal_laneq_s32
2317 return vqdmlal_laneq_s32(a, b, v, 3);
2318 // CHECK: sqdmlal {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
2319 }
2320
test_vqdmlal_high_laneq_s16(int32x4_t a,int16x8_t b,int16x8_t v)2321 int32x4_t test_vqdmlal_high_laneq_s16(int32x4_t a, int16x8_t b, int16x8_t v) {
2322 // CHECK-LABEL: test_vqdmlal_high_laneq_s16
2323 return vqdmlal_high_laneq_s16(a, b, v, 7);
2324 // CHECK: sqdmlal2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[7]
2325 }
2326
test_vqdmlal_high_laneq_s32(int64x2_t a,int32x4_t b,int32x4_t v)2327 int64x2_t test_vqdmlal_high_laneq_s32(int64x2_t a, int32x4_t b, int32x4_t v) {
2328 // CHECK-LABEL: test_vqdmlal_high_laneq_s32
2329 return vqdmlal_high_laneq_s32(a, b, v, 3);
2330 // CHECK: sqdmlal2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
2331 }
2332
test_vmls_lane_u16(uint16x4_t a,uint16x4_t b,uint16x4_t v)2333 uint16x4_t test_vmls_lane_u16(uint16x4_t a, uint16x4_t b, uint16x4_t v) {
2334 // CHECK-LABEL: test_vmls_lane_u16
2335 return vmls_lane_u16(a, b, v, 3);
2336 // CHECK: mls {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3]
2337 }
2338
test_vmlsq_lane_u16(uint16x8_t a,uint16x8_t b,uint16x4_t v)2339 uint16x8_t test_vmlsq_lane_u16(uint16x8_t a, uint16x8_t b, uint16x4_t v) {
2340 // CHECK-LABEL: test_vmlsq_lane_u16
2341 return vmlsq_lane_u16(a, b, v, 3);
2342 // CHECK: mls {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[3]
2343 }
2344
test_vmls_lane_u32(uint32x2_t a,uint32x2_t b,uint32x2_t v)2345 uint32x2_t test_vmls_lane_u32(uint32x2_t a, uint32x2_t b, uint32x2_t v) {
2346 // CHECK-LABEL: test_vmls_lane_u32
2347 return vmls_lane_u32(a, b, v, 1);
2348 // CHECK: mls {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
2349 }
2350
test_vmlsq_lane_u32(uint32x4_t a,uint32x4_t b,uint32x2_t v)2351 uint32x4_t test_vmlsq_lane_u32(uint32x4_t a, uint32x4_t b, uint32x2_t v) {
2352 // CHECK-LABEL: test_vmlsq_lane_u32
2353 return vmlsq_lane_u32(a, b, v, 1);
2354 // CHECK: mls {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
2355 }
2356
test_vmls_laneq_u16(uint16x4_t a,uint16x4_t b,uint16x8_t v)2357 uint16x4_t test_vmls_laneq_u16(uint16x4_t a, uint16x4_t b, uint16x8_t v) {
2358 // CHECK-LABEL: test_vmls_laneq_u16
2359 return vmls_laneq_u16(a, b, v, 7);
2360 // CHECK: mls {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[7]
2361 }
2362
test_vmlsq_laneq_u16(uint16x8_t a,uint16x8_t b,uint16x8_t v)2363 uint16x8_t test_vmlsq_laneq_u16(uint16x8_t a, uint16x8_t b, uint16x8_t v) {
2364 // CHECK-LABEL: test_vmlsq_laneq_u16
2365 return vmlsq_laneq_u16(a, b, v, 7);
2366 // CHECK: mls {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[7]
2367 }
2368
test_vmls_laneq_u32(uint32x2_t a,uint32x2_t b,uint32x4_t v)2369 uint32x2_t test_vmls_laneq_u32(uint32x2_t a, uint32x2_t b, uint32x4_t v) {
2370 // CHECK-LABEL: test_vmls_laneq_u32
2371 return vmls_laneq_u32(a, b, v, 3);
2372 // CHECK: mls {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
2373 }
2374
test_vmlsq_laneq_u32(uint32x4_t a,uint32x4_t b,uint32x4_t v)2375 uint32x4_t test_vmlsq_laneq_u32(uint32x4_t a, uint32x4_t b, uint32x4_t v) {
2376 // CHECK-LABEL: test_vmlsq_laneq_u32
2377 return vmlsq_laneq_u32(a, b, v, 3);
2378 // CHECK: mls {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
2379 }
2380
test_vqdmlsl_laneq_s16(int32x4_t a,int16x4_t b,int16x8_t v)2381 int32x4_t test_vqdmlsl_laneq_s16(int32x4_t a, int16x4_t b, int16x8_t v) {
2382 // CHECK-LABEL: test_vqdmlsl_laneq_s16
2383 return vqdmlsl_laneq_s16(a, b, v, 7);
2384 // CHECK: sqdmlsl {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[7]
2385 }
2386
test_vqdmlsl_laneq_s32(int64x2_t a,int32x2_t b,int32x4_t v)2387 int64x2_t test_vqdmlsl_laneq_s32(int64x2_t a, int32x2_t b, int32x4_t v) {
2388 // CHECK-LABEL: test_vqdmlsl_laneq_s32
2389 return vqdmlsl_laneq_s32(a, b, v, 3);
2390 // CHECK: sqdmlsl {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
2391 }
2392
test_vqdmlsl_high_laneq_s16(int32x4_t a,int16x8_t b,int16x8_t v)2393 int32x4_t test_vqdmlsl_high_laneq_s16(int32x4_t a, int16x8_t b, int16x8_t v) {
2394 // CHECK-LABEL: test_vqdmlsl_high_laneq_s16
2395 return vqdmlsl_high_laneq_s16(a, b, v, 7);
2396 // CHECK: sqdmlsl2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[7]
2397 }
2398
test_vqdmlsl_high_laneq_s32(int64x2_t a,int32x4_t b,int32x4_t v)2399 int64x2_t test_vqdmlsl_high_laneq_s32(int64x2_t a, int32x4_t b, int32x4_t v) {
2400 // CHECK-LABEL: test_vqdmlsl_high_laneq_s32
2401 return vqdmlsl_high_laneq_s32(a, b, v, 3);
2402 // CHECK: sqdmlsl2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
2403 }
2404
test_vqdmulh_laneq_s16(int16x4_t a,int16x8_t v)2405 int16x4_t test_vqdmulh_laneq_s16(int16x4_t a, int16x8_t v) {
2406 // CHECK-LABEL: test_vqdmulh_laneq_s16
2407 return vqdmulh_laneq_s16(a, v, 7);
2408 // CHECK: sqdmulh {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[7]
2409 }
2410
test_vqdmulhq_laneq_s16(int16x8_t a,int16x8_t v)2411 int16x8_t test_vqdmulhq_laneq_s16(int16x8_t a, int16x8_t v) {
2412 // CHECK-LABEL: test_vqdmulhq_laneq_s16
2413 return vqdmulhq_laneq_s16(a, v, 7);
2414 // CHECK: sqdmulh {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[7]
2415 }
2416
test_vqdmulh_laneq_s32(int32x2_t a,int32x4_t v)2417 int32x2_t test_vqdmulh_laneq_s32(int32x2_t a, int32x4_t v) {
2418 // CHECK-LABEL: test_vqdmulh_laneq_s32
2419 return vqdmulh_laneq_s32(a, v, 3);
2420 // CHECK: sqdmulh {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
2421 }
2422
test_vqdmulhq_laneq_s32(int32x4_t a,int32x4_t v)2423 int32x4_t test_vqdmulhq_laneq_s32(int32x4_t a, int32x4_t v) {
2424 // CHECK-LABEL: test_vqdmulhq_laneq_s32
2425 return vqdmulhq_laneq_s32(a, v, 3);
2426 // CHECK: sqdmulh {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
2427 }
2428
test_vqrdmulh_laneq_s16(int16x4_t a,int16x8_t v)2429 int16x4_t test_vqrdmulh_laneq_s16(int16x4_t a, int16x8_t v) {
2430 // CHECK-LABEL: test_vqrdmulh_laneq_s16
2431 return vqrdmulh_laneq_s16(a, v, 7);
2432 // CHECK: sqrdmulh {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[7]
2433 }
2434
test_vqrdmulhq_laneq_s16(int16x8_t a,int16x8_t v)2435 int16x8_t test_vqrdmulhq_laneq_s16(int16x8_t a, int16x8_t v) {
2436 // CHECK-LABEL: test_vqrdmulhq_laneq_s16
2437 return vqrdmulhq_laneq_s16(a, v, 7);
2438 // CHECK: sqrdmulh {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[7]
2439 }
2440
test_vqrdmulh_laneq_s32(int32x2_t a,int32x4_t v)2441 int32x2_t test_vqrdmulh_laneq_s32(int32x2_t a, int32x4_t v) {
2442 // CHECK-LABEL: test_vqrdmulh_laneq_s32
2443 return vqrdmulh_laneq_s32(a, v, 3);
2444 // CHECK: sqrdmulh {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
2445 }
2446
test_vqrdmulhq_laneq_s32(int32x4_t a,int32x4_t v)2447 int32x4_t test_vqrdmulhq_laneq_s32(int32x4_t a, int32x4_t v) {
2448 // CHECK-LABEL: test_vqrdmulhq_laneq_s32
2449 return vqrdmulhq_laneq_s32(a, v, 3);
2450 // CHECK: sqrdmulh {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
2451 }
2452
2453