1 /******************************************************************************
2 *
3 * Copyright (C) 2012 Ittiam Systems Pvt Ltd, Bangalore
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 ******************************************************************************/
18 /**
19 *******************************************************************************
20 * @file
21 *  ihevcd_defs.h
22 *
23 * @brief
24 *  Definitions used in the decoder
25 *
26 * @author
27 *  Harish
28 *
29 * @par List of Functions:
30 *
31 * @remarks
32 *  None
33 *
34 *******************************************************************************
35 */
36 
37 #ifndef _IHEVCD_DEFS_H_
38 #define _IHEVCD_DEFS_H_
39 
40 
41 /*****************************************************************************/
42 /* Width and height restrictions                                             */
43 /*****************************************************************************/
44 /**
45  * Minimum width supported by codec
46  */
47 #define MIN_WD   64
48 
49 /**
50  * Maximum width supported by codec
51  */
52 
53 #define MAX_WD   8448
54 
55 /**
56  * Minimum height supported by codec
57  */
58 #define MIN_HT   64
59 
60 /**
61  * Maximum height supported by codec
62  */
63 
64 #define MAX_HT   4320
65 
66 /*****************************************************************************/
67 /* Padding sizes                                                             */
68 /*****************************************************************************/
69 /**
70  * Padding used for top of the frame
71  */
72 #define PAD_TOP     80
73 
74 /**
75  * Padding used for bottom of the frame
76  */
77 #define PAD_BOT     80
78 
79 /**
80  * Padding used at left of the frame
81  */
82 #define PAD_LEFT    80
83 
84 /**
85  * Padding used at right of the frame
86  */
87 #define PAD_RIGHT   80
88 /**
89  * Padding for width
90  */
91 #define PAD_WD      (PAD_LEFT + PAD_RIGHT)
92 /**
93  * Padding for height
94  */
95 #define PAD_HT      (PAD_TOP  + PAD_BOT)
96 
97 /*****************************************************************************/
98 /* Number of frame restrictions                                              */
99 /*****************************************************************************/
100 /**
101  *  Maximum number of reference buffers in DPB manager
102  */
103 #define MAX_REF_CNT  32
104 
105 /*****************************************************************************/
106 /* Num cores releated defs                                                   */
107 /*****************************************************************************/
108 /**
109  *  Maximum number of cores
110  */
111 #define MAX_NUM_CORES       8
112 
113 /**
114  *  Maximum number of threads for pixel processing
115  */
116 #define MAX_PROCESS_THREADS MAX_NUM_CORES
117 
118 /** If num_cores is greater than MV_PRED_NUM_CORES_THRESHOLD, then mv pred and
119     boundary strength computation is done in process side instead of parse side.
120     This ensures thread that does parsing does minimal work */
121 #define MV_PRED_NUM_CORES_THRESHOLD 2
122 
123 /*****************************************************************************/
124 /* Profile and level restrictions                                            */
125 /*****************************************************************************/
126 /**
127  * Max level supported by the codec
128  */
129 #define MAX_LEVEL  IHEVC_LEVEL_62
130 /**
131  * Min level supported by the codec
132  */
133 
134 #define MIN_LEVEL  IHEVC_LEVEL_10
135 
136 
137 /**
138  * Maximum number of slice headers that are held in memory simultaneously
139  * For single core implementation only 1 slice header is enough.
140  * But for multi-core parsing thread needs to ensure that slice headers are
141  * stored till the last CB in a slice is decoded.
142  * Parsing thread has to wait till last CB of a slice is consumed before reusing
143  * overwriting the slice header
144  * MAX_SLICE_HDR_CNT is assumed to be a power of 2
145  */
146 
147 #define LOG2_MAX_SLICE_HDR_CNT 8
148 #define MAX_SLICE_HDR_CNT (1 << LOG2_MAX_SLICE_HDR_CNT)
149 
150 /* Number of NOP instructions to wait before yielding in process thread */
151 #define PROC_NOP_CNT (8 * 128)
152 
153 
154 /** Max QP delta that can be signalled */
155 #define TU_MAX_QP_DELTA_ABS     5
156 
157 /** Max QP delta context increment that can be used for CABAC context */
158 #define CTXT_MAX_QP_DELTA_ABS   1
159 
160 /*
161  * Flag whether to perform ilf at frame level or CTB level
162  */
163 #define FRAME_ILF_PAD 0
164 
165 #define MAX_NUM_CTBS_IN_FRAME (MAX_WD * MAX_HT / MIN_CTB_SIZE / MIN_CTB_SIZE)
166 
167 /* Maximum slice segments allowed per frame in Level 6.2 */
168 #define MAX_SLICE_SEGMENTS_IN_FRAME 600
169 
170 /**
171  * Buffer allocated for ps_tu is re-used after RESET_TU_BUF_NCTB
172  * Set this to MAX_NUM_CTBS_IN_FRAME to disabke reuse
173  */
174 #define RESET_TU_BUF_NCTB MAX_NUM_CTBS_IN_FRAME
175 /**
176  * Flag whether to shift the CTB for SAO
177  */
178 #define SAO_PROCESS_SHIFT_CTB 1
179 
180 /**
181  * Minimum bistream buffer size
182  */
183 #define MIN_BITSBUF_SIZE (1024 * 1024)
184 /**
185  *****************************************************************************
186  * Macro to compute total size required to hold on set of scaling matrices
187  *****************************************************************************
188  */
189 #define SCALING_MAT_SIZE(m_scaling_mat_size)                                 \
190 {                                                                            \
191     m_scaling_mat_size = 6 * TRANS_SIZE_4 * TRANS_SIZE_4;                    \
192     m_scaling_mat_size += 6 * TRANS_SIZE_8 * TRANS_SIZE_8;                   \
193     m_scaling_mat_size += 6 * TRANS_SIZE_16 * TRANS_SIZE_16;                 \
194     m_scaling_mat_size += 2 * TRANS_SIZE_32 * TRANS_SIZE_32;                 \
195 }
196 
197 /**
198  ***************************************************************************
199  * Enum to hold various mem records being request
200  ****************************************************************************
201  */
202 enum
203 {
204     /**
205      * Codec Object at API level
206      */
207     MEM_REC_IV_OBJ,
208 
209     /**
210      * Codec context
211      */
212     MEM_REC_CODEC,
213 
214     /**
215      * Bitstream buffer which holds emulation prevention removed bytes
216      */
217     MEM_REC_BITSBUF,
218 
219     /**
220      * Buffer to hold TU structures and coeff data
221      */
222     MEM_REC_TU_DATA,
223 
224     /**
225      * Motion vector bank
226      */
227     MEM_REC_MVBANK,
228 
229     /**
230      * Holds mem records passed to the codec.
231      */
232     MEM_REC_BACKUP,
233 
234     /**
235      * Holds VPS
236      */
237     MEM_REC_VPS,
238 
239     /**
240      * Holds SPS
241      */
242     MEM_REC_SPS,
243 
244     /**
245      * Holds PPS
246      */
247     MEM_REC_PPS,
248 
249     /**
250      * Holds Slice Headers
251      */
252     MEM_REC_SLICE_HDR,
253 
254     /**
255      * Holds tile information such as start position, widths and heights
256      */
257     MEM_REC_TILE,
258 
259     /**
260      * Holds entry point offsets for tiles and entropy sync points
261      */
262     MEM_REC_ENTRY_OFST,
263 
264     /**
265      * Holds scaling matrices
266      */
267     MEM_REC_SCALING_MAT,
268 
269     /**
270      * Holds one row skip_flag at 8x8 level used during parsing
271      */
272     MEM_REC_PARSE_SKIP_FLAG,
273 
274     /**
275      * Holds one row ctb_tree_depth at 8x8 level used during parsing
276      */
277     MEM_REC_PARSE_CT_DEPTH,
278 
279     /**
280      * Holds one row luma intra pred mode at 8x8 level used during parsing
281      */
282     MEM_REC_PARSE_INTRA_PRED_MODE,
283 
284     /**
285      * Holds intra flag at 8x8 level for entire frame
286      * This is kept at frame level so that processing thread also can use this
287      * data during intra prediction and compute BS
288      */
289     MEM_REC_INTRA_FLAG,
290 
291     /**
292      * Holds transquant bypass flag at 8x8 level for entire frame
293      * This is kept at frame level so that processing thread also can use this
294      */
295     MEM_REC_TRANSQUANT_BYPASS_FLAG,
296 
297     /**
298      * Holds thread handles
299      */
300     MEM_REC_THREAD_HANDLE,
301 
302     /**
303      * Holds memory for Process JOB Queue
304      */
305     MEM_REC_PROC_JOBQ,
306 
307     /**
308      * Contains status map indicating parse status per CTB basis
309      */
310     MEM_REC_PARSE_MAP,
311 
312     /**
313      * Contains status map indicating processing status per CTB basis
314      */
315     MEM_REC_PROC_MAP,
316 
317     /**
318      * Holds display buffer manager context
319      */
320     MEM_REC_DISP_MGR,
321 
322     /**
323      * Holds dpb manager context
324      */
325     MEM_REC_DPB_MGR,
326 
327     /**
328      * Holds top and left neighbors' pu_idx array w.r.t picture level pu array
329      */
330     MEM_REC_PIC_PU_IDX_NEIGHBOR,
331 
332     /**
333      * Holds intermediate buffers needed during processing stage
334      * Memory for process contexts is allocated in this memtab
335      */
336     MEM_REC_PROC_SCRATCH,
337 
338     /**
339      * Holds intermediate buffers needed during SAO processing
340      */
341     MEM_REC_SAO_SCRATCH,
342 
343     /**
344      * Holds buffers for vert_bs, horz_bs and QP (all frame level)
345      */
346     MEM_REC_BS_QP,
347 
348     /**
349      * Contains slice map indicatating the slice index for each CTB
350      */
351     MEM_REC_TILE_IDX,
352 
353     /**
354      * Holds buffers for array of SAO structures
355      */
356     MEM_REC_SAO,
357 
358     /**
359      * Holds picture buffer manager context and array of pic_buf_ts
360      * Also holds reference picture buffers in non-shared mode
361      */
362     MEM_REC_REF_PIC,
363 
364 
365 
366     /**
367      * Place holder to compute number of memory records.
368      */
369     MEM_REC_CNT
370     /* Do not add anything below */
371 };
372 
373 
374 
375 #define DISABLE_DEBLOCK_INTERVAL 8
376 #define DISABLE_SAO_INTERVAL 8
377 
378 /**
379  ****************************************************************************
380  * Disable deblock levels
381  * Level 0 enables deblocking completely and level 4 disables completely
382  * Other levels are intermediate values to control deblocking level
383  ****************************************************************************
384  */
385 enum
386 {
387     /**
388      * Enable deblocking completely
389      */
390     DISABLE_DEBLK_LEVEL_0,
391     /**
392      * Disable only within CTB edges - Not supported currently
393      */
394     DISABLE_DEBLK_LEVEL_1,
395 
396     /**
397      * Enable deblocking once in DEBLOCK_INTERVAL number of pictures
398      * and for I slices
399      */
400     DISABLE_DEBLK_LEVEL_2,
401 
402     /**
403      * Enable deblocking only for I slices
404      */
405     DISABLE_DEBLK_LEVEL_3,
406 
407     /**
408      * Disable deblocking completely
409      */
410     DISABLE_DEBLK_LEVEL_4
411 };
412 
413 enum
414 {
415     /**
416      * Enable deblocking completely
417      */
418     DISABLE_SAO_LEVEL_0,
419     /**
420      * Disable only within CTB edges - Not supported currently
421      */
422     DISABLE_SAO_LEVEL_1,
423 
424     /**
425      * Enable deblocking once in DEBLOCK_INTERVAL number of pictures
426      * and for I slices
427      */
428     DISABLE_SAO_LEVEL_2,
429 
430     /**
431      * Enable deblocking only for I slices
432      */
433     DISABLE_SAO_LEVEL_3,
434 
435     /**
436      * Disable deblocking completely
437      */
438     DISABLE_SAO_LEVEL_4
439 };
440 
441 /**
442  ****************************************************************************
443  * Number of buffers for I/O based on format
444  ****************************************************************************
445  */
446 #define MIN_IN_BUFS             1
447 #define MIN_OUT_BUFS_420        3
448 #define MIN_OUT_BUFS_422ILE     1
449 #define MIN_OUT_BUFS_RGB565     1
450 #define MIN_OUT_BUFS_RGBA8888   1
451 #define MIN_OUT_BUFS_420SP      2
452 
453 /**
454  ****************************************************************************
455  * Definitions related to MV pred mv merge
456  ****************************************************************************
457  */
458 #define MAX_NUM_MERGE_CAND 5
459 
460 #define MAX_NUM_MV_NBR 5
461 
462 #define MAX_MVP_LIST_CAND 2
463 #define MAX_MVP_LIST_CAND_MEM  (MAX_MVP_LIST_CAND + 1)
464 
465 
466 
467 #endif /*_IHEVCD_DEFS_H_*/
468