1 /* libunwind - a platform-independent unwind library
2 Copyright (C) 2002-2005 Hewlett-Packard Co
3 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
4
5 This file is part of libunwind.
6
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
14
15 The above copyright notice and this permission notice shall be
16 included in all copies or substantial portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
21 NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
25
26 #include "unwind_i.h"
27
28 static ALWAYS_INLINE int
common_init(struct cursor * c,unw_word_t sp,unw_word_t bsp)29 common_init (struct cursor *c, unw_word_t sp, unw_word_t bsp)
30 {
31 unw_word_t bspstore, rbs_base;
32 int ret;
33
34 if (c->as->caching_policy != UNW_CACHE_NONE)
35 /* ensure cache doesn't have any stale contents: */
36 ia64_validate_cache (c->as, c->as_arg);
37
38 c->cfm_loc = IA64_REG_LOC (c, UNW_IA64_CFM);
39 c->loc[IA64_REG_BSP] = IA64_NULL_LOC;
40 c->loc[IA64_REG_BSPSTORE] = IA64_REG_LOC (c, UNW_IA64_AR_BSPSTORE);
41 c->loc[IA64_REG_PFS] = IA64_REG_LOC (c, UNW_IA64_AR_PFS);
42 c->loc[IA64_REG_RNAT] = IA64_REG_LOC (c, UNW_IA64_AR_RNAT);
43 c->loc[IA64_REG_IP] = IA64_REG_LOC (c, UNW_IA64_IP);
44 c->loc[IA64_REG_PRI_UNAT_MEM] = IA64_NULL_LOC; /* no primary UNaT location */
45 c->loc[IA64_REG_UNAT] = IA64_REG_LOC (c, UNW_IA64_AR_UNAT);
46 c->loc[IA64_REG_PR] = IA64_REG_LOC (c, UNW_IA64_PR);
47 c->loc[IA64_REG_LC] = IA64_REG_LOC (c, UNW_IA64_AR_LC);
48 c->loc[IA64_REG_FPSR] = IA64_REG_LOC (c, UNW_IA64_AR_FPSR);
49
50 c->loc[IA64_REG_R4] = IA64_REG_LOC (c, UNW_IA64_GR + 4);
51 c->loc[IA64_REG_R5] = IA64_REG_LOC (c, UNW_IA64_GR + 5);
52 c->loc[IA64_REG_R6] = IA64_REG_LOC (c, UNW_IA64_GR + 6);
53 c->loc[IA64_REG_R7] = IA64_REG_LOC (c, UNW_IA64_GR + 7);
54
55 c->loc[IA64_REG_NAT4] = IA64_REG_NAT_LOC (c, UNW_IA64_NAT + 4, &c->nat_bitnr[0]);
56 c->loc[IA64_REG_NAT5] = IA64_REG_NAT_LOC (c, UNW_IA64_NAT + 5, &c->nat_bitnr[1]);
57 c->loc[IA64_REG_NAT6] = IA64_REG_NAT_LOC (c, UNW_IA64_NAT + 6, &c->nat_bitnr[2]);
58 c->loc[IA64_REG_NAT7] = IA64_REG_NAT_LOC (c, UNW_IA64_NAT + 7, &c->nat_bitnr[3]);
59
60 c->loc[IA64_REG_B1] = IA64_REG_LOC (c, UNW_IA64_BR + 1);
61 c->loc[IA64_REG_B2] = IA64_REG_LOC (c, UNW_IA64_BR + 2);
62 c->loc[IA64_REG_B3] = IA64_REG_LOC (c, UNW_IA64_BR + 3);
63 c->loc[IA64_REG_B4] = IA64_REG_LOC (c, UNW_IA64_BR + 4);
64 c->loc[IA64_REG_B5] = IA64_REG_LOC (c, UNW_IA64_BR + 5);
65
66 c->loc[IA64_REG_F2] = IA64_FPREG_LOC (c, UNW_IA64_FR + 2);
67 c->loc[IA64_REG_F3] = IA64_FPREG_LOC (c, UNW_IA64_FR + 3);
68 c->loc[IA64_REG_F4] = IA64_FPREG_LOC (c, UNW_IA64_FR + 4);
69 c->loc[IA64_REG_F5] = IA64_FPREG_LOC (c, UNW_IA64_FR + 5);
70 c->loc[IA64_REG_F16] = IA64_FPREG_LOC (c, UNW_IA64_FR + 16);
71 c->loc[IA64_REG_F17] = IA64_FPREG_LOC (c, UNW_IA64_FR + 17);
72 c->loc[IA64_REG_F18] = IA64_FPREG_LOC (c, UNW_IA64_FR + 18);
73 c->loc[IA64_REG_F19] = IA64_FPREG_LOC (c, UNW_IA64_FR + 19);
74 c->loc[IA64_REG_F20] = IA64_FPREG_LOC (c, UNW_IA64_FR + 20);
75 c->loc[IA64_REG_F21] = IA64_FPREG_LOC (c, UNW_IA64_FR + 21);
76 c->loc[IA64_REG_F22] = IA64_FPREG_LOC (c, UNW_IA64_FR + 22);
77 c->loc[IA64_REG_F23] = IA64_FPREG_LOC (c, UNW_IA64_FR + 23);
78 c->loc[IA64_REG_F24] = IA64_FPREG_LOC (c, UNW_IA64_FR + 24);
79 c->loc[IA64_REG_F25] = IA64_FPREG_LOC (c, UNW_IA64_FR + 25);
80 c->loc[IA64_REG_F26] = IA64_FPREG_LOC (c, UNW_IA64_FR + 26);
81 c->loc[IA64_REG_F27] = IA64_FPREG_LOC (c, UNW_IA64_FR + 27);
82 c->loc[IA64_REG_F28] = IA64_FPREG_LOC (c, UNW_IA64_FR + 28);
83 c->loc[IA64_REG_F29] = IA64_FPREG_LOC (c, UNW_IA64_FR + 29);
84 c->loc[IA64_REG_F30] = IA64_FPREG_LOC (c, UNW_IA64_FR + 30);
85 c->loc[IA64_REG_F31] = IA64_FPREG_LOC (c, UNW_IA64_FR + 31);
86
87 ret = ia64_get (c, c->loc[IA64_REG_IP], &c->ip);
88 if (ret < 0)
89 return ret;
90
91 ret = ia64_get (c, c->cfm_loc, &c->cfm);
92 if (ret < 0)
93 return ret;
94
95 ret = ia64_get (c, c->loc[IA64_REG_PR], &c->pr);
96 if (ret < 0)
97 return ret;
98
99 c->sp = c->psp = sp;
100 c->bsp = bsp;
101
102 ret = ia64_get (c, c->loc[IA64_REG_BSPSTORE], &bspstore);
103 if (ret < 0)
104 return ret;
105
106 c->rbs_curr = c->rbs_left_edge = 0;
107
108 /* Try to find a base of the register backing-store. We may default
109 to a reasonable value (e.g., half the address-space down from
110 bspstore). If the BSPSTORE looks corrupt, we fail. */
111 if ((ret = rbs_get_base (c, bspstore, &rbs_base)) < 0)
112 return ret;
113
114 c->rbs_area[0].end = bspstore;
115 c->rbs_area[0].size = bspstore - rbs_base;
116 c->rbs_area[0].rnat_loc = IA64_REG_LOC (c, UNW_IA64_AR_RNAT);
117 Debug (10, "initial rbs-area: [0x%llx-0x%llx), rnat@%s\n",
118 (long long) rbs_base, (long long) c->rbs_area[0].end,
119 ia64_strloc (c->rbs_area[0].rnat_loc));
120
121 c->pi.flags = 0;
122
123 c->sigcontext_addr = 0;
124 c->abi_marker = 0;
125 c->last_abi_marker = 0;
126
127 c->hint = 0;
128 c->prev_script = 0;
129 c->eh_valid_mask = 0;
130 c->pi_valid = 0;
131 return 0;
132 }
133