1 /*
2  *  Copyright 2012 The LibYuv Project Authors. All rights reserved.
3  *
4  *  Use of this source code is governed by a BSD-style license
5  *  that can be found in the LICENSE file in the root of the source
6  *  tree. An additional intellectual property rights grant can be found
7  *  in the file PATENTS.  All contributing project authors may
8  *  be found in the AUTHORS file in the root of the source tree.
9  */
10 
11 #include <stdlib.h>
12 #include <string.h>
13 
14 #include "libyuv/basic_types.h"
15 #include "libyuv/cpu_id.h"
16 #include "libyuv/version.h"
17 #include "../unit_test/unit_test.h"
18 
19 namespace libyuv {
20 
TEST_F(libyuvTest,TestCpuHas)21 TEST_F(libyuvTest, TestCpuHas) {
22   int cpu_flags = TestCpuFlag(~kCpuInitialized);
23   printf("Cpu Flags %x\n", cpu_flags);
24   int has_arm = TestCpuFlag(kCpuHasARM);
25   printf("Has ARM %x\n", has_arm);
26   int has_neon = TestCpuFlag(kCpuHasNEON);
27   printf("Has NEON %x\n", has_neon);
28   int has_x86 = TestCpuFlag(kCpuHasX86);
29   printf("Has X86 %x\n", has_x86);
30   int has_sse2 = TestCpuFlag(kCpuHasSSE2);
31   printf("Has SSE2 %x\n", has_sse2);
32   int has_ssse3 = TestCpuFlag(kCpuHasSSSE3);
33   printf("Has SSSE3 %x\n", has_ssse3);
34   int has_sse41 = TestCpuFlag(kCpuHasSSE41);
35   printf("Has SSE4.1 %x\n", has_sse41);
36   int has_sse42 = TestCpuFlag(kCpuHasSSE42);
37   printf("Has SSE4.2 %x\n", has_sse42);
38   int has_avx = TestCpuFlag(kCpuHasAVX);
39   printf("Has AVX %x\n", has_avx);
40   int has_avx2 = TestCpuFlag(kCpuHasAVX2);
41   printf("Has AVX2 %x\n", has_avx2);
42 }
43 
44 #if defined(__i386__) || defined(__x86_64__) || \
45     defined(_M_IX86) || defined(_M_X64)
TEST_F(libyuvTest,TestCpuId)46 TEST_F(libyuvTest, TestCpuId) {
47   int has_x86 = TestCpuFlag(kCpuHasX86);
48   if (has_x86) {
49     int cpu_info[4];
50     // Vendor ID:
51     // AuthenticAMD AMD processor
52     // CentaurHauls Centaur processor
53     // CyrixInstead Cyrix processor
54     // GenuineIntel Intel processor
55     // GenuineTMx86 Transmeta processor
56     // Geode by NSC National Semiconductor processor
57     // NexGenDriven NexGen processor
58     // RiseRiseRise Rise Technology processor
59     // SiS SiS SiS  SiS processor
60     // UMC UMC UMC  UMC processor
61     CpuId(cpu_info, 0);
62     cpu_info[0] = cpu_info[1];  // Reorder output
63     cpu_info[1] = cpu_info[3];
64     cpu_info[3] = 0;
65     printf("Cpu Vendor: %s %x %x %x\n", reinterpret_cast<char*>(&cpu_info[0]),
66            cpu_info[0], cpu_info[1], cpu_info[2]);
67     EXPECT_EQ(12, strlen(reinterpret_cast<char*>(&cpu_info[0])));
68 
69     // CPU Family and Model
70     // 3:0 - Stepping
71     // 7:4 - Model
72     // 11:8 - Family
73     // 13:12 - Processor Type
74     // 19:16 - Extended Model
75     // 27:20 - Extended Family
76     CpuId(cpu_info, 1);
77     int family = ((cpu_info[0] >> 8) & 0x0f) | ((cpu_info[0] >> 16) & 0xff0);
78     int model = ((cpu_info[0] >> 4) & 0x0f) | ((cpu_info[0] >> 12) & 0xf0);
79     printf("Cpu Family %d (0x%x), Model %d (0x%x)\n", family, family,
80            model, model);
81   }
82 }
83 #endif
84 
TEST_F(libyuvTest,TestLinuxNeon)85 TEST_F(libyuvTest, TestLinuxNeon) {
86   int testdata = ArmCpuCaps("unit_test/testdata/arm_v7.txt");
87   if (testdata) {
88     EXPECT_EQ(kCpuInitialized,
89               ArmCpuCaps("unit_test/testdata/arm_v7.txt"));
90     EXPECT_EQ((kCpuInitialized | kCpuHasNEON),
91               ArmCpuCaps("unit_test/testdata/tegra3.txt"));
92   } else {
93     printf("WARNING: unable to load \"unit_test/testdata/arm_v7.txt\"\n");
94   }
95 #if defined(__linux__) && defined(__ARM_NEON__)
96   EXPECT_NE(0, ArmCpuCaps("/proc/cpuinfo"));
97 #endif
98 }
99 
100 }  // namespace libyuv
101