1============================================================
2Extending LLVM: Adding instructions, intrinsics, types, etc.
3============================================================
4
5Introduction and Warning
6========================
7
8
9During the course of using LLVM, you may wish to customize it for your research
10project or for experimentation. At this point, you may realize that you need to
11add something to LLVM, whether it be a new fundamental type, a new intrinsic
12function, or a whole new instruction.
13
14When you come to this realization, stop and think. Do you really need to extend
15LLVM? Is it a new fundamental capability that LLVM does not support at its
16current incarnation or can it be synthesized from already pre-existing LLVM
17elements? If you are not sure, ask on the `LLVM-dev
18<http://lists.llvm.org/mailman/listinfo/llvm-dev>`_ list. The reason is that
19extending LLVM will get involved as you need to update all the different passes
20that you intend to use with your extension, and there are ``many`` LLVM analyses
21and transformations, so it may be quite a bit of work.
22
23Adding an `intrinsic function`_ is far easier than adding an
24instruction, and is transparent to optimization passes.  If your added
25functionality can be expressed as a function call, an intrinsic function is the
26method of choice for LLVM extension.
27
28Before you invest a significant amount of effort into a non-trivial extension,
29**ask on the list** if what you are looking to do can be done with
30already-existing infrastructure, or if maybe someone else is already working on
31it. You will save yourself a lot of time and effort by doing so.
32
33.. _intrinsic function:
34
35Adding a new intrinsic function
36===============================
37
38Adding a new intrinsic function to LLVM is much easier than adding a new
39instruction.  Almost all extensions to LLVM should start as an intrinsic
40function and then be turned into an instruction if warranted.
41
42#. ``llvm/docs/LangRef.html``:
43
44   Document the intrinsic.  Decide whether it is code generator specific and
45   what the restrictions are.  Talk to other people about it so that you are
46   sure it's a good idea.
47
48#. ``llvm/include/llvm/IR/Intrinsics*.td``:
49
50   Add an entry for your intrinsic.  Describe its memory access characteristics
51   for optimization (this controls whether it will be DCE'd, CSE'd, etc). Note
52   that any intrinsic using one of the ``llvm_any*_ty`` types for an argument or
53   return type will be deemed by ``tblgen`` as overloaded and the corresponding
54   suffix will be required on the intrinsic's name.
55
56#. ``llvm/lib/Analysis/ConstantFolding.cpp``:
57
58   If it is possible to constant fold your intrinsic, add support to it in the
59   ``canConstantFoldCallTo`` and ``ConstantFoldCall`` functions.
60
61#. ``llvm/test/*``:
62
63   Add test cases for your test cases to the test suite
64
65Once the intrinsic has been added to the system, you must add code generator
66support for it.  Generally you must do the following steps:
67
68Add support to the .td file for the target(s) of your choice in
69``lib/Target/*/*.td``.
70
71  This is usually a matter of adding a pattern to the .td file that matches the
72  intrinsic, though it may obviously require adding the instructions you want to
73  generate as well.  There are lots of examples in the PowerPC and X86 backend
74  to follow.
75
76Adding a new SelectionDAG node
77==============================
78
79As with intrinsics, adding a new SelectionDAG node to LLVM is much easier than
80adding a new instruction.  New nodes are often added to help represent
81instructions common to many targets.  These nodes often map to an LLVM
82instruction (add, sub) or intrinsic (byteswap, population count).  In other
83cases, new nodes have been added to allow many targets to perform a common task
84(converting between floating point and integer representation) or capture more
85complicated behavior in a single node (rotate).
86
87#. ``include/llvm/CodeGen/ISDOpcodes.h``:
88
89   Add an enum value for the new SelectionDAG node.
90
91#. ``lib/CodeGen/SelectionDAG/SelectionDAG.cpp``:
92
93   Add code to print the node to ``getOperationName``.  If your new node can be
94    evaluated at compile time when given constant arguments (such as an add of a
95    constant with another constant), find the ``getNode`` method that takes the
96    appropriate number of arguments, and add a case for your node to the switch
97    statement that performs constant folding for nodes that take the same number
98    of arguments as your new node.
99
100#. ``lib/CodeGen/SelectionDAG/LegalizeDAG.cpp``:
101
102   Add code to `legalize, promote, and expand
103   <CodeGenerator.html#selectiondag_legalize>`_ the node as necessary.  At a
104   minimum, you will need to add a case statement for your node in
105   ``LegalizeOp`` which calls LegalizeOp on the node's operands, and returns a
106   new node if any of the operands changed as a result of being legalized.  It
107   is likely that not all targets supported by the SelectionDAG framework will
108   natively support the new node.  In this case, you must also add code in your
109   node's case statement in ``LegalizeOp`` to Expand your node into simpler,
110   legal operations.  The case for ``ISD::UREM`` for expanding a remainder into
111   a divide, multiply, and a subtract is a good example.
112
113#. ``lib/CodeGen/SelectionDAG/LegalizeDAG.cpp``:
114
115   If targets may support the new node being added only at certain sizes, you
116    will also need to add code to your node's case statement in ``LegalizeOp``
117    to Promote your node's operands to a larger size, and perform the correct
118    operation.  You will also need to add code to ``PromoteOp`` to do this as
119    well.  For a good example, see ``ISD::BSWAP``, which promotes its operand to
120    a wider size, performs the byteswap, and then shifts the correct bytes right
121    to emulate the narrower byteswap in the wider type.
122
123#. ``lib/CodeGen/SelectionDAG/LegalizeDAG.cpp``:
124
125   Add a case for your node in ``ExpandOp`` to teach the legalizer how to
126   perform the action represented by the new node on a value that has been split
127   into high and low halves.  This case will be used to support your node with a
128   64 bit operand on a 32 bit target.
129
130#. ``lib/CodeGen/SelectionDAG/DAGCombiner.cpp``:
131
132   If your node can be combined with itself, or other existing nodes in a
133   peephole-like fashion, add a visit function for it, and call that function
134   from. There are several good examples for simple combines you can do;
135   ``visitFABS`` and ``visitSRL`` are good starting places.
136
137#. ``lib/Target/PowerPC/PPCISelLowering.cpp``:
138
139   Each target has an implementation of the ``TargetLowering`` class, usually in
140   its own file (although some targets include it in the same file as the
141   DAGToDAGISel).  The default behavior for a target is to assume that your new
142   node is legal for all types that are legal for that target.  If this target
143   does not natively support your node, then tell the target to either Promote
144   it (if it is supported at a larger type) or Expand it.  This will cause the
145   code you wrote in ``LegalizeOp`` above to decompose your new node into other
146   legal nodes for this target.
147
148#. ``lib/Target/TargetSelectionDAG.td``:
149
150   Most current targets supported by LLVM generate code using the DAGToDAG
151   method, where SelectionDAG nodes are pattern matched to target-specific
152   nodes, which represent individual instructions.  In order for the targets to
153   match an instruction to your new node, you must add a def for that node to
154   the list in this file, with the appropriate type constraints. Look at
155   ``add``, ``bswap``, and ``fadd`` for examples.
156
157#. ``lib/Target/PowerPC/PPCInstrInfo.td``:
158
159   Each target has a tablegen file that describes the target's instruction set.
160   For targets that use the DAGToDAG instruction selection framework, add a
161   pattern for your new node that uses one or more target nodes.  Documentation
162   for this is a bit sparse right now, but there are several decent examples.
163   See the patterns for ``rotl`` in ``PPCInstrInfo.td``.
164
165#. TODO: document complex patterns.
166
167#. ``llvm/test/CodeGen/*``:
168
169   Add test cases for your new node to the test suite.
170   ``llvm/test/CodeGen/X86/bswap.ll`` is a good example.
171
172Adding a new instruction
173========================
174
175.. warning::
176
177  Adding instructions changes the bitcode format, and it will take some effort
178  to maintain compatibility with the previous version. Only add an instruction
179  if it is absolutely necessary.
180
181#. ``llvm/include/llvm/IR/Instruction.def``:
182
183   add a number for your instruction and an enum name
184
185#. ``llvm/include/llvm/IR/Instructions.h``:
186
187   add a definition for the class that will represent your instruction
188
189#. ``llvm/include/llvm/IR/InstVisitor.h``:
190
191   add a prototype for a visitor to your new instruction type
192
193#. ``llvm/lib/AsmParser/LLLexer.cpp``:
194
195   add a new token to parse your instruction from assembly text file
196
197#. ``llvm/lib/AsmParser/LLParser.cpp``:
198
199   add the grammar on how your instruction can be read and what it will
200   construct as a result
201
202#. ``llvm/lib/Bitcode/Reader/BitcodeReader.cpp``:
203
204   add a case for your instruction and how it will be parsed from bitcode
205
206#. ``llvm/lib/Bitcode/Writer/BitcodeWriter.cpp``:
207
208   add a case for your instruction and how it will be parsed from bitcode
209
210#. ``llvm/lib/IR/Instruction.cpp``:
211
212   add a case for how your instruction will be printed out to assembly
213
214#. ``llvm/lib/IR/Instructions.cpp``:
215
216   implement the class you defined in ``llvm/include/llvm/Instructions.h``
217
218#. Test your instruction
219
220#. ``llvm/lib/Target/*``:
221
222   add support for your instruction to code generators, or add a lowering pass.
223
224#. ``llvm/test/*``:
225
226   add your test cases to the test suite.
227
228Also, you need to implement (or modify) any analyses or passes that you want to
229understand this new instruction.
230
231Adding a new type
232=================
233
234.. warning::
235
236  Adding new types changes the bitcode format, and will break compatibility with
237  currently-existing LLVM installations. Only add new types if it is absolutely
238  necessary.
239
240Adding a fundamental type
241-------------------------
242
243#. ``llvm/include/llvm/IR/Type.h``:
244
245   add enum for the new type; add static ``Type*`` for this type
246
247#. ``llvm/lib/IR/Type.cpp`` and ``llvm/lib/IR/ValueTypes.cpp``:
248
249   add mapping from ``TypeID`` => ``Type*``; initialize the static ``Type*``
250
251#. ``llvm/llvm/llvm-c/Core.cpp``:
252
253   add enum ``LLVMTypeKind`` and modify
254   ``LLVMTypeKind LLVMGetTypeKind(LLVMTypeRef Ty)`` for the new type
255
256#. ``llvm/include/llvm/IR/TypeBuilder.h``:
257
258   add new class to represent new type in the hierarchy
259
260#. ``llvm/lib/AsmParser/LLLexer.cpp``:
261
262   add ability to parse in the type from text assembly
263
264#. ``llvm/lib/AsmParser/LLParser.cpp``:
265
266   add a token for that type
267
268#. ``llvm/lib/Bitcode/Writer/BitcodeWriter.cpp``:
269
270   modify ``static void WriteTypeTable(const ValueEnumerator &VE,
271   BitstreamWriter &Stream)`` to serialize your type
272
273#. ``llvm/lib/Bitcode/Reader/BitcodeReader.cpp``:
274
275   modify ``bool BitcodeReader::ParseTypeType()`` to read your data type
276
277#. ``include/llvm/Bitcode/LLVMBitCodes.h``:
278
279   add enum ``TypeCodes`` for the new type
280
281Adding a derived type
282---------------------
283
284#. ``llvm/include/llvm/IR/Type.h``:
285
286   add enum for the new type; add a forward declaration of the type also
287
288#. ``llvm/include/llvm/IR/DerivedTypes.h``:
289
290   add new class to represent new class in the hierarchy; add forward
291   declaration to the TypeMap value type
292
293#. ``llvm/lib/IR/Type.cpp`` and ``llvm/lib/IR/ValueTypes.cpp``:
294
295   add support for derived type, notably `enum TypeID` and `is`, `get` methods.
296
297#. ``llvm/llvm/llvm-c/Core.cpp``:
298
299   add enum ``LLVMTypeKind`` and modify
300   `LLVMTypeKind LLVMGetTypeKind(LLVMTypeRef Ty)` for the new type
301
302#. ``llvm/include/llvm/IR/TypeBuilder.h``:
303
304   add new class to represent new class in the hierarchy
305
306#. ``llvm/lib/AsmParser/LLLexer.cpp``:
307
308   modify ``lltok::Kind LLLexer::LexIdentifier()`` to add ability to
309   parse in the type from text assembly
310
311#. ``llvm/lib/Bitcode/Writer/BitcodeWriter.cpp``:
312
313   modify ``static void WriteTypeTable(const ValueEnumerator &VE,
314   BitstreamWriter &Stream)`` to serialize your type
315
316#. ``llvm/lib/Bitcode/Reader/BitcodeReader.cpp``:
317
318   modify ``bool BitcodeReader::ParseTypeType()`` to read your data type
319
320#. ``include/llvm/Bitcode/LLVMBitCodes.h``:
321
322   add enum ``TypeCodes`` for the new type
323
324#. ``llvm/lib/IR/AsmWriter.cpp``:
325
326   modify ``void TypePrinting::print(Type *Ty, raw_ostream &OS)``
327   to output the new derived type
328