1 //===-- AMDGPUTargetTransformInfo.h - AMDGPU specific TTI -------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// \file 10 /// This file a TargetTransformInfo::Concept conforming object specific to the 11 /// AMDGPU target machine. It uses the target's detailed information to 12 /// provide more precise answers to certain TTI queries, while letting the 13 /// target independent and default TTI implementations handle the rest. 14 /// 15 //===----------------------------------------------------------------------===// 16 17 #ifndef LLVM_LIB_TARGET_R600_AMDGPUTARGETTRANSFORMINFO_H 18 #define LLVM_LIB_TARGET_R600_AMDGPUTARGETTRANSFORMINFO_H 19 20 #include "AMDGPU.h" 21 #include "AMDGPUTargetMachine.h" 22 #include "llvm/Analysis/TargetTransformInfo.h" 23 #include "llvm/CodeGen/BasicTTIImpl.h" 24 #include "llvm/Target/TargetLowering.h" 25 26 namespace llvm { 27 28 class AMDGPUTTIImpl : public BasicTTIImplBase<AMDGPUTTIImpl> { 29 typedef BasicTTIImplBase<AMDGPUTTIImpl> BaseT; 30 typedef TargetTransformInfo TTI; 31 friend BaseT; 32 33 const AMDGPUSubtarget *ST; 34 const AMDGPUTargetLowering *TLI; 35 getST()36 const AMDGPUSubtarget *getST() const { return ST; } getTLI()37 const AMDGPUTargetLowering *getTLI() const { return TLI; } 38 39 public: AMDGPUTTIImpl(const AMDGPUTargetMachine * TM,const DataLayout & DL)40 explicit AMDGPUTTIImpl(const AMDGPUTargetMachine *TM, const DataLayout &DL) 41 : BaseT(TM, DL), ST(TM->getSubtargetImpl()), 42 TLI(ST->getTargetLowering()) {} 43 44 // Provide value semantics. MSVC requires that we spell all of these out. AMDGPUTTIImpl(const AMDGPUTTIImpl & Arg)45 AMDGPUTTIImpl(const AMDGPUTTIImpl &Arg) 46 : BaseT(static_cast<const BaseT &>(Arg)), ST(Arg.ST), TLI(Arg.TLI) {} AMDGPUTTIImpl(AMDGPUTTIImpl && Arg)47 AMDGPUTTIImpl(AMDGPUTTIImpl &&Arg) 48 : BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)), 49 TLI(std::move(Arg.TLI)) {} 50 hasBranchDivergence()51 bool hasBranchDivergence() { return true; } 52 53 void getUnrollingPreferences(Loop *L, TTI::UnrollingPreferences &UP); 54 getPopcntSupport(unsigned TyWidth)55 TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth) { 56 assert(isPowerOf2_32(TyWidth) && "Ty width must be power of 2"); 57 return ST->hasBCNT(TyWidth) ? TTI::PSK_FastHardware : TTI::PSK_Software; 58 } 59 60 unsigned getNumberOfRegisters(bool Vector); 61 unsigned getRegisterBitWidth(bool Vector); 62 unsigned getMaxInterleaveFactor(unsigned VF); 63 64 unsigned getCFInstrCost(unsigned Opcode); 65 66 int getVectorInstrCost(unsigned Opcode, Type *ValTy, unsigned Index); 67 bool isSourceOfDivergence(const Value *V) const; 68 }; 69 70 } // end namespace llvm 71 72 #endif 73