1; RUN: opt -cost-model -analyze -mtriple=thumbv7-apple-ios6.0.0 -mcpu=swift < %s | FileCheck %s
2
3target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
4target triple = "thumbv7-apple-ios6.0.0"
5
6; Multiple insert elements from loads into d subregisters are expensive on swift
7; due to renaming constraints.
8%T_i8v = type <8 x i8>
9%T_i8 = type i8
10; CHECK: insertelement_i8
11define void @insertelement_i8(%T_i8* %saddr,
12                           %T_i8v* %vaddr) {
13  %v0 = load %T_i8v, %T_i8v* %vaddr
14  %v1 = load %T_i8, %T_i8* %saddr
15;CHECK: estimated cost of 3 for {{.*}} insertelement <8 x i8>
16  %v2 = insertelement %T_i8v %v0, %T_i8 %v1, i32 1
17  store %T_i8v %v2, %T_i8v* %vaddr
18  ret void
19}
20
21
22%T_i16v = type <4 x i16>
23%T_i16 = type i16
24; CHECK: insertelement_i16
25define void @insertelement_i16(%T_i16* %saddr,
26                           %T_i16v* %vaddr) {
27  %v0 = load %T_i16v, %T_i16v* %vaddr
28  %v1 = load %T_i16, %T_i16* %saddr
29;CHECK: estimated cost of 3 for {{.*}} insertelement <4 x i16>
30  %v2 = insertelement %T_i16v %v0, %T_i16 %v1, i32 1
31  store %T_i16v %v2, %T_i16v* %vaddr
32  ret void
33}
34
35%T_i32v = type <2 x i32>
36%T_i32 = type i32
37; CHECK: insertelement_i32
38define void @insertelement_i32(%T_i32* %saddr,
39                           %T_i32v* %vaddr) {
40  %v0 = load %T_i32v, %T_i32v* %vaddr
41  %v1 = load %T_i32, %T_i32* %saddr
42;CHECK: estimated cost of 3 for {{.*}} insertelement <2 x i32>
43  %v2 = insertelement %T_i32v %v0, %T_i32 %v1, i32 1
44  store %T_i32v %v2, %T_i32v* %vaddr
45  ret void
46}
47