1; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=GCN -check-prefix=FUNC %s 2; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=GCN -check-prefix=FUNC %s 3 4declare i64 @llvm.ctpop.i64(i64) nounwind readnone 5declare <2 x i64> @llvm.ctpop.v2i64(<2 x i64>) nounwind readnone 6declare <4 x i64> @llvm.ctpop.v4i64(<4 x i64>) nounwind readnone 7declare <8 x i64> @llvm.ctpop.v8i64(<8 x i64>) nounwind readnone 8declare <16 x i64> @llvm.ctpop.v16i64(<16 x i64>) nounwind readnone 9 10; FUNC-LABEL: {{^}}s_ctpop_i64: 11; SI: s_load_dwordx2 [[SVAL:s\[[0-9]+:[0-9]+\]]], s{{\[[0-9]+:[0-9]+\]}}, 0xb 12; VI: s_load_dwordx2 [[SVAL:s\[[0-9]+:[0-9]+\]]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c 13; GCN: s_bcnt1_i32_b64 [[SRESULT:s[0-9]+]], [[SVAL]] 14; GCN: v_mov_b32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]] 15; GCN: buffer_store_dword [[VRESULT]], 16; GCN: s_endpgm 17define void @s_ctpop_i64(i32 addrspace(1)* noalias %out, i64 %val) nounwind { 18 %ctpop = call i64 @llvm.ctpop.i64(i64 %val) nounwind readnone 19 %truncctpop = trunc i64 %ctpop to i32 20 store i32 %truncctpop, i32 addrspace(1)* %out, align 4 21 ret void 22} 23 24; FUNC-LABEL: {{^}}v_ctpop_i64: 25; GCN: buffer_load_dwordx2 v{{\[}}[[LOVAL:[0-9]+]]:[[HIVAL:[0-9]+]]{{\]}}, 26; GCN: v_bcnt_u32_b32_e64 [[MIDRESULT:v[0-9]+]], v[[LOVAL]], 0 27; SI-NEXT: v_bcnt_u32_b32_e32 [[RESULT:v[0-9]+]], v[[HIVAL]], [[MIDRESULT]] 28; VI-NEXT: v_bcnt_u32_b32_e64 [[RESULT:v[0-9]+]], v[[HIVAL]], [[MIDRESULT]] 29; GCN: buffer_store_dword [[RESULT]], 30; GCN: s_endpgm 31define void @v_ctpop_i64(i32 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in) nounwind { 32 %val = load i64, i64 addrspace(1)* %in, align 8 33 %ctpop = call i64 @llvm.ctpop.i64(i64 %val) nounwind readnone 34 %truncctpop = trunc i64 %ctpop to i32 35 store i32 %truncctpop, i32 addrspace(1)* %out, align 4 36 ret void 37} 38 39; FIXME: or 0 should be replaxed with copy 40; FUNC-LABEL: {{^}}v_ctpop_i64_user: 41; GCN: buffer_load_dwordx2 v{{\[}}[[LOVAL:[0-9]+]]:[[HIVAL:[0-9]+]]{{\]}}, 42; GCN: v_bcnt_u32_b32_e64 [[MIDRESULT:v[0-9]+]], v[[LOVAL]], 0 43; SI-NEXT: v_bcnt_u32_b32_e32 [[RESULT:v[0-9]+]], v[[HIVAL]], [[MIDRESULT]] 44; VI-NEXT: v_bcnt_u32_b32_e64 [[RESULT:v[0-9]+]], v[[HIVAL]], [[MIDRESULT]] 45; GCN-DAG: v_or_b32_e32 v[[RESULT_LO:[0-9]+]], s{{[0-9]+}}, [[RESULT]] 46; GCN-DAG: v_or_b32_e64 v[[RESULT_HI:[0-9]+]], 0, s{{[0-9]+}} 47; GCN: buffer_store_dwordx2 v{{\[}}[[RESULT_LO]]:[[RESULT_HI]]{{\]}} 48; GCN: s_endpgm 49define void @v_ctpop_i64_user(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in, i64 %s.val) nounwind { 50 %val = load i64, i64 addrspace(1)* %in, align 8 51 %ctpop = call i64 @llvm.ctpop.i64(i64 %val) nounwind readnone 52 %or = or i64 %ctpop, %s.val 53 store i64 %or, i64 addrspace(1)* %out 54 ret void 55} 56 57; FUNC-LABEL: {{^}}s_ctpop_v2i64: 58; GCN: s_bcnt1_i32_b64 59; GCN: s_bcnt1_i32_b64 60; GCN: s_endpgm 61define void @s_ctpop_v2i64(<2 x i32> addrspace(1)* noalias %out, <2 x i64> %val) nounwind { 62 %ctpop = call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %val) nounwind readnone 63 %truncctpop = trunc <2 x i64> %ctpop to <2 x i32> 64 store <2 x i32> %truncctpop, <2 x i32> addrspace(1)* %out, align 8 65 ret void 66} 67 68; FUNC-LABEL: {{^}}s_ctpop_v4i64: 69; GCN: s_bcnt1_i32_b64 70; GCN: s_bcnt1_i32_b64 71; GCN: s_bcnt1_i32_b64 72; GCN: s_bcnt1_i32_b64 73; GCN: s_endpgm 74define void @s_ctpop_v4i64(<4 x i32> addrspace(1)* noalias %out, <4 x i64> %val) nounwind { 75 %ctpop = call <4 x i64> @llvm.ctpop.v4i64(<4 x i64> %val) nounwind readnone 76 %truncctpop = trunc <4 x i64> %ctpop to <4 x i32> 77 store <4 x i32> %truncctpop, <4 x i32> addrspace(1)* %out, align 16 78 ret void 79} 80 81; FUNC-LABEL: {{^}}v_ctpop_v2i64: 82; GCN: v_bcnt_u32_b32 83; GCN: v_bcnt_u32_b32 84; GCN: v_bcnt_u32_b32 85; GCN: v_bcnt_u32_b32 86; GCN: s_endpgm 87define void @v_ctpop_v2i64(<2 x i32> addrspace(1)* noalias %out, <2 x i64> addrspace(1)* noalias %in) nounwind { 88 %val = load <2 x i64>, <2 x i64> addrspace(1)* %in, align 16 89 %ctpop = call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %val) nounwind readnone 90 %truncctpop = trunc <2 x i64> %ctpop to <2 x i32> 91 store <2 x i32> %truncctpop, <2 x i32> addrspace(1)* %out, align 8 92 ret void 93} 94 95; FUNC-LABEL: {{^}}v_ctpop_v4i64: 96; GCN: v_bcnt_u32_b32 97; GCN: v_bcnt_u32_b32 98; GCN: v_bcnt_u32_b32 99; GCN: v_bcnt_u32_b32 100; GCN: v_bcnt_u32_b32 101; GCN: v_bcnt_u32_b32 102; GCN: v_bcnt_u32_b32 103; GCN: v_bcnt_u32_b32 104; GCN: s_endpgm 105define void @v_ctpop_v4i64(<4 x i32> addrspace(1)* noalias %out, <4 x i64> addrspace(1)* noalias %in) nounwind { 106 %val = load <4 x i64>, <4 x i64> addrspace(1)* %in, align 32 107 %ctpop = call <4 x i64> @llvm.ctpop.v4i64(<4 x i64> %val) nounwind readnone 108 %truncctpop = trunc <4 x i64> %ctpop to <4 x i32> 109 store <4 x i32> %truncctpop, <4 x i32> addrspace(1)* %out, align 16 110 ret void 111} 112 113; FIXME: We currently disallow SALU instructions in all branches, 114; but there are some cases when the should be allowed. 115 116; FUNC-LABEL: {{^}}ctpop_i64_in_br: 117; SI: s_load_dwordx2 s{{\[}}[[LOVAL:[0-9]+]]:[[HIVAL:[0-9]+]]{{\]}}, s[{{[0-9]+:[0-9]+}}], 0xd 118; VI: s_load_dwordx2 s{{\[}}[[LOVAL:[0-9]+]]:[[HIVAL:[0-9]+]]{{\]}}, s[{{[0-9]+:[0-9]+}}], 0x34 119; GCN: s_bcnt1_i32_b64 [[RESULT:s[0-9]+]], {{s\[}}[[LOVAL]]:[[HIVAL]]{{\]}} 120; GCN-DAG: v_mov_b32_e32 v[[VLO:[0-9]+]], [[RESULT]] 121; GCN-DAG: v_mov_b32_e32 v[[VHI:[0-9]+]], s[[HIVAL]] 122; GCN: buffer_store_dwordx2 {{v\[}}[[VLO]]:[[VHI]]{{\]}} 123; GCN: s_endpgm 124define void @ctpop_i64_in_br(i64 addrspace(1)* %out, i64 addrspace(1)* %in, i64 %ctpop_arg, i32 %cond) { 125entry: 126 %tmp0 = icmp eq i32 %cond, 0 127 br i1 %tmp0, label %if, label %else 128 129if: 130 %tmp2 = call i64 @llvm.ctpop.i64(i64 %ctpop_arg) 131 br label %endif 132 133else: 134 %tmp3 = getelementptr i64, i64 addrspace(1)* %in, i32 1 135 %tmp4 = load i64, i64 addrspace(1)* %tmp3 136 br label %endif 137 138endif: 139 %tmp5 = phi i64 [%tmp2, %if], [%tmp4, %else] 140 store i64 %tmp5, i64 addrspace(1)* %out 141 ret void 142} 143