1; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=CI %s
2
3; The memory operand was dropped from the buffer_load_dword_offset
4; when replaced with the addr64 during operand legalization, resulting
5; in the global loads not being scheduled together.
6
7; GCN-LABEL: {{^}}reschedule_global_load_lds_store:
8; GCN: buffer_load_dword
9; GCN: buffer_load_dword
10; GCN: ds_write_b32
11; GCN: ds_write_b32
12; GCN: s_endpgm
13define void @reschedule_global_load_lds_store(i32 addrspace(1)* noalias %gptr0, i32 addrspace(1)* noalias %gptr1, i32 addrspace(3)* noalias %lptr, i32 %c) #0 {
14entry:
15  %tid = tail call i32 @llvm.r600.read.tidig.x() #1
16  %idx = shl i32 %tid, 2
17  %gep0 = getelementptr i32, i32 addrspace(1)* %gptr0, i32 %idx
18  %gep1 = getelementptr i32, i32 addrspace(1)* %gptr1, i32 %idx
19  %gep2 = getelementptr i32, i32 addrspace(3)* %lptr, i32 %tid
20  %cmp0 = icmp eq i32 %c, 0
21  br i1 %cmp0, label %for.body, label %exit
22
23for.body:                                         ; preds = %for.body, %entry
24  %i = phi i32 [ 0, %entry ], [ %i.inc, %for.body ]
25  %gptr0.phi = phi i32 addrspace(1)* [ %gep0, %entry ], [ %gep0.inc, %for.body ]
26  %gptr1.phi = phi i32 addrspace(1)* [ %gep1, %entry ], [ %gep1.inc, %for.body ]
27  %lptr0.phi = phi i32 addrspace(3)* [ %gep2, %entry ], [ %gep2.inc, %for.body ]
28  %lptr1 = getelementptr i32, i32 addrspace(3)* %lptr0.phi, i32 1
29  %val0 = load i32, i32 addrspace(1)* %gep0
30  store i32 %val0, i32 addrspace(3)* %lptr0.phi
31  %val1 = load i32, i32 addrspace(1)* %gep1
32  store i32 %val1, i32 addrspace(3)* %lptr1
33  %gep0.inc = getelementptr i32, i32 addrspace(1)* %gptr0.phi, i32 4
34  %gep1.inc = getelementptr i32, i32 addrspace(1)* %gptr1.phi, i32 4
35  %gep2.inc = getelementptr i32, i32 addrspace(3)* %lptr0.phi, i32 4
36  %i.inc = add nsw i32 %i, 1
37  %cmp1 = icmp ne i32 %i, 256
38  br i1 %cmp1, label %for.body, label %exit
39
40exit:                                             ; preds = %for.body, %entry
41  ret void
42}
43
44; Function Attrs: nounwind readnone
45declare i32 @llvm.r600.read.tidig.x() #1
46
47; Function Attrs: nounwind readnone
48declare i32 @llvm.r600.read.tgid.x() #1
49
50attributes #0 = { nounwind }
51attributes #1 = { nounwind readnone }
52attributes #2 = { convergent nounwind }
53