1; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=BOTH %s
2; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=BOTH %s
3
4; BOTH-LABEL: {{^}}s_rotl_i64:
5; BOTH-DAG: s_lshl_b64
6; BOTH-DAG: s_sub_i32
7; BOTH-DAG: s_lshr_b64
8; BOTH: s_or_b64
9; BOTH: s_endpgm
10define void @s_rotl_i64(i64 addrspace(1)* %in, i64 %x, i64 %y) {
11entry:
12  %0 = shl i64 %x, %y
13  %1 = sub i64 64, %y
14  %2 = lshr i64 %x, %1
15  %3 = or i64 %0, %2
16  store i64 %3, i64 addrspace(1)* %in
17  ret void
18}
19
20; BOTH-LABEL: {{^}}v_rotl_i64:
21; SI-DAG: v_lshl_b64
22; VI-DAG: v_lshlrev_b64
23; BOTH-DAG: v_sub_i32
24; SI: v_lshr_b64
25; VI: v_lshrrev_b64
26; BOTH: v_or_b32
27; BOTH: v_or_b32
28; BOTH: s_endpgm
29define void @v_rotl_i64(i64 addrspace(1)* %in, i64 addrspace(1)* %xptr, i64 addrspace(1)* %yptr) {
30entry:
31  %x = load i64, i64 addrspace(1)* %xptr, align 8
32  %y = load i64, i64 addrspace(1)* %yptr, align 8
33  %tmp0 = shl i64 %x, %y
34  %tmp1 = sub i64 64, %y
35  %tmp2 = lshr i64 %x, %tmp1
36  %tmp3 = or i64 %tmp0, %tmp2
37  store i64 %tmp3, i64 addrspace(1)* %in, align 8
38  ret void
39}
40