1;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG --check-prefix=FUNC %s
2;RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck --check-prefix=SI --check-prefix=FUNC %s
3;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI --check-prefix=VI --check-prefix=FUNC %s
4
5;FUNC-LABEL: {{^}}test_select_v2i32:
6
7;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
8;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
9
10;SI: v_cndmask_b32_e64
11;SI: v_cndmask_b32_e32
12
13define void @test_select_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in0, <2 x i32> addrspace(1)* %in1) {
14entry:
15  %0 = load <2 x i32>, <2 x i32> addrspace(1)* %in0
16  %1 = load <2 x i32>, <2 x i32> addrspace(1)* %in1
17  %cmp = icmp ne <2 x i32> %0, %1
18  %result = select <2 x i1> %cmp, <2 x i32> %0, <2 x i32> %1
19  store <2 x i32> %result, <2 x i32> addrspace(1)* %out
20  ret void
21}
22
23;FUNC-LABEL: {{^}}test_select_v2f32:
24
25;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
26;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
27
28;SI: v_cndmask_b32_e64
29;SI: v_cndmask_b32_e32
30
31define void @test_select_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %in0, <2 x float> addrspace(1)* %in1) {
32entry:
33  %0 = load <2 x float>, <2 x float> addrspace(1)* %in0
34  %1 = load <2 x float>, <2 x float> addrspace(1)* %in1
35  %cmp = fcmp une <2 x float> %0, %1
36  %result = select <2 x i1> %cmp, <2 x float> %0, <2 x float> %1
37  store <2 x float> %result, <2 x float> addrspace(1)* %out
38  ret void
39}
40
41;FUNC-LABEL: {{^}}test_select_v4i32:
42
43;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
44;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
45;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
46;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
47
48; FIXME: The shrinking does not happen on tonga
49
50;SI: v_cndmask_b32
51;SI: v_cndmask_b32
52;SI: v_cndmask_b32
53;SI: v_cndmask_b32
54
55define void @test_select_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in0, <4 x i32> addrspace(1)* %in1) {
56entry:
57  %0 = load <4 x i32>, <4 x i32> addrspace(1)* %in0
58  %1 = load <4 x i32>, <4 x i32> addrspace(1)* %in1
59  %cmp = icmp ne <4 x i32> %0, %1
60  %result = select <4 x i1> %cmp, <4 x i32> %0, <4 x i32> %1
61  store <4 x i32> %result, <4 x i32> addrspace(1)* %out
62  ret void
63}
64
65;FUNC-LABEL: {{^}}test_select_v4f32:
66;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
67;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
68;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
69;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
70
71define void @test_select_v4f32(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in0, <4 x float> addrspace(1)* %in1) {
72entry:
73  %0 = load <4 x float>, <4 x float> addrspace(1)* %in0
74  %1 = load <4 x float>, <4 x float> addrspace(1)* %in1
75  %cmp = fcmp une <4 x float> %0, %1
76  %result = select <4 x i1> %cmp, <4 x float> %0, <4 x float> %1
77  store <4 x float> %result, <4 x float> addrspace(1)* %out
78  ret void
79}
80