1; RUN: llc -march=mips -mcpu=mips32r2 < %s | FileCheck %s
2; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips32r2 -mattr=+mips16 < %s | FileCheck %s -check-prefix=mips16
3
4; CHECK:  rotrv $2, $4
5; mips16: .ent rot0
6define i32 @rot0(i32 %a, i32 %b) nounwind readnone {
7entry:
8  %shl = shl i32 %a, %b
9  %sub = sub i32 32, %b
10  %shr = lshr i32 %a, %sub
11  %or = or i32 %shr, %shl
12  ret i32 %or
13}
14
15; CHECK:  rotr  $2, $4, 22
16; mips16: .ent rot1
17define i32 @rot1(i32 %a) nounwind readnone {
18entry:
19  %shl = shl i32 %a, 10
20  %shr = lshr i32 %a, 22
21  %or = or i32 %shl, %shr
22  ret i32 %or
23}
24
25; CHECK:  rotrv $2, $4, $5
26; mips16: .ent rot2
27define i32 @rot2(i32 %a, i32 %b) nounwind readnone {
28entry:
29  %shr = lshr i32 %a, %b
30  %sub = sub i32 32, %b
31  %shl = shl i32 %a, %sub
32  %or = or i32 %shl, %shr
33  ret i32 %or
34}
35
36; CHECK:  rotr  $2, $4, 10
37; mips16: .ent rot3
38define i32 @rot3(i32 %a) nounwind readnone {
39entry:
40  %shr = lshr i32 %a, 10
41  %shl = shl i32 %a, 22
42  %or = or i32 %shr, %shl
43  ret i32 %or
44}
45
46