1; RUN: llc -O1 < %s -march=ppc64 -mcpu=pwr7 | FileCheck %s
2
3target datalayout = "E-m:e-i64:64-n32:64"
4target triple = "powerpc64-unknown-linux-gnu"
5
6%struct.test = type { i64, [8 x i8] }
7%struct.pad = type { [8 x i64] }
8
9@gt = common global %struct.test zeroinitializer, align 16
10@gp = common global %struct.pad zeroinitializer, align 8
11
12define signext i32 @callee1(i32 signext %x, %struct.test* byval align 16 nocapture readnone %y, i32 signext %z) {
13entry:
14  ret i32 %z
15}
16; CHECK-LABEL: @callee1
17; CHECK: mr 3, 7
18; CHECK: blr
19
20declare signext i32 @test1(i32 signext, %struct.test* byval align 16, i32 signext)
21define void @caller1(i32 signext %z) {
22entry:
23  %call = tail call signext i32 @test1(i32 signext 0, %struct.test* byval align 16 @gt, i32 signext %z)
24  ret void
25}
26; CHECK-LABEL: @caller1
27; CHECK: mr [[REG:[0-9]+]], 3
28; CHECK: mr 7, [[REG]]
29; CHECK: bl test1
30
31define i64 @callee2(%struct.pad* byval nocapture readnone %x, i32 signext %y, %struct.test* byval align 16 nocapture readonly %z) {
32entry:
33  %x1 = getelementptr inbounds %struct.test, %struct.test* %z, i64 0, i32 0
34  %0 = load i64, i64* %x1, align 16
35  ret i64 %0
36}
37; CHECK-LABEL: @callee2
38; CHECK: ld [[REG:[0-9]+]], 128(1)
39; CHECK: mr 3, [[REG]]
40; CHECK: blr
41
42declare i64 @test2(%struct.pad* byval, i32 signext, %struct.test* byval align 16)
43define void @caller2(i64 %z) {
44entry:
45  %tmp = alloca %struct.test, align 16
46  %.compoundliteral.sroa.0.0..sroa_idx = getelementptr inbounds %struct.test, %struct.test* %tmp, i64 0, i32 0
47  store i64 %z, i64* %.compoundliteral.sroa.0.0..sroa_idx, align 16
48  %call = call i64 @test2(%struct.pad* byval @gp, i32 signext 0, %struct.test* byval align 16 %tmp)
49  ret void
50}
51; CHECK-LABEL: @caller2
52; CHECK: std 3, [[OFF:[0-9]+]](1)
53; CHECK: addi [[REG1:[0-9]+]], 1, [[OFF]]
54; CHECK: lxvw4x [[REG2:[0-9]+]], 0, [[REG1]]
55; CHECK: li [[REG3:[0-9]+]], 128
56; CHECK: stxvw4x 0, 1, [[REG3]]
57; CHECK: bl test2
58
59