1// RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s
2
3// Check that we don't generate invalid code of the form "( && Cond2)" when
4// emitting AssemblerPredicate conditions. In the example below, the invalid
5// code would be: "return ( && (Bits & arch::AssemblerCondition2));".
6
7include "llvm/Target/Target.td"
8
9def archInstrInfo : InstrInfo { }
10
11def arch : Target {
12  let InstructionSet = archInstrInfo;
13}
14
15def Pred1 : Predicate<"Condition1">;
16def Pred2 : Predicate<"Condition2">,
17            AssemblerPredicate<"AssemblerCondition2">;
18
19def foo : Instruction {
20  let Size = 2;
21  let OutOperandList = (outs);
22  let InOperandList = (ins);
23  field bits<16> Inst;
24  let Inst = 0xAAAA;
25  let AsmString = "foo";
26  field bits<16> SoftFail = 0;
27  // This is the important bit:
28  let Predicates = [Pred1, Pred2];
29}
30
31// CHECK: return (Bits[arch::AssemblerCondition2]);
32