1 /*
2  * Copyright 2012 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * on the rights to use, copy, modify, merge, publish, distribute, sub
8  * license, and/or sell copies of the Software, and to permit persons to whom
9  * the Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
22  *
23  * Authors:
24  *      Christian König <christian.koenig@amd.com>
25  */
26 
27 #ifndef SI_STATE_H
28 #define SI_STATE_H
29 
30 #include "radeonsi_pm4.h"
31 
32 struct si_state_blend {
33 	struct si_pm4_state	pm4;
34 	uint32_t		cb_target_mask;
35 	uint32_t		cb_color_control;
36 };
37 
38 struct si_state_viewport {
39 	struct si_pm4_state		pm4;
40 	struct pipe_viewport_state	viewport;
41 };
42 
43 struct si_state_rasterizer {
44 	struct si_pm4_state	pm4;
45 	bool			flatshade;
46 	unsigned		sprite_coord_enable;
47 	unsigned		pa_sc_line_stipple;
48 	unsigned		pa_su_sc_mode_cntl;
49 	unsigned		pa_cl_clip_cntl;
50 	unsigned		pa_cl_vs_out_cntl;
51 	float			offset_units;
52 	float			offset_scale;
53 };
54 
55 struct si_state_dsa {
56 	struct si_pm4_state	pm4;
57 	unsigned		alpha_ref;
58 	unsigned		db_render_override;
59 	unsigned		db_render_control;
60 	uint8_t			valuemask[2];
61 	uint8_t			writemask[2];
62 };
63 
64 struct si_vertex_element
65 {
66 	unsigned			count;
67 	uint32_t			rsrc_word3[PIPE_MAX_ATTRIBS];
68 	struct pipe_vertex_element	elements[PIPE_MAX_ATTRIBS];
69 };
70 
71 union si_state {
72 	struct {
73 		struct si_pm4_state		*sync;
74 		struct si_pm4_state		*init;
75 		struct si_state_blend		*blend;
76 		struct si_pm4_state		*blend_color;
77 		struct si_pm4_state		*clip;
78 		struct si_pm4_state		*scissor;
79 		struct si_state_viewport	*viewport;
80 		struct si_pm4_state		*framebuffer;
81 		struct si_state_rasterizer	*rasterizer;
82 		struct si_state_dsa		*dsa;
83 		struct si_pm4_state		*fb_rs;
84 		struct si_pm4_state		*fb_blend;
85 		struct si_pm4_state		*dsa_stencil_ref;
86 		struct si_pm4_state		*vs;
87 		struct si_pm4_state		*vs_const;
88 		struct si_pm4_state		*ps;
89 		struct si_pm4_state		*ps_sampler_views;
90 		struct si_pm4_state		*ps_sampler;
91 		struct si_pm4_state		*ps_const;
92 		struct si_pm4_state		*spi;
93 		struct si_pm4_state		*vertex_buffers;
94 		struct si_pm4_state		*texture_barrier;
95 		struct si_pm4_state		*draw_info;
96 		struct si_pm4_state		*draw;
97 	} named;
98 	struct si_pm4_state	*array[0];
99 };
100 
101 #define si_pm4_block_idx(member) \
102 	(offsetof(union si_state, named.member) / sizeof(struct si_pm4_state *))
103 
104 #define si_pm4_bind_state(rctx, member, value) \
105 	do { \
106 		(rctx)->queued.named.member = (value); \
107 	} while(0)
108 
109 #define si_pm4_delete_state(rctx, member, value) \
110 	do { \
111 		if ((rctx)->queued.named.member == (value)) { \
112 			(rctx)->queued.named.member = NULL; \
113 		} \
114 		si_pm4_free_state(rctx, (struct si_pm4_state *)(value), \
115 				  si_pm4_block_idx(member)); \
116 	} while(0)
117 
118 #define si_pm4_set_state(rctx, member, value) \
119 	do { \
120 		if ((rctx)->queued.named.member != (value)) { \
121 			si_pm4_free_state(rctx, \
122 				(struct si_pm4_state *)(rctx)->queued.named.member, \
123 				si_pm4_block_idx(member)); \
124 			(rctx)->queued.named.member = (value); \
125 		} \
126 	} while(0)
127 
128 /* si_state.c */
129 struct si_pipe_shader_selector;
130 
131 bool si_is_format_supported(struct pipe_screen *screen,
132 			    enum pipe_format format,
133 			    enum pipe_texture_target target,
134 			    unsigned sample_count,
135 			    unsigned usage);
136 int si_shader_select(struct pipe_context *ctx,
137 		     struct si_pipe_shader_selector *sel,
138 		     unsigned *dirty);
139 void si_init_state_functions(struct r600_context *rctx);
140 void si_init_config(struct r600_context *rctx);
141 
142 /* si_state_streamout.c */
143 struct pipe_stream_output_target *
144 si_create_so_target(struct pipe_context *ctx,
145 		    struct pipe_resource *buffer,
146 		    unsigned buffer_offset,
147 		    unsigned buffer_size);
148 void si_so_target_destroy(struct pipe_context *ctx,
149 			  struct pipe_stream_output_target *target);
150 void si_set_so_targets(struct pipe_context *ctx,
151 		       unsigned num_targets,
152 		       struct pipe_stream_output_target **targets,
153 		       unsigned append_bitmask);
154 
155 /* si_state_draw.c */
156 void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo);
157 
158 /* si_commands.c */
159 void si_cmd_surface_sync(struct si_pm4_state *pm4, uint32_t cp_coher_cntl);
160 
161 #endif
162