1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4
5 // CPU specific code for arm independent of OS goes here.
6
7 #include <sys/syscall.h>
8 #include <unistd.h>
9
10 #ifdef __mips
11 #include <asm/cachectl.h>
12 #endif // #ifdef __mips
13
14 #if V8_TARGET_ARCH_MIPS64
15
16 #include "src/assembler.h"
17 #include "src/macro-assembler.h"
18
19 #include "src/simulator.h" // For cache flushing.
20
21 namespace v8 {
22 namespace internal {
23
24
FlushICache(void * start,size_t size)25 void CpuFeatures::FlushICache(void* start, size_t size) {
26 #if !defined(USE_SIMULATOR)
27 // Nothing to do, flushing no instructions.
28 if (size == 0) {
29 return;
30 }
31
32 #if defined(ANDROID) && !defined(__LP64__)
33 // Bionic cacheflush can typically run in userland, avoiding kernel call.
34 char *end = reinterpret_cast<char *>(start) + size;
35 cacheflush(
36 reinterpret_cast<intptr_t>(start), reinterpret_cast<intptr_t>(end), 0);
37 #else // ANDROID
38 long res; // NOLINT(runtime/int)
39 // See http://www.linux-mips.org/wiki/Cacheflush_Syscall.
40 res = syscall(__NR_cacheflush, start, size, ICACHE);
41 if (res) {
42 V8_Fatal(__FILE__, __LINE__, "Failed to flush the instruction cache");
43 }
44 #endif // ANDROID
45 #endif // !USE_SIMULATOR.
46 }
47
48 } // namespace internal
49 } // namespace v8
50
51 #endif // V8_TARGET_ARCH_MIPS64
52