1 2A record of merges from trunk to 3.10.1. "NO_MERGE" identifies commits 3that were initially considered as candidates but later rejected. 4 5 6//339336 PPC64 store quad instruction (stq) is not supposed to 7// change the address register contents 8//2957 93001, ok 10 11//339182 ppc64: AvSplat ought to load destination vector register with 16/16 12// bytes stored prior 13//2960 143002, ok 15 16//339020 ppc64: memcheck/tests/ppc64/power_ISA2_05 failing in nightly build 17//14545 1814745, ok 19 20//14549 DRD: Handle Imbe_CancelReservation properly (clrex on ARM) 2114746, ok 22 23NO_MERGE 24339156 ??? gdbsrv not called for fatal signal 2514556 (should this be merged?) 26 27//14561 Add missing ]] to terminate CDATA. 2814747, ok 29 30//14565 Glibc versions prior to 2.5 do not define PTRACE_GETSIGINFO 31// (check w/ Florian) 3214748, ok 33 34//339433 ppc64 lxvw4x instruction uses four 32-byte loads 35//2962, 2966, 2967, 2973 363003, ok 37 38NO_MERGE 392971 ??? mips: use putDReg/getDReg for ceil.l.d 40 41NO_MERGE 422972 ??? mips: add a missing break 43 44//339858 arm64 dmb sy not implemented 45//2975 (subsequently overwritten by 2986) 463004, ok 47 48//339645 Use correct tag names in sys_getdents/64 wrappers 49//14599 5014749, ok 51 52//339721 assertion 'check_sibling == sibling' failed in readdwarf3.c ... 53//14603,14610 5414750, ok 55 56//339853 arm64 times syscall unknown 57//14616 5814751, ok 59 60//14618 Handle (by ignoring) Imbe_CancelReservation. (hg) 6114752, ok 62 63//339855 arm64 unhandled getsid/setsid syscalls 64//14617 6514753, ok 66 67//14631 Enable sys_fadvise64_64 on arm32. 6814754, ok 69 70//339706 Fix false positive for ioctl(TIOCSIG) on linux 71//14646 (just the fix) 7214755, ok 73 74//340036 arm64: Unhandled instruction ld4 (multiple structures, no offset) 75//2976 763005, ok 77 78//335440 arm64: ld1 (single structure) is not implemented 79//2979 Complete arm64 load/store insns 803006, ok 81 82//14653 Add test cases for all known arm64 load/store instructions. 8314756, ok 84 85//14667 Enable test cases for arm64 load/store insns 8614757, ok 87 88//339926 Unhandled instruction 0x1E674001 (frintx) on aarm64 89//2981 903007, ok 91 92//339927 Unhandled instruction 0x9E7100C6 (fcvtmu) on aarch64 93//2982 943008, ok 95 96//339938 disInstr(arm64): unhandled instruction 0x4F8010A4 (fmla) 97// == 339950 98//2983 993009, ok 100 101//340509 arm64: unhandled instruction fcvtas 102//2984 1033010, ok 104 105//335713 arm64: unhanded instruction: prfm (immediate) 106//2985 1073011, ok 108 109//340033 arm64: unhandled instruction for dmb ishld and some other 110// isb-dmb-dsb variants... 111//2986 1123012, ok 113 114//339940 arm64: unhandled syscall: 83 (sys_fdatasync) + patch 115//14675 11614759, ok 117 118//340028 unhandled syscalls for arm64 (msync, pread64, setreuid and setregid) 119//14676 12014760, ok 121 122//340236 4 unhandled syscalls on aarch64/arm64: mknodat (33), fchdir 123// (50), chroot (51), fchownat (54) 124//14677 12514761, ok 126 127//340632 arm64: unhandled instruction fcvtas 128//2987 1293013, ok 130 131//340725 AVX2: Incorrect decoding of vpbroadcast{b,w} reg,reg forms 132//2988 1333014, ok 134 135//14679 Add test cases for arm64 FMLA etc 13614762, ok 137 138//14681 arm64 Rearrange the test case generators [..] 13914763, ok 140 141//14684 arm64 Add tests for all SIMD FP instructions [..] 14214764, ok 143 144//340630 arm64: fchmod (52) and fchown (55) syscalls not recognized 145//14686 14614765, ok 147 148//14689 PRE(sys_openat): when checking whether ARG1 == VKI_AT_FDCWD [..] 14914766, ok 150 151NO_MERGE 15214691 ??? Unmask all signals in vgdb [..] 153 154//14705 Update system call lists. 15514767, ok 156 157//340788 warning: unhandled syscall: 318 (getrandom) 158//14709 15914768, ok 160 161//2990 Add detection of old ppc32 magic instructions from bug 278808. 1623015, ok 163 164//340856 disInstr(arm64): unhandled instruction 0x1E634C45 (fcsel) 165//2991 1663016, ok 167 168//340922 arm64: unhandled getgroups/setgroups syscalls 169//14716 17014769, ok 171 172//14721 Implement missing heap-intercept function "dh_malloc_usable_size". 17314770, ok 174 175//14728 Add test cases for all remaining AArch64 ARMv8 SIMD and FP instructions. 17614771, ok 177 178//2992 arm64: Implement "fcvtpu w, s". n-i-bz. 1793017, ok 180 181//2993 arm64: implement ADDP etc 1823018, ok 183 184//14730 arm64: enable test cases for 2993 18514772, ok 186 187//2994 fix stupid bug introduced in 2993 1883019, ok 189 190//340807 disInstr(arm): unhandled instruction: 0xEE989B20 191//2995, 14736. 1923020 ok, 14758 ok 193 19414738 arm64: Add test cases for {S,U}CVTF fixedpt-to-fp. 195NO_MERGE 196 197//14739 arm64: Update mysteriously out-of-date fp_and_simd.stdout.exp. 19814773, ok 199 200//2996 arm64: Implement {S,U}CVTF (scalar, fixedpt). 2013021, ok 202 203//14740 isBogusAtom: handle missing case Ico_F32. 204//(needed by 3021) 20514774, ok 206 207//2997 arm64: enable FCVT{A,N}S X,S. 2083022, ok 209