1 /* BFD back-end for Renesas H8/300 COFF binaries.
2 Copyright (C) 1990-2014 Free Software Foundation, Inc.
3 Written by Steve Chamberlain, <sac@cygnus.com>.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
21
22 #include "sysdep.h"
23 #include "bfd.h"
24 #include "libbfd.h"
25 #include "bfdlink.h"
26 #include "genlink.h"
27 #include "coff/h8300.h"
28 #include "coff/internal.h"
29 #include "libcoff.h"
30 #include "libiberty.h"
31
32 #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (1)
33
34 /* We derive a hash table from the basic BFD hash table to
35 hold entries in the function vector. Aside from the
36 info stored by the basic hash table, we need the offset
37 of a particular entry within the hash table as well as
38 the offset where we'll add the next entry. */
39
40 struct funcvec_hash_entry
41 {
42 /* The basic hash table entry. */
43 struct bfd_hash_entry root;
44
45 /* The offset within the vectors section where
46 this entry lives. */
47 bfd_vma offset;
48 };
49
50 struct funcvec_hash_table
51 {
52 /* The basic hash table. */
53 struct bfd_hash_table root;
54
55 bfd *abfd;
56
57 /* Offset at which we'll add the next entry. */
58 unsigned int offset;
59 };
60
61
62 /* To lookup a value in the function vector hash table. */
63 #define funcvec_hash_lookup(table, string, create, copy) \
64 ((struct funcvec_hash_entry *) \
65 bfd_hash_lookup (&(table)->root, (string), (create), (copy)))
66
67 /* The derived h8300 COFF linker table. Note it's derived from
68 the generic linker hash table, not the COFF backend linker hash
69 table! We use this to attach additional data structures we
70 need while linking on the h8300. */
71 struct h8300_coff_link_hash_table {
72 /* The main hash table. */
73 struct generic_link_hash_table root;
74
75 /* Section for the vectors table. This gets attached to a
76 random input bfd, we keep it here for easy access. */
77 asection *vectors_sec;
78
79 /* Hash table of the functions we need to enter into the function
80 vector. */
81 struct funcvec_hash_table *funcvec_hash_table;
82 };
83
84 static struct bfd_link_hash_table *h8300_coff_link_hash_table_create (bfd *);
85
86 /* Get the H8/300 COFF linker hash table from a link_info structure. */
87
88 #define h8300_coff_hash_table(p) \
89 ((struct h8300_coff_link_hash_table *) ((coff_hash_table (p))))
90
91 /* Initialize fields within a funcvec hash table entry. Called whenever
92 a new entry is added to the funcvec hash table. */
93
94 static struct bfd_hash_entry *
funcvec_hash_newfunc(struct bfd_hash_entry * entry,struct bfd_hash_table * gen_table,const char * string)95 funcvec_hash_newfunc (struct bfd_hash_entry *entry,
96 struct bfd_hash_table *gen_table,
97 const char *string)
98 {
99 struct funcvec_hash_entry *ret;
100 struct funcvec_hash_table *table;
101
102 ret = (struct funcvec_hash_entry *) entry;
103 table = (struct funcvec_hash_table *) gen_table;
104
105 /* Allocate the structure if it has not already been allocated by a
106 subclass. */
107 if (ret == NULL)
108 ret = ((struct funcvec_hash_entry *)
109 bfd_hash_allocate (gen_table,
110 sizeof (struct funcvec_hash_entry)));
111 if (ret == NULL)
112 return NULL;
113
114 /* Call the allocation method of the superclass. */
115 ret = ((struct funcvec_hash_entry *)
116 bfd_hash_newfunc ((struct bfd_hash_entry *) ret, gen_table, string));
117
118 if (ret == NULL)
119 return NULL;
120
121 /* Note where this entry will reside in the function vector table. */
122 ret->offset = table->offset;
123
124 /* Bump the offset at which we store entries in the function
125 vector. We'd like to bump up the size of the vectors section,
126 but it's not easily available here. */
127 switch (bfd_get_mach (table->abfd))
128 {
129 case bfd_mach_h8300:
130 case bfd_mach_h8300hn:
131 case bfd_mach_h8300sn:
132 table->offset += 2;
133 break;
134 case bfd_mach_h8300h:
135 case bfd_mach_h8300s:
136 table->offset += 4;
137 break;
138 default:
139 return NULL;
140 }
141
142 /* Everything went OK. */
143 return (struct bfd_hash_entry *) ret;
144 }
145
146 /* Initialize the function vector hash table. */
147
148 static bfd_boolean
funcvec_hash_table_init(struct funcvec_hash_table * table,bfd * abfd,struct bfd_hash_entry * (* newfunc)(struct bfd_hash_entry *,struct bfd_hash_table *,const char *),unsigned int entsize)149 funcvec_hash_table_init (struct funcvec_hash_table *table,
150 bfd *abfd,
151 struct bfd_hash_entry *(*newfunc)
152 (struct bfd_hash_entry *,
153 struct bfd_hash_table *,
154 const char *),
155 unsigned int entsize)
156 {
157 /* Initialize our local fields, then call the generic initialization
158 routine. */
159 table->offset = 0;
160 table->abfd = abfd;
161 return (bfd_hash_table_init (&table->root, newfunc, entsize));
162 }
163
164 /* Create the derived linker hash table. We use a derived hash table
165 basically to hold "static" information during an H8/300 coff link
166 without using static variables. */
167
168 static struct bfd_link_hash_table *
h8300_coff_link_hash_table_create(bfd * abfd)169 h8300_coff_link_hash_table_create (bfd *abfd)
170 {
171 struct h8300_coff_link_hash_table *ret;
172 bfd_size_type amt = sizeof (struct h8300_coff_link_hash_table);
173
174 ret = (struct h8300_coff_link_hash_table *) bfd_zmalloc (amt);
175 if (ret == NULL)
176 return NULL;
177 if (!_bfd_link_hash_table_init (&ret->root.root, abfd,
178 _bfd_generic_link_hash_newfunc,
179 sizeof (struct generic_link_hash_entry)))
180 {
181 free (ret);
182 return NULL;
183 }
184
185 return &ret->root.root;
186 }
187
188 /* Special handling for H8/300 relocs.
189 We only come here for pcrel stuff and return normally if not an -r link.
190 When doing -r, we can't do any arithmetic for the pcrel stuff, because
191 the code in reloc.c assumes that we can manipulate the targets of
192 the pcrel branches. This isn't so, since the H8/300 can do relaxing,
193 which means that the gap after the instruction may not be enough to
194 contain the offset required for the branch, so we have to use only
195 the addend until the final link. */
196
197 static bfd_reloc_status_type
special(bfd * abfd ATTRIBUTE_UNUSED,arelent * reloc_entry ATTRIBUTE_UNUSED,asymbol * symbol ATTRIBUTE_UNUSED,void * data ATTRIBUTE_UNUSED,asection * input_section ATTRIBUTE_UNUSED,bfd * output_bfd,char ** error_message ATTRIBUTE_UNUSED)198 special (bfd * abfd ATTRIBUTE_UNUSED,
199 arelent * reloc_entry ATTRIBUTE_UNUSED,
200 asymbol * symbol ATTRIBUTE_UNUSED,
201 void * data ATTRIBUTE_UNUSED,
202 asection * input_section ATTRIBUTE_UNUSED,
203 bfd * output_bfd,
204 char ** error_message ATTRIBUTE_UNUSED)
205 {
206 if (output_bfd == (bfd *) NULL)
207 return bfd_reloc_continue;
208
209 /* Adjust the reloc address to that in the output section. */
210 reloc_entry->address += input_section->output_offset;
211 return bfd_reloc_ok;
212 }
213
214 static reloc_howto_type howto_table[] =
215 {
216 HOWTO (R_RELBYTE, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8", FALSE, 0x000000ff, 0x000000ff, FALSE),
217 HOWTO (R_RELWORD, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
218 HOWTO (R_RELLONG, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "32", FALSE, 0xffffffff, 0xffffffff, FALSE),
219 HOWTO (R_PCRBYTE, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8", FALSE, 0x000000ff, 0x000000ff, TRUE),
220 HOWTO (R_PCRWORD, 0, 1, 16, TRUE, 0, complain_overflow_signed, special, "DISP16", FALSE, 0x0000ffff, 0x0000ffff, TRUE),
221 HOWTO (R_PCRLONG, 0, 2, 32, TRUE, 0, complain_overflow_signed, special, "DISP32", FALSE, 0xffffffff, 0xffffffff, TRUE),
222 HOWTO (R_MOV16B1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:16", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
223 HOWTO (R_MOV16B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:16", FALSE, 0x000000ff, 0x000000ff, FALSE),
224 HOWTO (R_JMP1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16/pcrel", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
225 HOWTO (R_JMP2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pcrecl/16", FALSE, 0x000000ff, 0x000000ff, FALSE),
226 HOWTO (R_JMPL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "24/pcrell", FALSE, 0x00ffffff, 0x00ffffff, FALSE),
227 HOWTO (R_JMPL2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pc8/24", FALSE, 0x000000ff, 0x000000ff, FALSE),
228 HOWTO (R_MOV24B1, 0, 1, 32, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:24", FALSE, 0xffffffff, 0xffffffff, FALSE),
229 HOWTO (R_MOV24B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:24", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
230
231 /* An indirect reference to a function. This causes the function's address
232 to be added to the function vector in lo-mem and puts the address of
233 the function vector's entry in the jsr instruction. */
234 HOWTO (R_MEM_INDIRECT, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8/indirect", FALSE, 0x000000ff, 0x000000ff, FALSE),
235
236 /* Internal reloc for relaxing. This is created when a 16-bit pc-relative
237 branch is turned into an 8-bit pc-relative branch. */
238 HOWTO (R_PCRWORD_B, 0, 0, 8, TRUE, 0, complain_overflow_bitfield, special, "relaxed bCC:16", FALSE, 0x000000ff, 0x000000ff, FALSE),
239
240 HOWTO (R_MOVL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,special, "32/24 relaxable move", FALSE, 0xffffffff, 0xffffffff, FALSE),
241
242 HOWTO (R_MOVL2, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "32/24 relaxed move", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
243
244 HOWTO (R_BCC_INV, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8 inverted", FALSE, 0x000000ff, 0x000000ff, TRUE),
245
246 HOWTO (R_JMP_DEL, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "Deleted jump", FALSE, 0x000000ff, 0x000000ff, TRUE),
247 };
248
249 /* Turn a howto into a reloc number. */
250
251 #define SELECT_RELOC(x,howto) \
252 { x.r_type = select_reloc (howto); }
253
254 #define BADMAG(x) (H8300BADMAG (x) && H8300HBADMAG (x) && H8300SBADMAG (x) \
255 && H8300HNBADMAG(x) && H8300SNBADMAG(x))
256 #define H8300 1 /* Customize coffcode.h */
257 #define __A_MAGIC_SET__
258
259 /* Code to swap in the reloc. */
260 #define SWAP_IN_RELOC_OFFSET H_GET_32
261 #define SWAP_OUT_RELOC_OFFSET H_PUT_32
262 #define SWAP_OUT_RELOC_EXTRA(abfd, src, dst) \
263 dst->r_stuff[0] = 'S'; \
264 dst->r_stuff[1] = 'C';
265
266 static int
select_reloc(reloc_howto_type * howto)267 select_reloc (reloc_howto_type *howto)
268 {
269 return howto->type;
270 }
271
272 /* Code to turn a r_type into a howto ptr, uses the above howto table. */
273
274 static void
rtype2howto(arelent * internal,struct internal_reloc * dst)275 rtype2howto (arelent *internal, struct internal_reloc *dst)
276 {
277 switch (dst->r_type)
278 {
279 case R_RELBYTE:
280 internal->howto = howto_table + 0;
281 break;
282 case R_RELWORD:
283 internal->howto = howto_table + 1;
284 break;
285 case R_RELLONG:
286 internal->howto = howto_table + 2;
287 break;
288 case R_PCRBYTE:
289 internal->howto = howto_table + 3;
290 break;
291 case R_PCRWORD:
292 internal->howto = howto_table + 4;
293 break;
294 case R_PCRLONG:
295 internal->howto = howto_table + 5;
296 break;
297 case R_MOV16B1:
298 internal->howto = howto_table + 6;
299 break;
300 case R_MOV16B2:
301 internal->howto = howto_table + 7;
302 break;
303 case R_JMP1:
304 internal->howto = howto_table + 8;
305 break;
306 case R_JMP2:
307 internal->howto = howto_table + 9;
308 break;
309 case R_JMPL1:
310 internal->howto = howto_table + 10;
311 break;
312 case R_JMPL2:
313 internal->howto = howto_table + 11;
314 break;
315 case R_MOV24B1:
316 internal->howto = howto_table + 12;
317 break;
318 case R_MOV24B2:
319 internal->howto = howto_table + 13;
320 break;
321 case R_MEM_INDIRECT:
322 internal->howto = howto_table + 14;
323 break;
324 case R_PCRWORD_B:
325 internal->howto = howto_table + 15;
326 break;
327 case R_MOVL1:
328 internal->howto = howto_table + 16;
329 break;
330 case R_MOVL2:
331 internal->howto = howto_table + 17;
332 break;
333 case R_BCC_INV:
334 internal->howto = howto_table + 18;
335 break;
336 case R_JMP_DEL:
337 internal->howto = howto_table + 19;
338 break;
339 default:
340 abort ();
341 break;
342 }
343 }
344
345 #define RTYPE2HOWTO(internal, relocentry) rtype2howto (internal, relocentry)
346
347 /* Perform any necessary magic to the addend in a reloc entry. */
348
349 #define CALC_ADDEND(abfd, symbol, ext_reloc, cache_ptr) \
350 cache_ptr->addend = ext_reloc.r_offset;
351
352 #define RELOC_PROCESSING(relent,reloc,symbols,abfd,section) \
353 reloc_processing (relent, reloc, symbols, abfd, section)
354
355 static void
reloc_processing(arelent * relent,struct internal_reloc * reloc,asymbol ** symbols,bfd * abfd,asection * section)356 reloc_processing (arelent *relent, struct internal_reloc *reloc,
357 asymbol **symbols, bfd *abfd, asection *section)
358 {
359 relent->address = reloc->r_vaddr;
360 rtype2howto (relent, reloc);
361
362 if (((int) reloc->r_symndx) > 0)
363 relent->sym_ptr_ptr = symbols + obj_convert (abfd)[reloc->r_symndx];
364 else
365 relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
366
367 relent->addend = reloc->r_offset;
368 relent->address -= section->vma;
369 }
370
371 static bfd_boolean
h8300_symbol_address_p(bfd * abfd,asection * input_section,bfd_vma address)372 h8300_symbol_address_p (bfd *abfd, asection *input_section, bfd_vma address)
373 {
374 asymbol **s;
375
376 s = _bfd_generic_link_get_symbols (abfd);
377 BFD_ASSERT (s != (asymbol **) NULL);
378
379 /* Search all the symbols for one in INPUT_SECTION with
380 address ADDRESS. */
381 while (*s)
382 {
383 asymbol *p = *s;
384
385 if (p->section == input_section
386 && (input_section->output_section->vma
387 + input_section->output_offset
388 + p->value) == address)
389 return TRUE;
390 s++;
391 }
392 return FALSE;
393 }
394
395 /* If RELOC represents a relaxable instruction/reloc, change it into
396 the relaxed reloc, notify the linker that symbol addresses
397 have changed (bfd_perform_slip) and return how much the current
398 section has shrunk by.
399
400 FIXME: Much of this code has knowledge of the ordering of entries
401 in the howto table. This needs to be fixed. */
402
403 static int
h8300_reloc16_estimate(bfd * abfd,asection * input_section,arelent * reloc,unsigned int shrink,struct bfd_link_info * link_info)404 h8300_reloc16_estimate (bfd *abfd, asection *input_section, arelent *reloc,
405 unsigned int shrink, struct bfd_link_info *link_info)
406 {
407 bfd_vma value;
408 bfd_vma dot;
409 bfd_vma gap;
410 static asection *last_input_section = NULL;
411 static arelent *last_reloc = NULL;
412
413 /* The address of the thing to be relocated will have moved back by
414 the size of the shrink - but we don't change reloc->address here,
415 since we need it to know where the relocation lives in the source
416 uncooked section. */
417 bfd_vma address = reloc->address - shrink;
418
419 if (input_section != last_input_section)
420 last_reloc = NULL;
421
422 /* Only examine the relocs which might be relaxable. */
423 switch (reloc->howto->type)
424 {
425 /* This is the 16-/24-bit absolute branch which could become an
426 8-bit pc-relative branch. */
427 case R_JMP1:
428 case R_JMPL1:
429 /* Get the address of the target of this branch. */
430 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
431
432 /* Get the address of the next instruction (not the reloc). */
433 dot = (input_section->output_section->vma
434 + input_section->output_offset + address);
435
436 /* Adjust for R_JMP1 vs R_JMPL1. */
437 dot += (reloc->howto->type == R_JMP1 ? 1 : 2);
438
439 /* Compute the distance from this insn to the branch target. */
440 gap = value - dot;
441
442 /* If the distance is within -128..+128 inclusive, then we can relax
443 this jump. +128 is valid since the target will move two bytes
444 closer if we do relax this branch. */
445 if ((int) gap >= -128 && (int) gap <= 128)
446 {
447 bfd_byte code;
448
449 if (!bfd_get_section_contents (abfd, input_section, & code,
450 reloc->address, 1))
451 break;
452 code = bfd_get_8 (abfd, & code);
453
454 /* It's possible we may be able to eliminate this branch entirely;
455 if the previous instruction is a branch around this instruction,
456 and there's no label at this instruction, then we can reverse
457 the condition on the previous branch and eliminate this jump.
458
459 original: new:
460 bCC lab1 bCC' lab2
461 jmp lab2
462 lab1: lab1:
463
464 This saves 4 bytes instead of two, and should be relatively
465 common.
466
467 Only perform this optimisation for jumps (code 0x5a) not
468 subroutine calls, as otherwise it could transform:
469
470 mov.w r0,r0
471 beq .L1
472 jsr @_bar
473 .L1: rts
474 _bar: rts
475 into:
476 mov.w r0,r0
477 bne _bar
478 rts
479 _bar: rts
480
481 which changes the call (jsr) into a branch (bne). */
482 if (code == 0x5a
483 && gap <= 126
484 && last_reloc
485 && last_reloc->howto->type == R_PCRBYTE)
486 {
487 bfd_vma last_value;
488 last_value = bfd_coff_reloc16_get_value (last_reloc, link_info,
489 input_section) + 1;
490
491 if (last_value == dot + 2
492 && last_reloc->address + 1 == reloc->address
493 && !h8300_symbol_address_p (abfd, input_section, dot - 2))
494 {
495 reloc->howto = howto_table + 19;
496 last_reloc->howto = howto_table + 18;
497 last_reloc->sym_ptr_ptr = reloc->sym_ptr_ptr;
498 last_reloc->addend = reloc->addend;
499 shrink += 4;
500 bfd_perform_slip (abfd, 4, input_section, address);
501 break;
502 }
503 }
504
505 /* Change the reloc type. */
506 reloc->howto = reloc->howto + 1;
507
508 /* This shrinks this section by two bytes. */
509 shrink += 2;
510 bfd_perform_slip (abfd, 2, input_section, address);
511 }
512 break;
513
514 /* This is the 16-bit pc-relative branch which could become an 8-bit
515 pc-relative branch. */
516 case R_PCRWORD:
517 /* Get the address of the target of this branch, add one to the value
518 because the addend field in PCrel jumps is off by -1. */
519 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section) + 1;
520
521 /* Get the address of the next instruction if we were to relax. */
522 dot = input_section->output_section->vma +
523 input_section->output_offset + address;
524
525 /* Compute the distance from this insn to the branch target. */
526 gap = value - dot;
527
528 /* If the distance is within -128..+128 inclusive, then we can relax
529 this jump. +128 is valid since the target will move two bytes
530 closer if we do relax this branch. */
531 if ((int) gap >= -128 && (int) gap <= 128)
532 {
533 /* Change the reloc type. */
534 reloc->howto = howto_table + 15;
535
536 /* This shrinks this section by two bytes. */
537 shrink += 2;
538 bfd_perform_slip (abfd, 2, input_section, address);
539 }
540 break;
541
542 /* This is a 16-bit absolute address in a mov.b insn, which can
543 become an 8-bit absolute address if it's in the right range. */
544 case R_MOV16B1:
545 /* Get the address of the data referenced by this mov.b insn. */
546 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
547 value = bfd_h8300_pad_address (abfd, value);
548
549 /* If the address is in the top 256 bytes of the address space
550 then we can relax this instruction. */
551 if (value >= 0xffffff00u)
552 {
553 /* Change the reloc type. */
554 reloc->howto = reloc->howto + 1;
555
556 /* This shrinks this section by two bytes. */
557 shrink += 2;
558 bfd_perform_slip (abfd, 2, input_section, address);
559 }
560 break;
561
562 /* Similarly for a 24-bit absolute address in a mov.b. Note that
563 if we can't relax this into an 8-bit absolute, we'll fall through
564 and try to relax it into a 16-bit absolute. */
565 case R_MOV24B1:
566 /* Get the address of the data referenced by this mov.b insn. */
567 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
568 value = bfd_h8300_pad_address (abfd, value);
569
570 if (value >= 0xffffff00u)
571 {
572 /* Change the reloc type. */
573 reloc->howto = reloc->howto + 1;
574
575 /* This shrinks this section by four bytes. */
576 shrink += 4;
577 bfd_perform_slip (abfd, 4, input_section, address);
578
579 /* Done with this reloc. */
580 break;
581 }
582
583 /* FALLTHROUGH and try to turn the 24-/32-bit reloc into a 16-bit
584 reloc. */
585
586 /* This is a 24-/32-bit absolute address in a mov insn, which can
587 become an 16-bit absolute address if it's in the right range. */
588 case R_MOVL1:
589 /* Get the address of the data referenced by this mov insn. */
590 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
591 value = bfd_h8300_pad_address (abfd, value);
592
593 /* If the address is a sign-extended 16-bit value then we can
594 relax this instruction. */
595 if (value <= 0x7fff || value >= 0xffff8000u)
596 {
597 /* Change the reloc type. */
598 reloc->howto = howto_table + 17;
599
600 /* This shrinks this section by two bytes. */
601 shrink += 2;
602 bfd_perform_slip (abfd, 2, input_section, address);
603 }
604 break;
605
606 /* No other reloc types represent relaxing opportunities. */
607 default:
608 break;
609 }
610
611 last_reloc = reloc;
612 last_input_section = input_section;
613 return shrink;
614 }
615
616 /* Handle relocations for the H8/300, including relocs for relaxed
617 instructions.
618
619 FIXME: Not all relocations check for overflow! */
620
621 static void
h8300_reloc16_extra_cases(bfd * abfd,struct bfd_link_info * link_info,struct bfd_link_order * link_order,arelent * reloc,bfd_byte * data,unsigned int * src_ptr,unsigned int * dst_ptr)622 h8300_reloc16_extra_cases (bfd *abfd, struct bfd_link_info *link_info,
623 struct bfd_link_order *link_order, arelent *reloc,
624 bfd_byte *data, unsigned int *src_ptr,
625 unsigned int *dst_ptr)
626 {
627 unsigned int src_address = *src_ptr;
628 unsigned int dst_address = *dst_ptr;
629 asection *input_section = link_order->u.indirect.section;
630 bfd_vma value;
631 bfd_vma dot;
632 int gap, tmp;
633 unsigned char temp_code;
634
635 switch (reloc->howto->type)
636 {
637 /* Generic 8-bit pc-relative relocation. */
638 case R_PCRBYTE:
639 /* Get the address of the target of this branch. */
640 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
641
642 dot = (input_section->output_offset
643 + dst_address
644 + link_order->u.indirect.section->output_section->vma);
645
646 gap = value - dot;
647
648 /* Sanity check. */
649 if (gap < -128 || gap > 126)
650 {
651 if (! ((*link_info->callbacks->reloc_overflow)
652 (link_info, NULL,
653 bfd_asymbol_name (*reloc->sym_ptr_ptr),
654 reloc->howto->name, reloc->addend, input_section->owner,
655 input_section, reloc->address)))
656 abort ();
657 }
658
659 /* Everything looks OK. Apply the relocation and update the
660 src/dst address appropriately. */
661 bfd_put_8 (abfd, gap, data + dst_address);
662 dst_address++;
663 src_address++;
664
665 /* All done. */
666 break;
667
668 /* Generic 16-bit pc-relative relocation. */
669 case R_PCRWORD:
670 /* Get the address of the target of this branch. */
671 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
672
673 /* Get the address of the instruction (not the reloc). */
674 dot = (input_section->output_offset
675 + dst_address
676 + link_order->u.indirect.section->output_section->vma + 1);
677
678 gap = value - dot;
679
680 /* Sanity check. */
681 if (gap > 32766 || gap < -32768)
682 {
683 if (! ((*link_info->callbacks->reloc_overflow)
684 (link_info, NULL,
685 bfd_asymbol_name (*reloc->sym_ptr_ptr),
686 reloc->howto->name, reloc->addend, input_section->owner,
687 input_section, reloc->address)))
688 abort ();
689 }
690
691 /* Everything looks OK. Apply the relocation and update the
692 src/dst address appropriately. */
693 bfd_put_16 (abfd, (bfd_vma) gap, data + dst_address);
694 dst_address += 2;
695 src_address += 2;
696
697 /* All done. */
698 break;
699
700 /* Generic 8-bit absolute relocation. */
701 case R_RELBYTE:
702 /* Get the address of the object referenced by this insn. */
703 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
704
705 bfd_put_8 (abfd, value & 0xff, data + dst_address);
706 dst_address += 1;
707 src_address += 1;
708
709 /* All done. */
710 break;
711
712 /* Various simple 16-bit absolute relocations. */
713 case R_MOV16B1:
714 case R_JMP1:
715 case R_RELWORD:
716 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
717 bfd_put_16 (abfd, value, data + dst_address);
718 dst_address += 2;
719 src_address += 2;
720 break;
721
722 /* Various simple 24-/32-bit absolute relocations. */
723 case R_MOV24B1:
724 case R_MOVL1:
725 case R_RELLONG:
726 /* Get the address of the target of this branch. */
727 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
728 bfd_put_32 (abfd, value, data + dst_address);
729 dst_address += 4;
730 src_address += 4;
731 break;
732
733 /* Another 24-/32-bit absolute relocation. */
734 case R_JMPL1:
735 /* Get the address of the target of this branch. */
736 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
737
738 value = ((value & 0x00ffffff)
739 | (bfd_get_32 (abfd, data + src_address) & 0xff000000));
740 bfd_put_32 (abfd, value, data + dst_address);
741 dst_address += 4;
742 src_address += 4;
743 break;
744
745 /* This is a 24-/32-bit absolute address in one of the following
746 instructions:
747
748 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
749 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", "ldc.w",
750 "stc.w" and "mov.[bwl]"
751
752 We may relax this into an 16-bit absolute address if it's in
753 the right range. */
754 case R_MOVL2:
755 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
756 value = bfd_h8300_pad_address (abfd, value);
757
758 /* Sanity check. */
759 if (value <= 0x7fff || value >= 0xffff8000u)
760 {
761 /* Insert the 16-bit value into the proper location. */
762 bfd_put_16 (abfd, value, data + dst_address);
763
764 /* Fix the opcode. For all the instructions that belong to
765 this relaxation, we simply need to turn off bit 0x20 in
766 the previous byte. */
767 data[dst_address - 1] &= ~0x20;
768 dst_address += 2;
769 src_address += 4;
770 }
771 else
772 {
773 if (! ((*link_info->callbacks->reloc_overflow)
774 (link_info, NULL,
775 bfd_asymbol_name (*reloc->sym_ptr_ptr),
776 reloc->howto->name, reloc->addend, input_section->owner,
777 input_section, reloc->address)))
778 abort ();
779 }
780 break;
781
782 /* A 16-bit absolute branch that is now an 8-bit pc-relative branch. */
783 case R_JMP2:
784 /* Get the address of the target of this branch. */
785 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
786
787 /* Get the address of the next instruction. */
788 dot = (input_section->output_offset
789 + dst_address
790 + link_order->u.indirect.section->output_section->vma + 1);
791
792 gap = value - dot;
793
794 /* Sanity check. */
795 if (gap < -128 || gap > 126)
796 {
797 if (! ((*link_info->callbacks->reloc_overflow)
798 (link_info, NULL,
799 bfd_asymbol_name (*reloc->sym_ptr_ptr),
800 reloc->howto->name, reloc->addend, input_section->owner,
801 input_section, reloc->address)))
802 abort ();
803 }
804
805 /* Now fix the instruction itself. */
806 switch (data[dst_address - 1])
807 {
808 case 0x5e:
809 /* jsr -> bsr */
810 bfd_put_8 (abfd, 0x55, data + dst_address - 1);
811 break;
812 case 0x5a:
813 /* jmp -> bra */
814 bfd_put_8 (abfd, 0x40, data + dst_address - 1);
815 break;
816
817 default:
818 abort ();
819 }
820
821 /* Write out the 8-bit value. */
822 bfd_put_8 (abfd, gap, data + dst_address);
823
824 dst_address += 1;
825 src_address += 3;
826
827 break;
828
829 /* A 16-bit pc-relative branch that is now an 8-bit pc-relative branch. */
830 case R_PCRWORD_B:
831 /* Get the address of the target of this branch. */
832 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
833
834 /* Get the address of the instruction (not the reloc). */
835 dot = (input_section->output_offset
836 + dst_address
837 + link_order->u.indirect.section->output_section->vma - 1);
838
839 gap = value - dot;
840
841 /* Sanity check. */
842 if (gap < -128 || gap > 126)
843 {
844 if (! ((*link_info->callbacks->reloc_overflow)
845 (link_info, NULL,
846 bfd_asymbol_name (*reloc->sym_ptr_ptr),
847 reloc->howto->name, reloc->addend, input_section->owner,
848 input_section, reloc->address)))
849 abort ();
850 }
851
852 /* Now fix the instruction. */
853 switch (data[dst_address - 2])
854 {
855 case 0x58:
856 /* bCC:16 -> bCC:8 */
857 /* Get the second byte of the original insn, which contains
858 the condition code. */
859 tmp = data[dst_address - 1];
860
861 /* Compute the fisrt byte of the relaxed instruction. The
862 original sequence 0x58 0xX0 is relaxed to 0x4X, where X
863 represents the condition code. */
864 tmp &= 0xf0;
865 tmp >>= 4;
866 tmp |= 0x40;
867
868 /* Write it. */
869 bfd_put_8 (abfd, tmp, data + dst_address - 2);
870 break;
871
872 case 0x5c:
873 /* bsr:16 -> bsr:8 */
874 bfd_put_8 (abfd, 0x55, data + dst_address - 2);
875 break;
876
877 default:
878 abort ();
879 }
880
881 /* Output the target. */
882 bfd_put_8 (abfd, gap, data + dst_address - 1);
883
884 /* We don't advance dst_address -- the 8-bit reloc is applied at
885 dst_address - 1, so the next insn should begin at dst_address. */
886 src_address += 2;
887
888 break;
889
890 /* Similarly for a 24-bit absolute that is now 8 bits. */
891 case R_JMPL2:
892 /* Get the address of the target of this branch. */
893 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
894
895 /* Get the address of the instruction (not the reloc). */
896 dot = (input_section->output_offset
897 + dst_address
898 + link_order->u.indirect.section->output_section->vma + 2);
899
900 gap = value - dot;
901
902 /* Fix the instruction. */
903 switch (data[src_address])
904 {
905 case 0x5e:
906 /* jsr -> bsr */
907 bfd_put_8 (abfd, 0x55, data + dst_address);
908 break;
909 case 0x5a:
910 /* jmp ->bra */
911 bfd_put_8 (abfd, 0x40, data + dst_address);
912 break;
913 default:
914 abort ();
915 }
916
917 bfd_put_8 (abfd, gap, data + dst_address + 1);
918 dst_address += 2;
919 src_address += 4;
920
921 break;
922
923 /* This is a 16-bit absolute address in one of the following
924 instructions:
925
926 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
927 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and
928 "mov.b"
929
930 We may relax this into an 8-bit absolute address if it's in
931 the right range. */
932 case R_MOV16B2:
933 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
934
935 /* All instructions with R_H8_DIR16B2 start with 0x6a. */
936 if (data[dst_address - 2] != 0x6a)
937 abort ();
938
939 temp_code = data[src_address - 1];
940
941 /* If this is a mov.b instruction, clear the lower nibble, which
942 contains the source/destination register number. */
943 if ((temp_code & 0x10) != 0x10)
944 temp_code &= 0xf0;
945
946 /* Fix up the opcode. */
947 switch (temp_code)
948 {
949 case 0x00:
950 /* This is mov.b @aa:16,Rd. */
951 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20;
952 break;
953 case 0x80:
954 /* This is mov.b Rs,@aa:16. */
955 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30;
956 break;
957 case 0x18:
958 /* This is a bit-maniputation instruction that stores one
959 bit into memory, one of "bclr", "bist", "bnot", "bset",
960 and "bst". */
961 data[dst_address - 2] = 0x7f;
962 break;
963 case 0x10:
964 /* This is a bit-maniputation instruction that loads one bit
965 from memory, one of "band", "biand", "bild", "bior",
966 "bixor", "bld", "bor", "btst", and "bxor". */
967 data[dst_address - 2] = 0x7e;
968 break;
969 default:
970 abort ();
971 }
972
973 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
974 src_address += 2;
975 break;
976
977 /* This is a 24-bit absolute address in one of the following
978 instructions:
979
980 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
981 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and
982 "mov.b"
983
984 We may relax this into an 8-bit absolute address if it's in
985 the right range. */
986 case R_MOV24B2:
987 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
988
989 /* All instructions with R_MOV24B2 start with 0x6a. */
990 if (data[dst_address - 2] != 0x6a)
991 abort ();
992
993 temp_code = data[src_address - 1];
994
995 /* If this is a mov.b instruction, clear the lower nibble, which
996 contains the source/destination register number. */
997 if ((temp_code & 0x30) != 0x30)
998 temp_code &= 0xf0;
999
1000 /* Fix up the opcode. */
1001 switch (temp_code)
1002 {
1003 case 0x20:
1004 /* This is mov.b @aa:24/32,Rd. */
1005 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20;
1006 break;
1007 case 0xa0:
1008 /* This is mov.b Rs,@aa:24/32. */
1009 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30;
1010 break;
1011 case 0x38:
1012 /* This is a bit-maniputation instruction that stores one
1013 bit into memory, one of "bclr", "bist", "bnot", "bset",
1014 and "bst". */
1015 data[dst_address - 2] = 0x7f;
1016 break;
1017 case 0x30:
1018 /* This is a bit-maniputation instruction that loads one bit
1019 from memory, one of "band", "biand", "bild", "bior",
1020 "bixor", "bld", "bor", "btst", and "bxor". */
1021 data[dst_address - 2] = 0x7e;
1022 break;
1023 default:
1024 abort ();
1025 }
1026
1027 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
1028 src_address += 4;
1029 break;
1030
1031 case R_BCC_INV:
1032 /* Get the address of the target of this branch. */
1033 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1034
1035 dot = (input_section->output_offset
1036 + dst_address
1037 + link_order->u.indirect.section->output_section->vma) + 1;
1038
1039 gap = value - dot;
1040
1041 /* Sanity check. */
1042 if (gap < -128 || gap > 126)
1043 {
1044 if (! ((*link_info->callbacks->reloc_overflow)
1045 (link_info, NULL,
1046 bfd_asymbol_name (*reloc->sym_ptr_ptr),
1047 reloc->howto->name, reloc->addend, input_section->owner,
1048 input_section, reloc->address)))
1049 abort ();
1050 }
1051
1052 /* Everything looks OK. Fix the condition in the instruction, apply
1053 the relocation, and update the src/dst address appropriately. */
1054
1055 bfd_put_8 (abfd, bfd_get_8 (abfd, data + dst_address - 1) ^ 1,
1056 data + dst_address - 1);
1057 bfd_put_8 (abfd, gap, data + dst_address);
1058 dst_address++;
1059 src_address++;
1060
1061 /* All done. */
1062 break;
1063
1064 case R_JMP_DEL:
1065 src_address += 4;
1066 break;
1067
1068 /* An 8-bit memory indirect instruction (jmp/jsr).
1069
1070 There's several things that need to be done to handle
1071 this relocation.
1072
1073 If this is a reloc against the absolute symbol, then
1074 we should handle it just R_RELBYTE. Likewise if it's
1075 for a symbol with a value ge 0 and le 0xff.
1076
1077 Otherwise it's a jump/call through the function vector,
1078 and the linker is expected to set up the function vector
1079 and put the right value into the jump/call instruction. */
1080 case R_MEM_INDIRECT:
1081 {
1082 /* We need to find the symbol so we can determine it's
1083 address in the function vector table. */
1084 asymbol *symbol;
1085 const char *name;
1086 struct funcvec_hash_table *ftab;
1087 struct funcvec_hash_entry *h;
1088 struct h8300_coff_link_hash_table *htab;
1089 asection *vectors_sec;
1090
1091 if (link_info->output_bfd->xvec != abfd->xvec)
1092 {
1093 (*_bfd_error_handler)
1094 (_("cannot handle R_MEM_INDIRECT reloc when using %s output"),
1095 link_info->output_bfd->xvec->name);
1096
1097 /* What else can we do? This function doesn't allow return
1098 of an error, and we don't want to call abort as that
1099 indicates an internal error. */
1100 #ifndef EXIT_FAILURE
1101 #define EXIT_FAILURE 1
1102 #endif
1103 xexit (EXIT_FAILURE);
1104 }
1105 htab = h8300_coff_hash_table (link_info);
1106 vectors_sec = htab->vectors_sec;
1107
1108 /* First see if this is a reloc against the absolute symbol
1109 or against a symbol with a nonnegative value <= 0xff. */
1110 symbol = *(reloc->sym_ptr_ptr);
1111 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1112 if (symbol == bfd_abs_section_ptr->symbol
1113 || value <= 0xff)
1114 {
1115 /* This should be handled in a manner very similar to
1116 R_RELBYTES. If the value is in range, then just slam
1117 the value into the right location. Else trigger a
1118 reloc overflow callback. */
1119 if (value <= 0xff)
1120 {
1121 bfd_put_8 (abfd, value, data + dst_address);
1122 dst_address += 1;
1123 src_address += 1;
1124 }
1125 else
1126 {
1127 if (! ((*link_info->callbacks->reloc_overflow)
1128 (link_info, NULL,
1129 bfd_asymbol_name (*reloc->sym_ptr_ptr),
1130 reloc->howto->name, reloc->addend, input_section->owner,
1131 input_section, reloc->address)))
1132 abort ();
1133 }
1134 break;
1135 }
1136
1137 /* This is a jump/call through a function vector, and we're
1138 expected to create the function vector ourselves.
1139
1140 First look up this symbol in the linker hash table -- we need
1141 the derived linker symbol which holds this symbol's index
1142 in the function vector. */
1143 name = symbol->name;
1144 if (symbol->flags & BSF_LOCAL)
1145 {
1146 char *new_name = bfd_malloc ((bfd_size_type) strlen (name) + 10);
1147
1148 if (new_name == NULL)
1149 abort ();
1150
1151 sprintf (new_name, "%s_%08x", name, symbol->section->id);
1152 name = new_name;
1153 }
1154
1155 ftab = htab->funcvec_hash_table;
1156 h = funcvec_hash_lookup (ftab, name, FALSE, FALSE);
1157
1158 /* This shouldn't ever happen. If it does that means we've got
1159 data corruption of some kind. Aborting seems like a reasonable
1160 thing to do here. */
1161 if (h == NULL || vectors_sec == NULL)
1162 abort ();
1163
1164 /* Place the address of the function vector entry into the
1165 reloc's address. */
1166 bfd_put_8 (abfd,
1167 vectors_sec->output_offset + h->offset,
1168 data + dst_address);
1169
1170 dst_address++;
1171 src_address++;
1172
1173 /* Now create an entry in the function vector itself. */
1174 switch (bfd_get_mach (input_section->owner))
1175 {
1176 case bfd_mach_h8300:
1177 case bfd_mach_h8300hn:
1178 case bfd_mach_h8300sn:
1179 bfd_put_16 (abfd,
1180 bfd_coff_reloc16_get_value (reloc,
1181 link_info,
1182 input_section),
1183 vectors_sec->contents + h->offset);
1184 break;
1185 case bfd_mach_h8300h:
1186 case bfd_mach_h8300s:
1187 bfd_put_32 (abfd,
1188 bfd_coff_reloc16_get_value (reloc,
1189 link_info,
1190 input_section),
1191 vectors_sec->contents + h->offset);
1192 break;
1193 default:
1194 abort ();
1195 }
1196
1197 /* Gross. We've already written the contents of the vector section
1198 before we get here... So we write it again with the new data. */
1199 bfd_set_section_contents (vectors_sec->output_section->owner,
1200 vectors_sec->output_section,
1201 vectors_sec->contents,
1202 (file_ptr) vectors_sec->output_offset,
1203 vectors_sec->size);
1204 break;
1205 }
1206
1207 default:
1208 abort ();
1209 break;
1210
1211 }
1212
1213 *src_ptr = src_address;
1214 *dst_ptr = dst_address;
1215 }
1216
1217 /* Routine for the h8300 linker.
1218
1219 This routine is necessary to handle the special R_MEM_INDIRECT
1220 relocs on the h8300. It's responsible for generating a vectors
1221 section and attaching it to an input bfd as well as sizing
1222 the vectors section. It also creates our vectors hash table.
1223
1224 It uses the generic linker routines to actually add the symbols.
1225 from this BFD to the bfd linker hash table. It may add a few
1226 selected static symbols to the bfd linker hash table. */
1227
1228 static bfd_boolean
h8300_bfd_link_add_symbols(bfd * abfd,struct bfd_link_info * info)1229 h8300_bfd_link_add_symbols (bfd *abfd, struct bfd_link_info *info)
1230 {
1231 asection *sec;
1232 struct funcvec_hash_table *funcvec_hash_table;
1233 bfd_size_type amt;
1234 struct h8300_coff_link_hash_table *htab;
1235
1236 /* Add the symbols using the generic code. */
1237 _bfd_generic_link_add_symbols (abfd, info);
1238
1239 if (info->output_bfd->xvec != abfd->xvec)
1240 return TRUE;
1241
1242 htab = h8300_coff_hash_table (info);
1243
1244 /* If we haven't created a vectors section, do so now. */
1245 if (!htab->vectors_sec)
1246 {
1247 flagword flags;
1248
1249 /* Make sure the appropriate flags are set, including SEC_IN_MEMORY. */
1250 flags = (SEC_ALLOC | SEC_LOAD
1251 | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_READONLY);
1252 htab->vectors_sec = bfd_make_section_with_flags (abfd, ".vectors",
1253 flags);
1254
1255 /* If the section wasn't created, or we couldn't set the flags,
1256 quit quickly now, rather than dying a painful death later. */
1257 if (!htab->vectors_sec)
1258 return FALSE;
1259
1260 /* Also create the vector hash table. */
1261 amt = sizeof (struct funcvec_hash_table);
1262 funcvec_hash_table = (struct funcvec_hash_table *) bfd_alloc (abfd, amt);
1263
1264 if (!funcvec_hash_table)
1265 return FALSE;
1266
1267 /* And initialize the funcvec hash table. */
1268 if (!funcvec_hash_table_init (funcvec_hash_table, abfd,
1269 funcvec_hash_newfunc,
1270 sizeof (struct funcvec_hash_entry)))
1271 {
1272 bfd_release (abfd, funcvec_hash_table);
1273 return FALSE;
1274 }
1275
1276 /* Store away a pointer to the funcvec hash table. */
1277 htab->funcvec_hash_table = funcvec_hash_table;
1278 }
1279
1280 /* Load up the function vector hash table. */
1281 funcvec_hash_table = htab->funcvec_hash_table;
1282
1283 /* Now scan the relocs for all the sections in this bfd; create
1284 additional space in the .vectors section as needed. */
1285 for (sec = abfd->sections; sec; sec = sec->next)
1286 {
1287 long reloc_size, reloc_count, i;
1288 asymbol **symbols;
1289 arelent **relocs;
1290
1291 /* Suck in the relocs, symbols & canonicalize them. */
1292 reloc_size = bfd_get_reloc_upper_bound (abfd, sec);
1293 if (reloc_size <= 0)
1294 continue;
1295
1296 relocs = (arelent **) bfd_malloc ((bfd_size_type) reloc_size);
1297 if (!relocs)
1298 return FALSE;
1299
1300 /* The symbols should have been read in by _bfd_generic link_add_symbols
1301 call abovec, so we can cheat and use the pointer to them that was
1302 saved in the above call. */
1303 symbols = _bfd_generic_link_get_symbols(abfd);
1304 reloc_count = bfd_canonicalize_reloc (abfd, sec, relocs, symbols);
1305 if (reloc_count <= 0)
1306 {
1307 free (relocs);
1308 continue;
1309 }
1310
1311 /* Now walk through all the relocations in this section. */
1312 for (i = 0; i < reloc_count; i++)
1313 {
1314 arelent *reloc = relocs[i];
1315 asymbol *symbol = *(reloc->sym_ptr_ptr);
1316 const char *name;
1317
1318 /* We've got an indirect reloc. See if we need to add it
1319 to the function vector table. At this point, we have
1320 to add a new entry for each unique symbol referenced
1321 by an R_MEM_INDIRECT relocation except for a reloc
1322 against the absolute section symbol. */
1323 if (reloc->howto->type == R_MEM_INDIRECT
1324 && symbol != bfd_abs_section_ptr->symbol)
1325
1326 {
1327 struct funcvec_hash_table *ftab;
1328 struct funcvec_hash_entry *h;
1329
1330 name = symbol->name;
1331 if (symbol->flags & BSF_LOCAL)
1332 {
1333 char *new_name;
1334
1335 new_name = bfd_malloc ((bfd_size_type) strlen (name) + 10);
1336 if (new_name == NULL)
1337 abort ();
1338
1339 sprintf (new_name, "%s_%08x", name, symbol->section->id);
1340 name = new_name;
1341 }
1342
1343 /* Look this symbol up in the function vector hash table. */
1344 ftab = htab->funcvec_hash_table;
1345 h = funcvec_hash_lookup (ftab, name, FALSE, FALSE);
1346
1347 /* If this symbol isn't already in the hash table, add
1348 it and bump up the size of the hash table. */
1349 if (h == NULL)
1350 {
1351 h = funcvec_hash_lookup (ftab, name, TRUE, TRUE);
1352 if (h == NULL)
1353 {
1354 free (relocs);
1355 return FALSE;
1356 }
1357
1358 /* Bump the size of the vectors section. Each vector
1359 takes 2 bytes on the h8300 and 4 bytes on the h8300h. */
1360 switch (bfd_get_mach (abfd))
1361 {
1362 case bfd_mach_h8300:
1363 case bfd_mach_h8300hn:
1364 case bfd_mach_h8300sn:
1365 htab->vectors_sec->size += 2;
1366 break;
1367 case bfd_mach_h8300h:
1368 case bfd_mach_h8300s:
1369 htab->vectors_sec->size += 4;
1370 break;
1371 default:
1372 abort ();
1373 }
1374 }
1375 }
1376 }
1377
1378 /* We're done with the relocations, release them. */
1379 free (relocs);
1380 }
1381
1382 /* Now actually allocate some space for the function vector. It's
1383 wasteful to do this more than once, but this is easier. */
1384 sec = htab->vectors_sec;
1385 if (sec->size != 0)
1386 {
1387 /* Free the old contents. */
1388 if (sec->contents)
1389 free (sec->contents);
1390
1391 /* Allocate new contents. */
1392 sec->contents = bfd_malloc (sec->size);
1393 }
1394
1395 return TRUE;
1396 }
1397
1398 #define coff_reloc16_extra_cases h8300_reloc16_extra_cases
1399 #define coff_reloc16_estimate h8300_reloc16_estimate
1400 #define coff_bfd_link_add_symbols h8300_bfd_link_add_symbols
1401 #define coff_bfd_link_hash_table_create h8300_coff_link_hash_table_create
1402
1403 #define COFF_LONG_FILENAMES
1404
1405 #ifndef bfd_pe_print_pdata
1406 #define bfd_pe_print_pdata NULL
1407 #endif
1408
1409 #include "coffcode.h"
1410
1411 #undef coff_bfd_get_relocated_section_contents
1412 #undef coff_bfd_relax_section
1413 #define coff_bfd_get_relocated_section_contents \
1414 bfd_coff_reloc16_get_relocated_section_contents
1415 #define coff_bfd_relax_section bfd_coff_reloc16_relax_section
1416
1417 CREATE_BIG_COFF_TARGET_VEC (h8300_coff_vec, "coff-h8300", BFD_IS_RELAXABLE, 0, '_', NULL, COFF_SWAP_TABLE)
1418